公开(公告)号：US20110316515A1

公开(公告)日：2011-12-29

申请号：US13158054

申请日：2011-06-10

申请人： Kazuhiro MITSUDA ,  Koji Okada ,  Suguru Tachibana

发明人： Kazuhiro MITSUDA ,  Koji Okada ,  Suguru Tachibana

IPC分类号： G05F3/02

CPC分类号： H03L1/04 ,  G05F3/30 ,  H03K3/011 ,  H03K3/027

摘要： An oscillation circuit including a reference voltage generation circuit that adds a proportional-to-absolute-temperature (PTAT) output, which increases in proportion to an absolute temperature, to a complementary-to-absolute-temperature (CTAT) output, which decreases in proportion to an absolute temperature, to generate and output a reference voltage. The oscillation circuit generates an oscillation signal having a desired and fixed frequency.

摘要翻译： 一种包括参考电压产生电路的振荡电路，其将与绝对温度成比例增加的比例绝对温度（PTAT）输出添加到互补绝对温度（CTAT）输出，其降低 与绝对温度成比例，以产生和输出参考电压。 振荡电路产生具有期望和固定频率的振荡信号。

公开(公告)号：US08508307B2

公开(公告)日：2013-08-13

申请号：US13158054

申请日：2011-06-10

申请人： Kazuhiro Mitsuda ,  Koji Okada ,  Suguru Tachibana

发明人： Kazuhiro Mitsuda ,  Koji Okada ,  Suguru Tachibana

IPC分类号： H03L1/02 ,  H03K3/26 ,  H03K3/353

CPC分类号： H03L1/04 ,  G05F3/30 ,  H03K3/011 ,  H03K3/027

摘要： An oscillation circuit including a reference voltage generation circuit that adds a proportional-to-absolute-temperature (PTAT) output, which increases in proportion to an absolute temperature, to a complementary-to-absolute-temperature (CTAT) output, which decreases in proportion to an absolute temperature, to generate and output a reference voltage. The oscillation circuit generates an oscillation signal having a desired and fixed frequency.

摘要翻译： 一种包括参考电压产生电路的振荡电路，其将与绝对温度成比例增加的比例绝对温度（PTAT）输出添加到互补绝对温度（CTAT）输出，其降低 与绝对温度成比例，以产生和输出参考电压。 振荡电路产生具有期望和固定频率的振荡信号。

公开(公告)号：US07236047B2

公开(公告)日：2007-06-26

申请号：US11260176

申请日：2005-10-28

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： G05F1/10

CPC分类号： G05F3/30

摘要： A band gap circuit includes a voltage generating circuit, and a first and a second switched capacitor circuits (SCC). Operational amplifier in the first and the second SCC are connected though a coupling capacitor. Capacitance of the coupling capacitor is smaller than that of a feedback capacitor in the first SCC. A PTAT voltage is obtained by multiplying a thermal voltage by a coefficient determined based on capacitances of input capacitors and feedback capacitors in each of the first and the second SCC, and the coupling capacitor. The voltage generating circuit generates a forward bias voltage that has a negative temperature-dependency at a p-n junction. The PTAT voltage is added to the forward bias voltage to generate a reference voltage independent of temperature.

公开(公告)号：US20070115159A1

公开(公告)日：2007-05-24

申请号：US11363968

申请日：2006-03-01

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： H03M1/66

CPC分类号： H03M1/1023 ,  H03M1/0682 ,  H03M1/468 ,  H03M1/804

摘要： Included are a first DAC taking in and retaining sample data of a first analog signal and generating a comparison signal serving as an object of comparison with the first analog signal, a second DAC taking in and retaining sample data of a second analog signal and generating a comparison signal as an object of comparison with the second analog signal, a first switch connecting the first digital-to-analog converter to an output side of a second digital converter in a openable/closable manner, a comparator comparing, when the first switch is opened, a differential value between the first analog signal and the second analog signal with a differential value between an output signal of the first DAC and an output signal of the second DAC, and an electric potential control circuit controlling fluctuations in electric potentials of a first analog terminal and a second analog terminal.

摘要翻译： 包括第一DAC接收并保留第一模拟信号的采样数据并产生用作与第一模拟信号进行比较的对象的比较信号，第二DAC接收并保留第二模拟信号的采样数据并产生 比较信号作为与第二模拟信号进行比较的对象，第一开关以第一开关为第一开关为第一开关，将第一数模转换器以可开/关的方式连接到第二数字转换器的输出侧;比较器， 打开第一模拟信号和第二模拟信号之间的差分值，其中第一DAC的输出信号和第二DAC的输出信号之间的差分值和控制第一DAC的电位波动的电位控制电路 模拟端子和第二模拟端子。

公开(公告)号：US20070035434A1

公开(公告)日：2007-02-15

申请号：US11273025

申请日：2005-11-15

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： H03M1/38

CPC分类号： H03M1/468 ,  H03M1/0682

摘要： A successive approximation. A/D converter includes a sample-hold amplifier circuit configured to sample and hold an input analog voltage to produce an internal analog voltage proportional to the input analog voltage with a voltage gain being smaller than 1, a switched capacitor D/A converter coupled to the sample-hold amplifier circuit and including a plurality of capacitors for storing electric charge responsive to the internal analog voltage, the switched capacitor D/A converter configured to switch couplings of the capacitors in response to a control signal to produce a comparison analog voltage responsive to the internal analog voltage and the control signal, a comparator coupled to the switched capacitor D/A converter to produce a comparison result signal responsive to the comparison analog voltage, and a control circuit coupled to the comparator to supply the control signal responsive to the comparison result signal to the switched capacitor D/A converter.

摘要翻译： 逐渐逼近。 A / D转换器包括采样保持放大器电路，其被配置为采样和保持输入模拟电压以产生与输入模拟电压成比例的内部模拟电压，其电压增益小于1，开关电容器D / A转换器耦合到 所述采样保持放大器电路并且包括用于响应于所述内部模拟电压而存储电荷的多个电容器，所述开关电容器D / A转换器被配置为响应于控制信号来切换所述电容器的耦合，以产生比较模拟电压响应 与所述内部模拟电压和所述控制信号相对应的比较器，耦合到所述开关电容器D / A转换器的比较器，以响应于所述比较模拟电压产生比较结果信号;以及控制电路，耦合到所述比较器以响应于所述控制信号提供所述控制信号 比较结果信号到开关电容器D / A转换器。

公开(公告)号：US07233273B2

公开(公告)日：2007-06-19

申请号：US11363968

申请日：2006-03-01

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： H03M1/12

CPC分类号： H03M1/1023 ,  H03M1/0682 ,  H03M1/468 ,  H03M1/804

摘要： Included are a first unit including a DAC which generates a comparison signal serving as an object of comparison with the first analog signal, taking in and retaining the first analog signal, a second unit including a DAC which generates a comparison signal serving as an object of comparison with the first analog signal, taking in and retaining the second analog signal, a first switch connecting the first unit to an output side of the second unit, a comparator comparing a differential value between the first analog signal and the second analog signal with a differential value between the comparison signal of the first DAC and an output signal of the second DAC, and an electric potential control circuit controlling fluctuations in electric potentials of the first analog terminal and the second analog terminal.

摘要翻译： 包括第一单元，包括DAC，其产生用作与第一模拟信号进行比较的对象的比较信号，接收并保持第一模拟信号;第二单元，包括DAC，其产生用作对象的比较信号 与所述第一模拟信号进行比较，接收和保持所述第二模拟信号，将所述第一单元连接到所述第二单元的输出侧的第一开关，将所述第一模拟信号和所述第二模拟信号之间的差分值与 第一DAC的比较信号和第二DAC的输出信号之间的差分值以及控制第一模拟端子和第二模拟端子的电位波动的电位控制电路。

公开(公告)号：US07199745B2

公开(公告)日：2007-04-03

申请号：US11273025

申请日：2005-11-15

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： H03M1/34

CPC分类号： H03M1/468 ,  H03M1/0682

摘要： A successive approximation A/D converter includes a sample-hold amplifier circuit configured to sample and hold an input analog voltage to produce an internal analog voltage proportional to the input analog voltage with a voltage gain being smaller than 1, a switched capacitor D/A converter coupled to the sample-hold amplifier circuit and including a plurality of capacitors for storing electric charge responsive to the internal analog voltage, the switched capacitor D/A converter configured to switch couplings of the capacitors in response to a control signal to produce a comparison analog voltage responsive to the internal analog voltage and the control signal, a comparator coupled to the switched capacitor D/A converter to produce a comparison result signal responsive to the comparison analog voltage, and a control circuit coupled to the comparator to supply the control signal responsive to the comparison result signal to the switched capacitor D/A converter.

摘要翻译： 逐次逼近A / D转换器包括采样保持放大器电路，其被配置为采样和保持输入模拟电压以产生与输入模拟电压成比例的内部模拟电压，其电压增益小于1，开关电容器D / A 转换器，其耦合到采样保持放大器电路，并且包括用于响应于内部模拟电压存储电荷的多个电容器，所述开关电容器D / A转换器被配置为响应于控制信号来切换电容器的耦合以产生比较 响应于内部模拟电压和控制信号的模拟电压，耦合到开关电容器D / A转换器的比较器，以响应于比较模拟电压产生比较结果信号;以及控制电路，耦合到比较器以提供控制信号 响应于比较结果信号到开关电容器D / A转换器。

公开(公告)号：US20070040600A1

公开(公告)日：2007-02-22

申请号：US11260176

申请日：2005-10-28

申请人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

发明人： Suguru Tachibana ,  Kazuhiro Mitsuda ,  Tatsuo Kato

IPC分类号： G05F1/10

CPC分类号： G05F3/30

摘要： A band gap circuit includes a voltage generating circuit, and a first and a second switched capacitor circuits (SCC). Operational amplifier in the first and the second SCC are connected though a coupling capacitor. Capacitance of the coupling capacitor is smaller than that of a feedback capacitor in the first SCC. A PTAT voltage is obtained by multiplying a thermal voltage by a coefficient determined based on capacitances of input capacitors and feedback capacitors in each of the first and the second SCC, and the coupling capacitor. The voltage generating circuit generates a forward bias voltage that has a negative temperature-dependency at a p-n junction. The PTAT voltage is added to the forward bias voltage to generate a reference voltage independent of temperature.

摘要翻译： 带隙电路包括电压产生电路和第一和第二开关电容器电路（SCC）。 第一和第二SCC中的运算放大器通过耦合电容器连接。 耦合电容的电容小于第一SCC中的反馈电容的电容。 通过将热电压乘以基于第一和第二SCC中的每一个中的输入电容器和反馈电容器的电容确定的系数和耦合电容器来获得PTAT电压。 电压产生电路产生在p-n结处具有负温度依赖性的正向偏置电压。 将PTAT电压加到正向偏置电压以产生独立于温度的参考电压。

公开(公告)号：US08436687B2

公开(公告)日：2013-05-07

申请号：US12974996

申请日：2010-12-21

申请人： Kenta Aruga ,  Suguru Tachibana ,  Koji Okada

发明人： Kenta Aruga ,  Suguru Tachibana ,  Koji Okada

IPC分类号： H03K3/03

CPC分类号： H03K3/354

摘要： An oscillating apparatus includes: a transfer gate including a P-channel transistor and a N-channel transistor; a first inverter for inverting an output signal of the transfer gate and outputting the inverted output signal of the transfer gate; a second inverter for inverting the output signal of the first inverter and outputting the inverted output signal of the first inverter; a third inverter for inverting the output signal of the first inverter and outputting the inverted output signal of the first inverter; a fourth inverter for inverting the output signal of the third inverter and outputting the inverted output signal of the third inverter to an input-terminal of the transfer gate; a first capacitor connected between an output-terminal of the transfer gate and an output-terminal of the second inverter; and a second capacitor connected between the output-terminal of the transfer gate and a reference potential node.

摘要翻译： 振荡装置包括：传输门，包括P沟道晶体管和N沟道晶体管; 第一反相器，用于反转传输门的输出信号并输出​​转移门的反相输出信号; 第二逆变器，用于反相第一反相器的输出信号，并输出第一反相器的反相输出信号; 第三反相器，用于反相第一反相器的输出信号并输出​​第一反相器的反相输出信号; 第四反相器，用于反相第三反相器的输出信号，并将第三反相器的反相输出信号输出到传输门的输入端; 连接在所述传输门的输出端和所述第二反相器的输出端之间的第一电容器; 以及连接在传输门的输出端和参考电位节点之间的第二电容器。

公开(公告)号：US20120075128A1

公开(公告)日：2012-03-29

申请号：US13186059

申请日：2011-07-19

申请人： Kenta ARUGA ,  Suguru Tachibana ,  Sanroku Tsukamoto ,  Koji Okada

发明人： Kenta ARUGA ,  Suguru Tachibana ,  Sanroku Tsukamoto ,  Koji Okada

IPC分类号： H03M1/12

CPC分类号： H03M1/1038 ,  H03M1/1019 ,  H03M1/144 ,  H03M1/468 ,  H03M1/765 ,  H03M1/804

摘要： A successive approximation A/D converter, has a main DAC having a capacitive element group coupled to a top node and a switch group; a comparator comparing voltage of the top node with comparison reference voltage; a correction DAC generating correction voltage in accordance with a capacitance error of a capacitive element pair to be balanced in the main DAC, and supplying the correction voltage to the top node; and a control circuit generating internal digital input for controlling the switch group and a correction code for controlling the correction voltage, and outputting a successive approximation result by the comparator when the A/D conversion is performed. The control circuit measures a capacitance error of the capacitive element pair to be balanced, and determines an offset-removed capacitance error where an offset generated in the measurement is removed from the capacitance error.

摘要翻译： 逐次逼近A / D转换器，具有耦合到顶部节点和开关组的电容元件组的主DAC; 比较上位节点电压和比较参考电压的比较器; 校正DAC根据要在主DAC中平衡的电容元件对的电容误差产生校正电压，并向顶部节点提供校正电压; 以及控制电路，产生用于控制开关组的内部数字输入和用于控制校正电压的校正码，并且当执行A / D转换时，通过比较器输出逐次逼近结果。 控制电路测量要平衡的电容元件对的电容误差，并确定偏移消除的电容误差，其中在测量中产生的偏移从电容误差中消除。