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公开(公告)号：US07349750B2
公开(公告)日：2008-03-25
申请号：US11480373
申请日：2006-07-05
IPC分类号： G06F19/00
CPC分类号： G05B19/41885 , G05B2219/45031 , Y02P90/20 , Y02P90/26
摘要： A method for optimizing a structure of an industrial product includes selecting control factors from among manufacturing parameters affecting a target characteristic, which is scheduled to be manufactured by a sequence of manufacturing processes; setting levels to the respective control factors; selecting a reference characteristic having a trade-off relation with the target characteristic from among characteristics of the structure; setting a reference value to the reference characteristic; selecting a prior adjustment factor affecting the reference characteristic; creating conditions for experiments assigning combinations of the levels to the respective control factors; determining an adjustment value of the prior adjustment factor so that each of characteristic values of the reference characteristic obtained by the experiments conforms substantially to the reference value; and determining experimental characteristic values of the target characteristic using the adjustment value.
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2.发明授权公开(公告)号：US07584011B2
公开(公告)日：2009-09-01
申请号：US12007723
申请日：2008-01-15
IPC分类号： G06F19/00
CPC分类号： G05B19/41885 , G05B2219/45031 , Y02P90/20 , Y02P90/26
摘要： A method for optimizing a structure of an industrial product includes selecting control factors from among manufacturing parameters affecting a target characteristic, which is scheduled to be manufactured by a sequence of manufacturing processes; setting levels to the respective control factors; selecting a reference characteristic having a trade-off relation with the target characteristic from among characteristics of the structure; setting a reference value to the reference characteristic; selecting a prior adjustment factor affecting the reference characteristic; creating conditions for experiments assigning combinations of the levels to the respective control factors; determining an adjustment value of the prior adjustment factor so that each of characteristic values of the reference characteristic obtained by the experiments conforms substantially to the reference value; and determining experimental characteristic values of the target characteristic using the adjustment value.
摘要翻译： 一种用于优化工业产品结构的方法包括从影响目标特性的制造参数中选择控制因子，该目标特性被安排由一系列制造过程制造; 设定各个控制因素的水平; 从结构的特征中选择具有与目标特性的权衡关系的参考特征; 将参考值设置为参考特性; 选择影响参考特征的先前调整因子; 创建将各级的组合分配给各个控制因素的实验条件; 确定现有调整因子的调整值，使得通过实验获得的参考特性的每个特征值基本上符合参考值; 以及使用所述调整值来确定所述目标特性的实验特性值。
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3.发明申请公开(公告)号：US20070067056A1
公开(公告)日：2007-03-22
申请号：US11480373
申请日：2006-07-05
IPC分类号： G06F19/00
CPC分类号： G05B19/41885 , G05B2219/45031 , Y02P90/20 , Y02P90/26
摘要： A method for optimizing a structure of an industrial product includes selecting control factors from among manufacturing parameters affecting a target characteristic, which is scheduled to be manufactured by a sequence of manufacturing processes; setting levels to the respective control factors; selecting a reference characteristic having a trade-off relation with the target characteristic from among characteristics of the structure; setting a reference value to the reference characteristic; selecting a prior adjustment factor affecting the reference characteristic; creating conditions for experiments assigning combinations of the levels to the respective control factors; determining an adjustment value of the prior adjustment factor so that each of characteristic values of the reference characteristic obtained by the experiments conforms substantially to the reference value; and determining experimental characteristic values of the target characteristic using the adjustment value.
摘要翻译： 一种用于优化工业产品结构的方法包括从影响目标特性的制造参数中选择控制因子，该目标特性被安排由一系列制造过程制造; 设定各个控制因素的水平; 从结构的特征中选择具有与目标特性的权衡关系的参考特征; 将参考值设置为参考特性; 选择影响参考特征的先前调整因子; 创建将各级的组合分配给各个控制因素的实验条件; 确定现有调整因子的调整值，使得通过实验获得的参考特性的每个特征值基本上符合参考值; 以及使用所述调整值来确定所述目标特性的实验特性值。
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4.发明申请公开(公告)号：US20080140229A1
公开(公告)日：2008-06-12
申请号：US12007723
申请日：2008-01-15
IPC分类号： G05B13/02
CPC分类号： G05B19/41885 , G05B2219/45031 , Y02P90/20 , Y02P90/26
摘要： A method for optimizing a structure of an industrial product includes selecting control factors from among manufacturing parameters affecting a target characteristic, which is scheduled to be manufactured by a sequence of manufacturing processes; setting levels to the respective control factors; selecting a reference characteristic having a trade-off relation with the target characteristic from among characteristics of the structure; setting a reference value to the reference characteristic; selecting a prior adjustment factor affecting the reference characteristic; creating conditions for experiments assigning combinations of the levels to the respective control factors; determining an adjustment value of the prior adjustment factor so that each of characteristic values of the reference characteristic obtained by the experiments conforms substantially to the reference value; and determining experimental characteristic values of the target characteristic using the adjustment value.
摘要翻译： 一种用于优化工业产品结构的方法包括从影响目标特性的制造参数中选择控制因子，该目标特性被安排由一系列制造过程制造; 设定各个控制因素的水平; 从结构的特征中选择具有与目标特性的权衡关系的参考特征; 将参考值设置为参考特性; 选择影响参考特征的先前调整因子; 创建将各级的组合分配给各个控制因素的实验条件; 确定现有调整因子的调整值，使得通过实验获得的参考特性的每个特征值基本上符合参考值; 以及使用所述调整值来确定所述目标特性的实验特性值。
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公开(公告)号：US06541829B2
公开(公告)日：2003-04-01
申请号：US09726486
申请日：2000-12-01
IPC分类号： H01L2976
CPC分类号： H01L29/66583 , H01L21/823807 , H01L27/092 , H01L29/105 , H01L29/66537 , H01L29/66545 , H01L29/66628
摘要： A semiconductor device has a first semiconductor region formed in a semiconductor substrate and having a first conductivity type due to first-conductivity-type active impurities contained in the first semiconductor region, and a second semiconductor region formed between the first semiconductor region and the surface of the semiconductor substrate and having a second conductivity type due to second-conductivity-type active impurities contained in the second semiconductor region. The second semiconductor region contains first-conductivity-type active impurities whose concentration is zero or smaller than a quarter of a concentration of the second-conductivity-type active impurities contained in the second semiconductor region. An insulating film and a conductor are formed on the second semiconductor region. Third and fourth semiconductor regions of the second conductivity type are formed at the semiconductor surface in contact with the side faces of the second semiconductor region. This semiconductor device is capable of suppressing net impurity concentration variations as well as threshold voltage variations to be caused by a short channel effect or manufacturing variations.
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公开(公告)号：US07078776B2
公开(公告)日：2006-07-18
申请号：US10867797
申请日：2004-06-16
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/66583 , H01L21/823807 , H01L27/092 , H01L29/105 , H01L29/66537 , H01L29/66545 , H01L29/66628
摘要： A semiconductor device has a first semiconductor region formed in a semiconductor substrate and having a first conductivity type due to first-conductivity-type active impurities contained in the first semiconductor region, and a second semiconductor region formed between the first semiconductor region and the surface of the semiconductor substrate and having a second conductivity type due to second-conductivity-type active impurities contained in the second semiconductor region. The second semiconductor region contains first-conductivity-type active impurities, whose concentration is zero or smaller than a quarter of a concentration of the second-conductivity-type active impurities contained in the second semiconductor region. An insulating film and a conductor are formed on the second semiconductor region. Third and fourth semiconductor regions of the second conductivity type are formed at the semiconductor surface in contact with the side faces of the second semiconductor region. This semiconductor device is capable of suppressing net impurity concentration variations as well as threshold voltage variations to be caused by a short channel effect or manufacturing variations.
摘要翻译： 半导体器件具有形成在半导体衬底中并且由于第一半导体区域中包含的第一导电型有源杂质而具有第一导电类型的第一半导体区域，以及形成在第一半导体区域和第一半导体区域之间的第二半导体区域 并且由于第二半导体区域中包含的第二导电型有源杂质而具有第二导电类型。 第二半导体区域包含第一导电型有源杂质，其浓度为零或小于第二半导体区域中所含的第二导电型有源杂质浓度的四分之一。 绝缘膜和导体形成在第二半导体区域上。 在与第二半导体区域的侧面接触的半导体表面处形成第二导电类型的第三和第四半导体区域。 该半导体器件能够抑制净杂质浓度变化以及由短沟道效应或制造变化引起的阈值电压变化。
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公开(公告)号：US06770944B2
公开(公告)日：2004-08-03
申请号：US10303806
申请日：2002-11-26
IPC分类号： H01L2976
CPC分类号： H01L29/66583 , H01L21/823807 , H01L27/092 , H01L29/105 , H01L29/66537 , H01L29/66545 , H01L29/66628
摘要： A semiconductor device has a first semiconductor region formed in a semiconductor substrate and having a first conductivity type due to first-conductivity-type active impurities contained in the first semiconductor region, and a second semiconductor region formed between the first semiconductor region and the surface of the semiconductor substrate and having a second conductivity type due to second-conductivity-type active impurities contained in the second semiconductor region. The second semiconductor region contains first-conductivity-type active impurities whose concentration is zero or smaller than a quarter of a concentration of the second-conductivity-type active impurities contained in the second semiconductor region. An insulating film and a conductor are formed on the second semiconductor region. Third and fourth semiconductor regions of the second conductivity type are formed at the semiconductor surface in contact with the side faces of the second semiconductor region. This semiconductor device is capable of suppressing net impurity concentration variations as well as threshold voltage variations to be caused by a short channel effect or manufacturing variations.
摘要翻译： 半导体器件具有形成在半导体衬底中并且由于第一半导体区域中包含的第一导电型有源杂质而具有第一导电类型的第一半导体区域，以及形成在第一半导体区域和第一半导体区域之间的第二半导体区域 并且由于第二半导体区域中包含的第二导电型有源杂质而具有第二导电类型。 第二半导体区域包含浓度为零或小于第二半导体区域中所含的第二导电型有源杂质的浓度的四分之一的第一导电型活性杂质。 绝缘膜和导体形成在第二半导体区域上。 在与第二半导体区域的侧面接触的半导体表面处形成第二导电类型的第三和第四半导体区域。 该半导体器件能够抑制净杂质浓度变化以及由短沟道效应或制造变化引起的阈值电压变化。
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8.发明授权Template manufacturing method, semiconductor device manufacturing method and template 有权模板制造方法，半导体器件制造方法和模板公开(公告)号：US08609014B2
公开(公告)日：2013-12-17
申请号：US13150961
申请日：2011-06-01
IPC分类号： B29C67/20
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： According to one embodiment, a template manufacturing method is a method for manufacturing a template for use in an imprint processing in which a pattern having irregularities are formed on a principal surface, and the pattern is brought into contact with a resist member formed on a substrate to be processed, to transfer the pattern to the resist member, the method including implanting charged particles at least into the bottoms of concave portions of the template.
摘要翻译： 根据一个实施例，模板制造方法是用于制造在压印处理中使用的模板的方法，其中在主表面上形成具有凹凸的图案，并且图案与形成在基板上的抗蚀剂部件接触 要被处理以将图案转印到抗蚀剂构件上，该方法包括将带电粒子至少注入到模板的凹部的底部中。
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公开(公告)号：US08436331B2
公开(公告)日：2013-05-07
申请号：US12844374
申请日：2010-07-27
申请人： Yoko Iwakaji , Jun Hirota , Kyoichi Suguro , Moto Yabuki
发明人： Yoko Iwakaji , Jun Hirota , Kyoichi Suguro , Moto Yabuki
IPC分类号： H01L21/02
CPC分类号： H01L27/1021 , G11C13/0007 , G11C2213/71 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/145 , H01L45/16 , H01L45/1675
摘要： According to one embodiment, a method for manufacturing a memory device is disclosed. The method includes forming a silicon diode. At least an upper portion of the silicon diode is made of a semiconductor material containing silicon and doped with impurity. The method includes forming a metal layer made of a metal on the silicon diode. The method includes forming a metal nitride layer made of a nitride of the metal on the metal layer. The method includes forming a resistance change film. In addition, the method includes reacting the metal layer with the silicon diode and the metal nitride layer by heat treatment to form an electrode film containing the metal, silicon, and nitrogen.
摘要翻译： 根据一个实施例，公开了一种用于制造存储器件的方法。 该方法包括形成硅二极管。 至少硅二极管的上部由含有硅并掺杂杂质的半导体材料制成。 该方法包括在硅二极管上形成由金属制成的金属层。 该方法包括在金属层上形成由金属的氮化物制成的金属氮化物层。 该方法包括形成电阻变化膜。 此外，该方法包括通过热处理使金属层与硅二极管和金属氮化物层反应，以形成含有金属，硅和氮的电极膜。
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公开(公告)号：US08017466B2
公开(公告)日：2011-09-13
申请号：US12591162
申请日：2009-11-10
申请人： Kazuaki Nakajima , Kyoichi Suguro
发明人： Kazuaki Nakajima , Kyoichi Suguro
IPC分类号： H01L21/8238
CPC分类号： H01L21/823842 , H01L21/28079 , H01L29/4958 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/7833 , Y10S438/976
摘要： In a semiconductor substrate on which are formed an N-type MOS transistor and a P-type MOS transistor, the gate electrode of the N-type MOS transistor comprises a tungsten film, which makes contact with a gate insulation film, and the gate electrode of the P-type MOS transistor comprises a tungsten film, which makes contact with a gate insulation film, and the concentration of carbon contained in the former tungsten film is less than the concentration of carbon contained in the latter tungsten film.
摘要翻译： 在形成N型MOS晶体管和P型MOS晶体管的半导体衬底中，N型MOS晶体管的栅电极包括与栅极绝缘膜接触的钨膜和栅电极 的P型MOS晶体管包括与栅极绝缘膜接触的钨膜，前者钨膜中所含的碳的浓度小于后者钨膜中所含的碳的浓度。
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