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1.发明授权Process for producing high-resistance silicon wafers and process for producing epitaxial wafers and SOI wafers 有权用于生产高电阻硅晶片的方法和用于制造外延晶片和SOI晶片的工艺公开(公告)号：US07803228B2
公开(公告)日：2010-09-28
申请号：US10576321
申请日：2004-08-02
IPC分类号： C30B15/14
CPC分类号： H01L21/324 , C30B29/06 , C30B33/02 , H01L21/322 , H01L21/76243
摘要： By using oxygen-containing silicon wafers obtained by the CZ method and by combining the first heat treatment comprising controlled heat-up operation (ramping) with the second heat treatment comprising high-temperature heat treatment and medium temperature heat treatment in accordance with the process for producing high-resistance silicon wafers according to the present invention, it is possible to obtain high-resistance silicon wafers capable of maintaining their high resistance even after heat treatment in the process of device manufacture while efficiently inhibiting the formation of oxygen donors and preventing changes in resistivity. Further, excellent epitaxial wafers and SOI wafers can be produced using those high-resistance silicon wafers and, therefore, they can be applied in a wide field including high-frequency communication devices and analog/digital hybrid devices, among others.
摘要翻译： 通过使用通过CZ方法获得的含氧硅晶片，并且通过将包括受控加热操作（斜面）的第一热处理与包括高温热处理和中温热处理的第二热处理组合， 制造根据本发明的高电阻硅晶片，可以获得能够在器件制造过程中即使在热处理之后也能够保持高电阻的高电阻硅晶片，同时有效地抑制氧供体的形成并防止 电阻率。 此外，可以使用这些高电阻硅晶片来制造优异的外延晶片和SOI晶片，因此可以应用于包括高频通信装置和模拟/数字混合装置等的广泛领域。
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2.发明申请Process for producing high-resistance silicon wafers and process for producing epitaxial wafers and soi wafers (as amended) 有权用于生产高电阻硅晶片的方法和用于生产外延晶片和硅晶片的工艺（经修改）公开(公告)号：US20070066033A1
公开(公告)日：2007-03-22
申请号：US10576321
申请日：2004-08-02
IPC分类号： H01L21/322
CPC分类号： H01L21/324 , C30B29/06 , C30B33/02 , H01L21/322 , H01L21/76243
摘要： By using oxygen-containing silicon wafers obtained by the CZ method and by combining the first heat treatment comprising controlled heat-up operation (ramping) with the second heat treatment comprising high-temperature heat treatment and medium temperature heat treatment in accordance with the process for producing high-resistance silicon wafers according to the present invention, it is possible to obtain high-resistance silicon wafers capable of maintaining their high resistance even after heat treatment in the process of device manufacture while efficiently inhibiting the formation of oxygen donors and preventing changes in resistivity. Further, excellent epitaxial wafers and SOI wafers can be produced using those high-resistance silicon wafers and, therefore, they can be applied in a wide field including high-frequency communication devices and analog/digital hybrid devices, among others.
摘要翻译： 通过使用通过CZ方法获得的含氧硅晶片，并且通过将包括受控加热操作（斜面）的第一热处理与包括高温热处理和中温热处理的第二热处理组合， 制造根据本发明的高电阻硅晶片，可以获得能够在器件制造过程中即使在热处理之后也能够保持高电阻的高电阻硅晶片，同时有效地抑制氧供体的形成并防止 电阻率。 此外，可以使用这些高电阻硅晶片来制造优异的外延晶片和SOI晶片，因此可以应用于包括高频通信装置和模拟/数字混合装置等的广泛领域。
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公开(公告)号：US07226571B2
公开(公告)日：2007-06-05
申请号：US10964728
申请日：2004-10-15
IPC分类号： C30B15/20
CPC分类号： H01L21/3225
摘要： A high resistivity p type silicon wafer with a resistivity of 100 Ωcm or more, in the vicinity of the surface being formed denuded zone, wherein when a heat treatment in the device fabrication process is performed, a p/n type conversion layer due to thermal donor generation is located at a depth to be brought into contact with neither any device active region nor depletion layer region formed in contact therewith or at a depth more than 8 μm from the surface, and a method for fabricating the same. The high resistivity silicon wafer can cause the influence of thermal donors to disappear without reducing the soluble oxygen concentration in the wafer, whereby even if various heat treatments are performed in the device fabrication process, devices such as CMOS that offer superior characteristics can be fabricated. The wafer has wide application as a substrate for a high-frequency integrated circuit device.
摘要翻译： 在形成表面的附近，具有电阻率为100Ωm或更大的高电阻率p型硅晶片，其中当进行器件制造工艺中的热处理时，由于热供体而导致的ap / n型转换层 一代位于与表面形成接触或超过8μm深度的任何器件有源区和耗尽层区域的深度上，以及其制造方法。 高电阻率硅晶片可以引起供体的影响而不降低晶片中的可溶性氧浓度，由此即使在器件制造工艺中进行各种热处理，也可以制造诸如CMOS的器件，其提供优异的特性。 该晶片作为高频集成电路器件的基板具有广泛的应用。
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公开(公告)号：US08252404B2
公开(公告)日：2012-08-28
申请号：US10985880
申请日：2004-11-12
IPC分类号： C30B29/00
CPC分类号： C30B29/06 , C30B15/20 , Y10T428/21
摘要： Disclosed are high resistivity silicon wafers, wherein the interstitial oxygen concentration thereof is 8×1017 atoms/cm3 (ASTM F121-1979) or less, BMD (Bulk Micro Defect) density—oxygen precipitate within wafer—is 5×107 pieces/cm3 or less, and an electric resistivity thereof is 100 Ω·cm or more. And further disclosed are high resistivity silicon wafers having an electric resistivity of 100 Ω·cm or more, which are cut from crystal region where no COP (Crystal Originated Particle) exist, and in which neither COP (Crystal Originated Particle) nor oxygen precipitate exist at the area from wafer surface to the depth of 5 μm or more owing to high temperature treatment. It is preferable that, in said high resistivity wafers, carbon concentration in wafers is 1×1016 atoms/cm3 or more (ASTM F123-1981), and/or nitrogen concentration is 1×1013 atoms/cm3 or more. Accordingly, high resistivity silicon wafers are provided, wherein the mechanical strength thereof is highly secured, and an excellent characteristic to slip generation is provided, so as to be optimal for base wafers of silicon wafers having a SOI structure or an epitaxial structure.
摘要翻译： 公开了高电阻率硅片，其间隙氧浓度为8×1017原子/ cm3（ASTM F121-1979）或更低，晶片内的BMD（体积微缺陷）密度 - 氧沉淀物为5×107个/ cm3或 较小，电阻率为100Ω·cm·cm以上。 并且还公开了电阻率为100Ω·cm·cm以上的高电阻率硅晶片，其从不存在COP（晶体起始粒子）的晶体区域切割，并且其中没有COP（晶体起始粒子）和氧沉淀 由于高温处理，存在于从晶片表面到5μm以上的深度的区域。 优选在所述高电阻率晶片中，晶片中的碳浓度为1×1016原子/ cm3以上（ASTM F123-1981），和/或氮浓度为1×1013原子/ cm3以上。 因此，提供了高电阻率硅晶片，其机械强度高度确保，并且提供了优异的滑动产生特性，从而对于具有SOI结构或外延结构的硅晶片的基底晶片是最佳的。
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公开(公告)号：US20110171814A1
公开(公告)日：2011-07-14
申请号：US13051909
申请日：2011-03-18
IPC分类号： H01L21/322
CPC分类号： C30B29/06 , C30B15/00 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/3225 , H01L27/146 , H01L31/186 , Y02P70/521 , Y10T428/265
摘要： A method for preparing a silicon epitaxial wafer that includes a silicon single crystal wafer sliced from a CZ silicon ingot doped with carbon in a concentration range of not less than 5×1015 atoms/cm3 and not more than 5×1017 atoms/cm3 and an epitaxial layer consisting of a silicon single crystal epitaxially grown on a front surface of the silicon single crystal wafer. A polycrystalline silicon layer having a thickness of not less than 0.5 μm and not more than 1.5 μm is formed on a back surface of the silicon single crystal wafer.
摘要翻译： 一种制备硅外延晶片的方法，其包括从掺杂有不少于5×10 15原子/ cm 3且不大于5×10 17原子/ cm 3的浓度的碳的CZ硅锭切片的硅单晶晶片和 外延层由在硅单晶晶片的前表面外延生长的单晶硅构成。 在硅单晶晶片的背面形成厚度不小于0.5μm且不大于1.5μm的多晶硅层。
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公开(公告)号：US07700394B2
公开(公告)日：2010-04-20
申请号：US11631451
申请日：2005-06-21
CPC分类号： H01L21/3225 , C30B29/06 , C30B33/02 , H01L21/3226
摘要： There is obtained a silicon wafer which has a large diameter, where no slip generated therein in a wide range of a density of oxygen precipitates even though a heat treatment such as SLA or FLA is applied thereto, and which has high strength.First, by inputting as input parameters combinations of a plurality of types of oxygen concentrations and thermal histories set for manufacture of a silicon wafer, a Fokker-Planck equation is solved to calculate each of a diagonal length L and a density D of oxygen precipitates in the wafer after a heat treatment step to form the oxygen precipitates (11) and immediately before a heat treatment step of a device manufacturing process is calculated. Then, a maximum heat stress S acting in a tangent line direction of an outer peripheral portion of the wafer in the heat treatment step of the device manufacturing process is calculated based on a heat treatment furnace structure and a heat treatment temperature used in the heat treatment step of the device manufacturing process, and then an oxygen concentration or the like satisfying the following Expression (1) is determined: 12000×D−0.26≦L≦51000×S−1.55 (1).
摘要翻译： 获得了具有大直径的硅晶片，即使在其中施加了诸如SLA或FLA的热处理并且具有高强度的情况下，在宽的氧浓度范围内产生的滑移也会沉淀。 首先，通过输入用于制造硅晶片的多种类型的氧浓度和热历史的输入参数的组合，解决了福克 - 普朗克方程，以计算每个对角线长度L和氧沉淀物的密度D 在热处理步骤之后形成氧沉淀物（11）的晶片，并且在计算装置制造过程的热处理步骤之前。 然后，基于热处理炉结构和热处理中使用的热处理温度，计算在器件制造工序的热处理工序中在晶片的外周部的切线方向上的最大热应力S 确定满足以下表达式（1）的装置制造过程的步骤，然后确定氧浓度等：12000×D-0.26＆nlE; L＆nlE; 51000×S-1.55（1）。
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7.发明申请Method for Manufacturing Silicon Wafer and Silicon Wafer Manufactured by this Method 有权通过该方法制造硅晶片和硅晶片的方法公开(公告)号：US20080118424A1
公开(公告)日：2008-05-22
申请号：US11631451
申请日：2005-06-21
CPC分类号： H01L21/3225 , C30B29/06 , C30B33/02 , H01L21/3226
摘要： There is obtained a silicon wafer which has a large diameter, where no slip generated therein in a wide range of a density of oxygen precipitates even though a heat treatment such as SLA or FLA is applied thereto, and which has high strength.First, by inputting as input parameters combinations of a plurality of types of oxygen concentrations and thermal histories set for manufacture of a silicon wafer a Fokker-Planck equation is solved to calculate each of a diagonal length L and a density D of oxygen precipitates in the wafer after a heat treatment step to form the oxygen precipitates (11) and immediately before a heat treatment step of a device manufacturing process is calculated. Then, a maximum heat stress S acting in a tangent line direction of an outer peripheral portion of the wafer in the heat treatment step of the device manufacturing process is calculated based on a heat treatment furnace structure and a heat treatment temperature used in the heat treatment step of the device manufacturing process, and then an oxygen concentration or the like satisfying the following Expression (1) is determined: 12000×D−0.26≦L≦51000×S−1.55 (1)
摘要翻译： 获得了具有大直径的硅晶片，即使在其中施加了诸如SLA或FLA的热处理并且具有高强度的情况下，在宽的氧浓度范围内产生的滑移也会沉淀。 首先，通过输入多个类型的氧浓度的组合和用于制造硅晶片的热历史的组合的输入参数，解决了福克 - 普朗克方程式，以计算出所述氧沉淀物的对角线长度L和密度D 在热处理步骤之后形成氧沉淀物（11）并且在计算装置制造过程的热处理步骤之前。 然后，基于热处理炉结构和热处理中使用的热处理温度，计算在器件制造工序的热处理工序中在晶片的外周部的切线方向上的最大热应力S 确定装置制造过程的步骤，然后确定满足以下表达式（1）的氧浓度等：<？in-line-formula description =“In-line formula”end =“lead”？> 12000xD -0.26 <= L <= 51000×S -1.55 （1）<？in-line-formula description =“In-line Formulas”end =“tail”？>
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公开(公告)号：US20090017291A1
公开(公告)日：2009-01-15
申请号：US11661724
申请日：2005-08-30
IPC分类号： B32B5/00 , H01L21/205
CPC分类号： C30B29/06 , C30B15/00 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/3225 , H01L27/146 , H01L31/186 , Y02P70/521 , Y10T428/265
摘要： A silicon epitaxial wafer of the invention comprises a silicon single crystal wafer sliced from a CZ silicon ingot doped with carbon in a concentration range of not less than 5×1015 atoms/cm3 and not more than 5×1017 atoms/cm3 and an epitaxial layer consisting of a silicon single crystal epitaxially grown on a front surface of the silicon single crystal wafer. A polycrystalline silicon layer having a thickness of not less than 0.5 μm and not more than 1.5 μm is formed on a back surface of the silicon single crystal wafer.
摘要翻译： 本发明的硅外延晶片包括从掺杂有不少于5×10 15原子/ cm 3且不大于5×10 17原子/ cm 3的浓度的碳的CZ硅锭切片的硅单晶晶片和由硅构成的外延层 在硅单晶晶片的正面上外延生长的单晶。 在硅单晶晶片的背面形成厚度不小于0.5μm且不大于1.5μm的多晶硅层。
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公开(公告)号：US20050127477A1
公开(公告)日：2005-06-16
申请号：US10964728
申请日：2004-10-15
IPC分类号： H01L21/322 , H01L21/324 , H01L29/00
CPC分类号： H01L21/3225
摘要： A high resistivity p type silicon wafer with a resistivity of 100 Ωcm or more, in the vicinity of the surface being formed denuded zone, wherein when a heat treatment in the device fabrication process is performed, a p/n type conversion layer due to thermal donor generation is located at a depth to be brought into contact with neither any device active region nor depletion layer region formed in contact therewith or at a depth more than 8 μm from the surface, and a method for fabricating the same. The high resistivity silicon wafer can cause the influence of thermal donors to disappear without reducing the soluble oxygen concentration in the wafer, whereby even if various heat treatments are performed in the device fabrication process, devices such as CMOS that offer superior characteristics can be fabricated. The wafer has wide application as a substrate for a high-frequency integrated circuit device.
摘要翻译： 在形成表面的附近，具有电阻率为100Ωm或更大的高电阻率p型硅晶片，其中当进行器件制造工艺中的热处理时，由于热供体而导致的ap / n型转换层 一代位于与表面形成接触或超过8μm深度的任何器件有源区和耗尽层区域的深度上，以及其制造方法。 高电阻率硅晶片可以引起供体的影响而不降低晶片中的可溶性氧浓度，由此即使在器件制造工艺中进行各种热处理，也可以制造诸如CMOS的器件，其提供优异的特性。 该晶片作为高频集成电路器件的基板具有广泛的应用。
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公开(公告)号：US20050103256A1
公开(公告)日：2005-05-19
申请号：US10985880
申请日：2004-11-12
IPC分类号： C30B15/20 , C30B29/06 , H01L21/322 , H01L27/12 , C30B15/00 , C30B21/06 , C30B27/02 , C30B28/10 , C30B30/04
CPC分类号： C30B29/06 , C30B15/20 , Y10T428/21
摘要： Disclosed are high resistivity silicon wafers, wherein the interstitial oxygen concentration thereof is 8×1017 atoms/cm3 (ASTM F121-1979) or less, BMD (Bulk Micro Defect) density—oxygen precipitate within wafer—is 5×107 pieces/cm3 or less, and an electric resistivity thereof is 100Ω·cm or more. And further disclosed are high resistivity silicon wafers having an electric resistivity of 100Ω·cm or more, which are cut from crystal region where no COP (Crystal Originated Particle) exist, and in which neither COP (Crystal Originated Particle) nor oxygen precipitate exist at the area from wafer surface to the depth of 5 μm or more owing to high temperature treatment. It is preferable that, in said high resistivity wafers, carbon concentration in wafers is 1×1016 atoms/cm3 or more (ASTM F123-1981), and/or nitrogen concentration is 1×1013 atoms/cm3 or more. Accordingly, high resistivity silicon wafers are provided, wherein the mechanical strength thereof is highly secured, and an excellent characteristic to slip generation is provided, so as to be optimal for base wafers of silicon wafers having a SOI structure or an epitaxial structure.
摘要翻译： 披露的是高电阻率硅晶片，其中间隙氧浓度为8×10 17原子/ cm 3（ASTM F121-1979）或更低，BMD（Bulk Micro Defect）密度 晶片内的氧化沉淀物为5×10 7个/ cm 3以下，其电阻率为100mega.cm以上。 并且还公开了电阻率为100mega.cm以上的高电阻率硅晶片，其从不存在COP（晶体起始粒子）的晶体区域切割，并且其中不存在COP（晶体起始粒子）和氧沉淀物 由于高温处理，从晶片表面到深度为5um或更大的区域。 优选地，在所述高电阻率晶片中，晶片中的碳浓度为1×10 16原子/ cm 3以上（ASTM F123-1981）和/或氮浓度 是1×10 3原子/ cm 3以上。 因此，提供了高电阻率硅晶片，其机械强度高度确保，并且提供了优异的滑动产生特性，从而对于具有SOI结构或外延结构的硅晶片的基底晶片是最佳的。
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