利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

23 条记录 (耗时 0.026 秒)

    Toy vehicle
    1.
    发明授权
    Toy vehicle 有权
    玩具车

    公开(公告)号：US09375648B2

    公开(公告)日：2016-06-28

    申请号：US13117534

    申请日：2011-05-27

    申请人： Keith Alan Hippely ,  Joseph Wu ,  Patrick Chu ,  Denise Wong ,  Edward Wong

    发明人： Keith Alan Hippely ,  Joseph Wu ,  Patrick Chu ,  Denise Wong ,  Edward Wong

    IPC分类号： A63H17/26 ,  A63H13/00 ,  A63H17/00 ,  A63H33/00

    CPC分类号： A63H17/262 ,  A63H13/00 ,  A63H17/004 ,  A63H33/003

    摘要： A toy vehicle is provided. The toy vehicle having: a vehicle chassis defining a first interior region; a leg movably secured to the vehicle chassis for movement from a first position to a second position, wherein the leg and a wheel rotatably secured to the leg is extended away from the chassis when the leg is moved to the second position; a spring for providing a biasing force to retain the leg into the first position; and an actuation unit received within the first interior region of the chassis and operably coupled to the movable leg member and a body portion movably secured to the chassis, the actuation unit being configured to overcome the biasing force of the spring and move the leg to the second position when the body portion is moved with respect to the chassis.

    摘要翻译： 提供玩具车。 该玩具车具有：限定第一内部区域的车辆底盘; 腿部可移动地固定到车辆底盘以从第一位置移动到第二位置，其中当腿部移动到第二位置时，腿部和可旋转地固定到腿部的车轮从底盘延伸; 用于提供偏压力以将腿保持在第一位置的弹簧; 以及致动单元，其容纳在所述底盘的所述第一内部区域内并且可操作地联接到所述可移动的腿部构件和可移动地固定到所述底盘的主体部分，所述致动单元构造成克服所述弹簧的偏置力并将所述腿移动到 当主体部分相对于底盘移动时的第二位置。

    Control system of resisting and assisting force for a rehabilitation apparatus
    4.
    发明授权
    Control system of resisting and assisting force for a rehabilitation apparatus 失效
    康复仪器的抗力辅助控制系统

    公开(公告)号：US06942603B1

    公开(公告)日：2005-09-13

    申请号：US10252672

    申请日：2002-09-24

    申请人： Mi-Ching Tsai ,  Tien-Chi Chen ,  Cheng-Hu Chen ,  Jia-Sheng Hu ,  Andy Wu ,  Joseph Wu

    发明人： Mi-Ching Tsai ,  Tien-Chi Chen ,  Cheng-Hu Chen ,  Jia-Sheng Hu ,  Andy Wu ,  Joseph Wu

    IPC分类号： A63B22/06

    CPC分类号： A63B22/06 ,  A63B21/00181 ,  A63B21/0058 ,  A63B22/0605 ,  A63B23/1209 ,  A63B24/0087 ,  A63B71/0009 ,  A63B2071/0018 ,  A63B2071/0638 ,  A63B2220/78 ,  A63B2225/20

    摘要： A control system of resisting and assisting force for a rehabilitation apparatus includes a motor, a resistance adjustment control device and a motor output force control device. The motor drives the rotating wheels of the rehabilitation apparatus and controls the rotating wheels to produce resistance and power assisting force. The resistance is designed by imitating the frictional force of different road conditions. The motor output force control device gathers the resistance value preset by the resistance adjustment control device. and the force of a patient pushing or pedaling the rotating wheels and then controls the compensation and the output force of the motor to push the rotating wheels. When the resistance is adjusted to become increasingly larger and larger by the resistance adjustment device, the force of a patient's hands or legs will gradually increase and finally able to push or pedal the rotating wheels by himself.

    摘要翻译： 一种用于康复装置的抵抗和辅助力的控制系统包括电动机，电阻调节控制装置和电动机输出力控制装置。 马达驱动康复设备的旋转轮并控制旋转轮产生阻力和动力辅助力。 阻力是通过模仿不同路况的摩擦力来设计的。 电机输出力控制装置收集由电阻调节控制装置预先设定的电阻值。 以及患者推动或踩踏转轮的力，然后控制马达的补偿和输出力推动旋转轮。 当通过电阻调节装置调整电阻变得越来越大时，患者的手或腿的力将逐渐增加，并且最终能够自己推动或踏板。

    Method to improve isolation layer fill in a DRAM array area
    5.
    发明授权
    Method to improve isolation layer fill in a DRAM array area 有权
    改善隔离层填充DRAM阵列区域的方法

    公开(公告)号：US06578177B2

    公开(公告)日：2003-06-10

    申请号：US09928060

    申请日：2001-08-13

    申请人： Joseph Wu ,  Yu-Ping Chu

    发明人： Joseph Wu ,  Yu-Ping Chu

    IPC分类号： G06F1750

    CPC分类号： H01L27/10891 ,  H01L21/76837 ,  H01L27/0207 ,  H01L27/10888

    摘要： A new method of forming gate conductor lines for a DRAM in the manufacture of an integrated circuit device has been achieved. A semiconductor substrate is provided. Active areas are defined. A gate conductor layer is deposited overlying the semiconductor substrate. The gate conductor layer is patterned to form gate conductor lines. The intersections of the gate conductor lines and the active areas form DRAM transistors. Adjacent gate conductor lines are spaced a first minimum distance in critical regions and are spaced a second minimum distance in non-critical regions. The critical regions are defined as the active areas between adjacent gate conductor lines where bit line contacts are planned. The non-critical regions are defined as areas located between the critical regions and the adjacent gate conductor lines. The second minimum distance is greater than the first minimum distance to thereby decrease the aspect ratio in the non-critical regions to less than the aspect ratio in the critical regions. An insulating layer is deposited overlying the gate conductor lines and the semiconductor substrate. The insulating layer completely fills the non-critical regions without creating voids to thereby eliminate bit line contact to bit line contact shorts without affecting transistor performance.

    摘要翻译： 已经实现了在制造集成电路器件中形成用于DRAM的栅极导体线的新方法。 提供半导体衬底。 定义活动区域。 在半导体衬底上沉积栅极导体层。 图案化栅极导体层以形成栅极导体线。 栅极导体线和有源区的交点形成DRAM晶体管。 相邻的栅极导体线在临界区域中间隔第一最小距离，并且在非关键区域中间隔第二最小距离。 临界区域被定义为在相邻的栅极导体线之间的有源区域，其中位线接触被计划。 非关键区域被定义为位于临界区域和相邻栅极导体线之间的区域。 第二最小距离大于第一最小距离，从而将非关键区域中的宽高比降低到临界区域中的纵横比。 绝缘层沉积在栅极导体线和半导体衬底上。 绝缘层完全填充非关键区域而不产生空隙，从而消除位线接触位线接触短路而不影响晶体管性能。

    Wafer ID optical sorting system
    6.
    发明授权
    Wafer ID optical sorting system 有权
    晶圆ID光学分选系统

    公开(公告)号：US06265684B1

    公开(公告)日：2001-07-24

    申请号：US09429152

    申请日：1999-10-28

    申请人： Joseph Wu

    发明人： Joseph Wu

    IPC分类号： B07C500

    CPC分类号： H01L21/67271 ,  B07C5/3412

    摘要： A wafer ID optical sorting system includes an auto-ID reader, a manual-ID reader and a conveying device, operation of which units is controlled by a monitoring system. The auto-ID reader, connected to the monitoring system, can automatically read and identify an ID and allows the ID to be displayed on the monitoring system. The manual-ID reader, connected to the monitoring system, can fetch the ID image and allows it to be displayed on the monitoring system. The conveying device, connected to the monitoring system, can move the auto-ID reader and the manual-ID reader.

    摘要翻译： 晶片ID光学分选系统包括自动识别读取器，手动识别读取器和输送装置，由监视系统控制哪些单元的操作。 连接到监控系统的自动识别阅读器可以自动读取和识别ID，并允许ID显示在监控系统上。 连接到监控系统的手动识别读取器可以获取ID图像，并允许它在监控系统上显示。 连接到监控系统的传送设备可以移动自动识别阅读器和手动识别阅读器。

    Heating mechanism for zipper forming machines
    7.
    发明授权
    Heating mechanism for zipper forming machines 失效
    拉链成型机加热机构

    公开(公告)号：US5698239A

    公开(公告)日：1997-12-16

    申请号：US646743

    申请日：1996-05-03

    申请人： Ray-Long Tsai ,  Joseph Wu

    发明人： Ray-Long Tsai ,  Joseph Wu

    IPC分类号： B29D5/04

    CPC分类号： B29D5/04 ,  Y10S264/40 ,  Y10S425/814

    摘要： A heating mechanism for zipper forming machines includes a mold base, a support seat, a seat cover, a screw sleeve and a heating element. The support seat has a clearance at a central portion and a heat insulation pad is fitted into the clearance for dividing the support seat into a heating area and a cooling area. The heating element is disposed in the heating area and a cooling element is disposed at the cooling area for enhancing heat energy efficiencies and reducing noise.

    摘要翻译： 用于拉链成型机的加热机构包括模具基座，支撑座，座椅盖，螺钉套筒和加热元件。 支撑座在中心部分具有间隙，并且隔热垫装配到间隙中，以将支撑座分成加热区域和冷却区域。 加热元件设置在加热区域中，并且冷却元件设置在冷却区域，以提高热能效率并降低噪音。

    Etching method for reducing bit line coupling in a DRAM
    10.
    发明授权
    Etching method for reducing bit line coupling in a DRAM 失效
    用于减少DRAM中位线耦合的蚀刻方法

    公开(公告)号：US06312983B1

    公开(公告)日：2001-11-06

    申请号：US09426071

    申请日：1999-10-21

    申请人： Joseph Wu ,  Chen-Wei Chen ,  Nien-yu Tsai ,  J. S. Shiao

    发明人： Joseph Wu ,  Chen-Wei Chen ,  Nien-yu Tsai ,  J. S. Shiao

    IPC分类号： H01L218242

    CPC分类号： H01L27/10885 ,  H01L21/76804

    摘要： A method for forming a bit line of a DRAM memory array is disclosed. The method comprises the steps of: forming an interlayer dielectric over the DRAM memory array; etching the interlayer dielectric to form trenches in the interlayer dielectric, the trenches collectively forming a bit line pattern and having tapered side walls; and depositing a conductive material into the trenches to form the bit line.

    摘要翻译： 公开了一种用于形成DRAM存储器阵列的位线的方法。 该方法包括以下步骤：在DRAM存储器阵列上形成层间电介质; 蚀刻层间电介质以在层间电介质中形成沟槽，沟槽共同形成位线图案并具有锥形侧壁; 以及将导电材料沉积到沟槽中以形成位线。