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    Semiconductor device having darlington-connected transistor circuit
    1.
    发明授权
    Semiconductor device having darlington-connected transistor circuit 失效
    具有达林顿连接的晶体管电路的半导体器件

    公开(公告)号：US4769560A

    公开(公告)日：1988-09-06

    申请号：US13793

    申请日：1987-02-12

    Applicant: Keizo Tani ,  Junichi Nakao ,  Eiji Kotani

    Inventor： Keizo Tani ,  Junichi Nakao ,  Eiji Kotani

    IPC: H01L29/73 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/082 ,  H01L29/732 ,  H03F1/32 ,  H03F3/343 ,  H03K3/33 ,  H01L27/02 ,  H03K17/56

    CPC classification number: H03F1/32 ,  H03F3/3435

    Abstract: An additional p-n junction diode, having a forward bias voltage smaller than a forward bias voltage between the base and emitter of a first-stage specific transistor of 3-stage Darlington connected npn transistors, is electrically connected in parallel between a p-type base layer and an n-type collector layer of the specific transistor. The polarities of the p-type and n-type layers of the diode are respectively the same as those of the parallel-connected p-type base and n-type collector layers of the specific transistor.

    Abstract translation: 具有小于三阶段达林顿连接的npn晶体管的第一级特定晶体管的基极和发射极之间的正向偏置电压的正向偏置电压的附加pn结二极管并联电连接在p型基极层 和特定晶体管的n型集电极层。 二极管的p型和n型层的极性分别与特定晶体管的并联p型基极和n型集电极层的极性相同。

    Junction type field effect transistor with source at oxide-gate interface depth to maximize .mu.
    2.
    发明授权
    Junction type field effect transistor with source at oxide-gate interface depth to maximize .mu. 失效
    具有源极的结型场效应晶体管，在氧化物 - 栅极界面深度最大化

    公开(公告)号：US4284998A

    公开(公告)日：1981-08-18

    申请号：US937570

    申请日：1978-08-28

    Applicant: Noboru Fuse ,  Kenichi Muramoto ,  Keizo Tani ,  Masaaki Iwanishi

    Inventor： Noboru Fuse ,  Kenichi Muramoto ,  Keizo Tani ,  Masaaki Iwanishi

    IPC: H01L29/80 ,  H01L29/06 ,  H01L29/772

    CPC classification number: H01L29/7722 ,  H01L29/0653

    Abstract: A junction type field effect transistor comprises a semiconductor layer of one conductivity type acting as a drain region, a source region of said one conductivity type formed to a prescribed depth from the surface of the semiconductor layer, an insulation layer formed to a prescribed depth from the surface of the semiconductor layer to surround the source region, and a gate region of the opposite conductivity type formed in the proximity of the sorce region. The insulation layer and source region are formed to substantially the same depth.

    Abstract translation: 结型场效应晶体管包括用作漏极区的一种导电类型的半导体层，从半导体层的表面形成到规定深度的所述一种导电类型的源极区，形成为规定深度的绝缘层 围绕源极区域的半导体层的表面以及形成在吸附区域附近的相反导电类型的栅极区域。 绝缘层和源极区域形成为基本上相同的深度。

    Joint structure for control cable
    4.
    发明授权
    Joint structure for control cable 失效
    控制电缆接头结构

    公开(公告)号：US5839846A

    公开(公告)日：1998-11-24

    申请号：US628209

    申请日：1996-04-05

    Applicant: Tatsuo Shimada ,  Keizo Tani ,  Tomoyuki Tokunaga ,  Yuichi Tanii ,  Shuichi Hannya ,  Takehiro Kuroda ,  Masao Matsumoto

    Inventor： Tatsuo Shimada ,  Keizo Tani ,  Tomoyuki Tokunaga ,  Yuichi Tanii ,  Shuichi Hannya ,  Takehiro Kuroda ,  Masao Matsumoto

    IPC: B60K20/02 ,  F16C1/14 ,  F16H61/26 ,  F16H61/36 ,  F16C11/10

    CPC classification number: F16C11/04 ,  F16C1/14 ,  F16H61/26 ,  F16C2361/65 ,  F16H61/36 ,  Y10T403/1616 ,  Y10T403/32975 ,  Y10T403/606 ,  Y10T74/2014 ,  Y10T74/206

    Abstract: A joint structure for a control cable includes an annular cable-end member provided on an end of the control cable, a columnar sleeve arranged in the annular cable-end member and a pair of bushes of the same configuration. Each bush includes an annular part, a cylindrical part, a pair of claw parts and a pair of cradle parts. In this arrangement, the cylindrical part, which is made of elastic material, is inserted between the sleeve and the cable-end member, while a pair of claw parts are engaged with the cradle parts of the opposing bush. The sleeve is provided on the side face with a circumferential bead, interposed between leading ends of the opposing bushes. Even if any force is exerted between the cable-end member and the sleeve, no deformation is caused in the cylindrical parts because of its inelasticity, while the bead prevents relative displacement.

    Abstract translation: 用于控制电缆的接头结构包括设置在控制电缆的端部上的环形电缆端部件，布置在环形电缆端部件中的柱状套筒和相同结构的一对衬套。 每个衬套包括环形部分，圆柱形部分，一对爪部分和一对支架部分。 在这种布置中，由弹性材料制成的圆柱形部分插入在套筒和电缆端部件之间，而一对爪部分与相对衬套的托架部件接合。 套筒在侧面上设有周向胎圈，插入在相对衬套的前端之间。 即使在电缆端构件和套筒之间施加任何力，由于其非弹性而不会在圆柱形部件中引起变形，同时胎圈防止相对位移。

    Method of producing a semiconductor device
    5.
    发明授权
    Method of producing a semiconductor device 失效
    半导体装置的制造方法

    公开(公告)号：US4558510A

    公开(公告)日：1985-12-17

    申请号：US592596

    申请日：1984-03-23

    Applicant: Keizo Tani ,  Masahiro Ogasawara

    Inventor： Keizo Tani ,  Masahiro Ogasawara

    IPC: H01L21/56 ,  H01L23/24 ,  H01L23/28 ,  H05K7/00 ,  H05K5/06 ,  H01L23/30

    CPC classification number: H01L21/56 ,  H01L23/24 ,  H05K7/005 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01039

    Abstract: There is provided a method of producing a semiconductor device comprising a protecting silicone gel layer which covers a semiconductor chip and bonding wires for taking electrodes out of this chip, and a resin layer which has a smaller thermal expansion coefficient than that of this silicone gel layer at least part of which contacts the silicone gel layer. This method comprises the steps of: thermally expanding the silicone gel layer until it reaches the product environmental guarantee temperature which comes before the cure acceleration reaction in the resin layer; and completely curing the resin layer while maintaining the volume of the silicone gel layer at the same time, thereby fixedly adhering it with the other parts.

    Abstract translation: 提供一种制造半导体器件的方法，该半导体器件包括覆盖半导体芯片的保护硅凝胶层和用于从该芯片取出电极的接合线，以及具有比该硅凝胶层的热膨胀系数小的热膨胀系数的树脂层 其至少一部分接触硅凝胶层。 该方法包括以下步骤：将硅胶凝胶层热膨胀直到达到在树脂层中固化加速反应之前产生的环境保护温度; 并在同时保持硅凝胶层的体积的同时完全固化树脂层，从而将其与其它部分固定。

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