公开(公告)号：US08050108B2

公开(公告)日：2011-11-01

申请号：US12611589

申请日：2009-11-03

申请人： Kenjiyu Shimogawa ,  Hiroshi Furuta ,  Shunsaku Naga ,  Takayuki Shirai

发明人： Kenjiyu Shimogawa ,  Hiroshi Furuta ,  Shunsaku Naga ,  Takayuki Shirai

IPC分类号： G11C7/10

CPC分类号： G11C7/22 ,  G11C7/08 ,  G11C11/4076 ,  G11C11/4087 ,  G11C11/4091 ,  G11C11/4094 ,  G11C2207/005

摘要： Provided is a destructive readout semiconductor memory device capable of avoiding concentration of a writeback current, in which a switch circuit (24) is provided between each bit line (21) and each sense amplifier (26). In writeback, the switch circuits are turned on at staggered time points. In readout, the switch circuits are turned on to read memory cell data to the sense amplifiers while the sense amplifiers are turned off, and the switch circuits are then turned off once. After that, the sense amplifiers are turned on to amplify the read data. The switch circuits are subsequently divided into groups and turned on again to write back the data amplified by the sense amplifiers to the memory cells. The switch circuits are divided into groups to be turned on at staggered time points during the writeback, to thereby avoid concentration of the writeback current in one time period.

摘要翻译： 提供了能够避免在每个位线（21）和每个读出放大器（26）之间设置开关电路（24）的回写电流的集中的破坏性读出半导体存储器件。 在回写中，开关电路以交错的时间点接通。 在读出时，开关电路被接通以将读出放大器的存储单元数据读取到读出放大器，同时关闭读出放大器，然后关闭开关电路。 之后，读出放大器被打开以放大读取的数据。 开关电路随后被分成组并再次导通以将由读出放大器放大的数据写回存储单元。 开关电路被分成在写入期间以交错的时间点接通的组，从而避免在一个时间段内集中回写电流。

公开(公告)号：US20100110814A1

公开(公告)日：2010-05-06

申请号：US12611589

申请日：2009-11-03

申请人： Kenjiyu Shimogawa ,  Hiroshi Furuta ,  Shunsaku Naga ,  Takayuki Shirai

发明人： Kenjiyu Shimogawa ,  Hiroshi Furuta ,  Shunsaku Naga ,  Takayuki Shirai

IPC分类号： G11C7/06 ,  G11C7/00

CPC分类号： G11C7/22 ,  G11C7/08 ,  G11C11/4076 ,  G11C11/4087 ,  G11C11/4091 ,  G11C11/4094 ,  G11C2207/005

摘要： Provided is a destructive readout semiconductor memory device capable of avoiding concentration of a writeback current, in which a switch circuit (24) is provided between each bit line (21) and each sense amplifier (26). In writeback, the switch circuits are turned on at staggered time points. In readout, the switch circuits are turned on to read memory cell data to the sense amplifiers while the sense amplifiers are turned off, and the switch circuits are then turned off once. After that, the sense amplifiers are turned on to amplify the read data. The switch circuits are subsequently divided into groups and turned on again to write back the data amplified by the sense amplifiers to the memory cells. The switch circuits are divided into groups to be turned on at staggered time points during the writeback, to thereby avoid concentration of the writeback current in one time period.

摘要翻译： 提供了能够避免在每个位线（21）和每个读出放大器（26）之间设置开关电路（24）的回写电流的集中的破坏性读出半导体存储器件。 在回写中，开关电路以交错的时间点接通。 在读出时，开关电路被接通以将读出放大器的存储单元数据读取到读出放大器，同时关闭读出放大器，然后关闭开关电路。 之后，读出放大器被打开以放大读取的数据。 开关电路随后被分成组并再次导通以将由读出放大器放大的数据写回存储单元。 开关电路被分成在写入期间以交错的时间点接通的组，从而避免在一个时间段内集中回写电流。

公开(公告)号：US20100213520A1

公开(公告)日：2010-08-26

申请号：US12656557

申请日：2010-02-03

申请人： Hiroshi Furuta ,  Takayuki Shirai ,  Shunsaku Naga

发明人： Hiroshi Furuta ,  Takayuki Shirai ,  Shunsaku Naga

IPC分类号： H01L27/108 ,  H01L29/92 ,  H01L21/8242

CPC分类号： H01L28/90 ,  H01L21/84 ,  H01L27/0629 ,  H01L27/0805 ,  H01L27/1203 ,  H01L29/785

摘要： Provided is a semiconductor integrated circuit device including a capacitor element with an improved TDDB life. A semiconductor integrated circuit device (1) includes: a first electrode (4) including a first semiconductor layer which protrudes with respect to a plane of a substrate; a side surface insulating film (5) formed on at least a part of a side surface of the first electrode (4); an upper surface insulating film (6) formed on the first electrode (4) and the side surface insulating film (5); and a second electrode (7) which covers the side surface insulating film (5) and the upper surface insulating film (6). The first electrode (4), the side surface insulating film (5), and the second electrode (7) constitute a capacitor element. A thickness of the upper surface insulating film (6) between the first electrode (4) and the second electrode (7) is larger than a thickness of the side surface insulating film (5) between the first electrode (4) and the second electrode (7).

摘要翻译： 提供了一种包括具有改善的TDDB寿命的电容器元件的半导体集成电路器件。 半导体集成电路器件（1）包括：第一电极（4），包括相对于衬底的平面突出的第一半导体层; 形成在所述第一电极（4）的侧面的至少一部分上的侧面绝缘膜（5）; 形成在第一电极（4）和侧面绝缘膜（5）上的上表面绝缘膜（6）; 以及覆盖侧面绝缘膜（5）和上表面绝缘膜（6）的第二电极（7）。 第一电极（4），侧面绝缘膜（5）和第二电极（7）构成电容器元件。 第一电极（4）和第二电极（7）之间的上表面绝缘膜（6）的厚度大于第一电极（4）和第二电极（4）之间的侧表面绝缘膜（5）的厚度 （7）。

公开(公告)号：US08445951B2

公开(公告)日：2013-05-21

申请号：US13407685

申请日：2012-02-28

申请人： Hiroshi Furuta ,  Takayuki Shirai ,  Shunsaku Naga

发明人： Hiroshi Furuta ,  Takayuki Shirai ,  Shunsaku Naga

IPC分类号： H01L27/108 ,  H01L29/94

CPC分类号： H01L28/90 ,  H01L21/84 ,  H01L27/0629 ,  H01L27/0805 ,  H01L27/1203 ,  H01L29/785

摘要： A semiconductor integrated circuit device, includes a first electrode including a first semiconductor layer formed on a substrate, a side surface insulating film formed on at least a part of a side surface of the first electrode, an upper surface insulating film formed on the first electrode and the side surface insulating film, a second electrode which covers the side surface insulating film and the upper surface insulating film, and a fin-type field effect transistor. The first electrode, the side surface insulating film, and the second electrode constitute a capacitor element. A thickness of the upper surface insulating film between the first electrode and the second electrode is larger than a thickness of the side surface insulating film between the first electrode and the second electrode, and the fin-type field effect transistor includes a second semiconductor layer which protrudes with respect to the plane of the substrate.

摘要翻译： 一种半导体集成电路器件，包括：第一电极，包括形成在衬底上的第一半导体层，形成在第一电极的侧表面的至少一部分上的侧表面绝缘膜;形成在第一电极上的上表面绝缘膜 和侧面绝缘膜，覆盖侧面绝缘膜和上表面绝缘膜的第二电极和鳍型场效应晶体管。 第一电极，侧面绝缘膜和第二电极构成电容器元件。 第一电极和第二电极之间的上表面绝缘膜的厚度大于第一电极和第二电极之间的侧表面绝缘膜的厚度，并且鳍式场效应晶体管包括第二半导体层， 相对于基板的平面突出。

公开(公告)号：US20120153370A1

公开(公告)日：2012-06-21

申请号：US13407685

申请日：2012-02-28

申请人： Hiroshi FURUTA ,  Takayuki Shirai ,  Shunsaku Naga

发明人： Hiroshi FURUTA ,  Takayuki Shirai ,  Shunsaku Naga

IPC分类号： H01L27/06

CPC分类号： H01L28/90 ,  H01L21/84 ,  H01L27/0629 ,  H01L27/0805 ,  H01L27/1203 ,  H01L29/785

摘要： A semiconductor integrated circuit device, includes a first electrode including a first semiconductor layer formed on a substrate, a side surface insulating film formed on at least a part of a side surface of the first electrode, an upper surface insulating film formed on the first electrode and the side surface insulating film, a second electrode which covers the side surface insulating film and the upper surface insulating film, and a fin-type field effect transistor. The first electrode, the side surface insulating film, and the second electrode constitute a capacitor element. A thickness of the upper surface insulating film between the first electrode and the second electrode is larger than a thickness of the side surface insulating film between the first electrode and the second electrode, and the fin-type field effect transistor includes a second semiconductor layer which protrudes with respect to the plane of the substrate.

摘要翻译： 一种半导体集成电路器件，包括：第一电极，包括形成在衬底上的第一半导体层，形成在第一电极的侧表面的至少一部分上的侧表面绝缘膜;形成在第一电极上的上表面绝缘膜 和侧面绝缘膜，覆盖侧面绝缘膜和上表面绝缘膜的第二电极和鳍型场效应晶体管。 第一电极，侧面绝缘膜和第二电极构成电容器元件。 第一电极和第二电极之间的上表面绝缘膜的厚度大于第一电极和第二电极之间的侧表面绝缘膜的厚度，鳍型场效应晶体管包括第二半导体层， 相对于基板的平面突出。

公开(公告)号：US20150191849A1

公开(公告)日：2015-07-09

申请号：US14405543

申请日：2013-04-16

申请人： Takayuki SHIRAI ,  Katsunori DANNO

发明人： Takayuki Shirai ,  Katsunori Danno

IPC分类号： C30B19/06 ,  C30B19/08 ,  C30B19/12 ,  C30B29/36

CPC分类号： C30B19/062 ,  C30B9/00 ,  C30B9/06 ,  C30B9/10 ,  C30B17/00 ,  C30B19/02 ,  C30B19/04 ,  C30B19/08 ,  C30B19/10 ,  C30B19/12 ,  C30B29/36

摘要： Provided are an SiC single-crystal ingot containing an SiC single crystal having a low threading dislocation density and low resistivity; an SiC single crystal; and a production method for the SiC single crystal. The SiC single crystal ingot contains a seed crystal and a grown crystal grown by a solution process in which the seed crystal is the base point, the grown crystal of the SiC single crystal ingot containing a nitrogen density gradient layer in which the nitrogen content increases in the direction of growth from the seed crystal.

摘要翻译： 提供一种含有低穿透位错密度和低电阻率的SiC单晶的SiC单晶锭; SiC单晶; 以及SiC单晶的制造方法。 SiC单晶锭含有晶种和通过晶种为基点的溶液工艺生长的生长晶体，含有氮含量增加的氮浓度梯度层的SiC单晶锭的生长晶体 从晶种生长的方向。

公开(公告)号：US4407769A

公开(公告)日：1983-10-04

申请号：US253747

申请日：1981-03-09

申请人： Shozo Harada ,  Kazuo Ito ,  Takayuki Shirai ,  Tetsuya Koide

发明人： Shozo Harada ,  Kazuo Ito ,  Takayuki Shirai ,  Tetsuya Koide

IPC分类号： C04B40/02 ,  C04B41/50 ,  C04B7/02

CPC分类号： C04B40/02 ,  C04B41/50

摘要： This invention is based on the discovery by the inventors that, if a preliminary hydration hardening process and a full-scale hydration hardening process are provided after the molding process, and a process for burning a hardened body of cement at a high temperature is provided between the preliminary and full-scale hardening processes, it is possible to obtain a molded product of cement having a higher mechanical strength than any such product according to any known method including no such burning process.According to this invention, there is provided a method of manufacturing a product of cement having high mechanical strength, which method comprises the steps in sequence of adding water, and if required, glass fibers or other reinforcing material, into a mixture of cement and an aggregate, and kneading the whole completely; molding the kneaded mixture into a desired shape; hardening the molded body preliminarily by hydration; burning the preliminarily hardened body at a high temperature; and hardening the burned body on a full scale by hydration.

摘要翻译： PCT No.PCT / JP80 / 00058 Sec。 371日期1981年3月9日 102（e）1980年3月9日PCT日期1980年4月2日PCT。本发明是基于发明人的发现，如果在成型过程之后提供初步水化硬化工艺和全尺寸水化硬化工艺 并且在初步和全尺寸硬化过程之间提供了用于在高温下燃烧硬化体的水泥的方法，可以根据任何已知的方法获得具有比任何这样的产品更高的机械强度的水泥的模制产品 方法不包括这种燃烧过程。 根据本发明，提供了一种制造具有高机械强度的水泥产品的方法，该方法包括以下步骤：将水和必要时的玻璃纤维或其它增强材料依次加入到水泥和 整体揉捏整体; 将捏合的混合物成型为所需的形状; 预先通过水合硬化成型体; 在高温下燃烧预硬化体; 并通过水合将整个烧焦的身体硬化。

公开(公告)号：US09702057B2

公开(公告)日：2017-07-11

申请号：US14650664

申请日：2013-04-01

申请人： Takayuki Shirai

发明人： Takayuki Shirai

IPC分类号： C30B19/04 ,  C30B19/06 ,  C30B29/36 ,  C30B17/00 ,  C30B19/08 ,  C30B19/10 ,  C30B19/12

CPC分类号： C30B19/062 ,  C30B17/00 ,  C30B19/04 ,  C30B19/067 ,  C30B19/068 ,  C30B19/08 ,  C30B19/106 ,  C30B19/12 ,  C30B29/36

摘要： Provided is a method for producing an n-type SiC single crystal, whereby it is possible to grow an n-type SiC single crystal having a low resistivity at a high speed. A method for producing an n-type SiC single crystal by bringing a SiC seed crystal substrate into contact with a Si—C solution having such a temperature gradient that the temperature gradually decreases from the inside toward the surface, thereby achieving the crystal growth of the n-type SiC single crystal. The method involves adding a nitride to a raw material for forming the Si—C solution or to the Si—C solution.

公开(公告)号：US06845993B2

公开(公告)日：2005-01-25

申请号：US10321795

申请日：2002-12-18

申请人： Takayuki Shirai

发明人： Takayuki Shirai

IPC分类号： B62D5/22 ,  B62D3/12 ,  F16H55/28 ,  F16H57/12

CPC分类号： B62D3/12 ,  F16H55/283 ,  Y10T74/19502 ,  Y10T74/1967

摘要： In a rack and pinion type steering apparatus whose housing includes a pinion accommodating portion, a rack accommodating portion, a radial opening defining a rack guide hole, and a projecting portion which is formed on the side of the rack accommodating portion opposite the rack guide hole. The radial opening is covered by a plug that is fixed by swaging. The projecting portion has a contact surface being received on a jig when the plug is fixed to the housing by swaging. Therefore, the reaction of the swaging from the jig does not directly affect the pinion accommodating portion.

摘要翻译： 在其壳体包括小齿轮容纳部分的齿条和小齿轮型转向装置中，齿条容纳部分，限定齿条引导孔的径向开口和形成在齿条容纳部分的与齿条引导孔相对的一侧的突出部分 。 径向开口由通过型锻固定的塞子覆盖。 当插头通过锻造固定到壳体时，突出部分具有容纳在夹具上的接触表面。 因此，来自夹具的型锻的反应不直接影响小齿轮容纳部。

公开(公告)号：US06492721B1

公开(公告)日：2002-12-10

申请号：US09330080

申请日：1999-06-11

申请人： Takayuki Shirai

发明人： Takayuki Shirai

IPC分类号： H01L2352

CPC分类号： H01L27/0266 ,  H01L2924/0002 ,  H01L2924/00

摘要： A high-voltage signal detecting circuit for use in a semiconductor memory device includes a signal transfer section having first nMOSFET, pMOSFET, second nMOSFET and third nMOSFET serially connected together in this order from a first input terminal to a ground line. The gates of pMOSFET and second and third nMOSFETs are connected to a second input terminal for receiving the supply source potential. A discharge transistor is connected between the first node which connects the pMOSFET and second nMOSFET together and the ground line, to discharge electric charge from the first node before application of the source potential. The discharge section provides a high-speed start-up of the memory device.

摘要翻译： 用于半导体存储器件的高电压信号检测电路包括具有第一nMOSFET，pMOSFET，第二nMOSFET和第三nMOSFET的信号传输部分，从第一输入端子到接地线依次串联连接在一起。 pMOSFET和第二和第三nMOSFET的栅极连接到用于接收电源电位的第二输入端子。 放电晶体管连接在将pMOSFET和第二nMOSFET连接在一起的第一节点与地线之间，以便在施加电源电位之前从第一节点放电电荷。 放电部分提供存储器件的高速启动。