公开(公告)号：US08856632B2

公开(公告)日：2014-10-07

申请号：US13422333

申请日：2012-03-16

申请人： Kenneth Hann ,  Mikko Laulainen

发明人： Kenneth Hann ,  Mikko Laulainen

IPC分类号： G06F11/00 ,  H04J3/06 ,  H04L7/00 ,  H04L7/033 ,  H03L7/08

CPC分类号： H04L7/033 ,  H03L7/08

摘要： A device for controlling frequency synchronization includes a processor for controlling a phase-controlled clock signal to achieve phase-locking with a reference clock signal, and for controlling a frequency-controlled clock signal so as to achieve frequency-locking with the reference clock signal. The processor is also configured to monitor a deviation between the frequency and phase-controlled clock signals, detect a change of circumstances such as temperature changes causing frequency drifting of the frequency-controlled clock signal, and replace or correct the frequency-controlled clock signal with, or on the basis of, the phase-controlled clock signal when both the monitored deviation and the detected change of circumstances show correlation confirming frequency drift of the frequency-controlled clock signal.

摘要翻译： 一种用于控制频率同步的装置包括一个处理器，用于控制相位控制的时钟信号以通过参考时钟信号实现锁相，并且用于控制频率控制的时钟信号，以便利用参考时钟信号实现频率锁定。 处理器还被配置为监视频率和相位控制的时钟信号之间的偏差，检测出导致频率漂移的频率控制时钟信号的温度变化等情况的变化，以及更换或校正频率控制的时钟信号 ，或者基于相位控制的时钟信号，当监视的偏差和检测到的环境变化都显示相关确认频率控制的时钟信号的频率漂移时。

公开(公告)号：US08731003B2

公开(公告)日：2014-05-20

申请号：US12688022

申请日：2010-01-15

申请人： Heikki Laamanen ,  Markus Hurme ,  Kenneth Hann ,  Jonas Lundqvist

发明人： Heikki Laamanen ,  Markus Hurme ,  Kenneth Hann ,  Jonas Lundqvist

IPC分类号： H04J3/06

CPC分类号： H04J3/0641 ,  H04J3/0667 ,  H04J3/0676 ,  H04J3/14

摘要： An arrangement for adjusting a clock signal in a network element of a communications network includes a processor device arranged to produce a control variable containing information about synchronization messages received from at least two other network elements. A situation in which the reception from a sending network element of synchronization messages of a good enough quality ceases will not significantly disturb the clock signal to be adjusted because only part of the control variable used for the adjustment depends on synchronization messages sent by an individual network element. In a preferred arrangement, the reference value of the control variable is changed in response to a situation where the reception from a sending network element of synchronization messages of a good enough quality ceases. Thus it is possible to reduce the change of the difference between the control variable and its reference value which further reduces disturbances caused in the clock signal to be adjusted.

摘要翻译： 用于调整通信网络的网络元件中的时钟信号的装置包括被配置为产生包含关于从至少两个其它网络元件接收的同步消息的信息的控制变量的处理器设备。 由于仅用于调整的控制变量的一部分取决于由各个网络发送的同步消息，否则来自具有足够好的质量的同步消息的发送网络元件的接收停止将不会显着地干扰要调整的时钟信号 元件。 在优选的布置中，控制变量的参考值响应于来自具有足够好质量的同步消息的发送网络元素的接收停止的情况而改变。 因此，可以减小控制变量与其参考值之间的差异的变化，这进一步减少了要调整的时钟信号引起的干扰。

公开(公告)号：US09584137B2

公开(公告)日：2017-02-28

申请号：US13300728

申请日：2011-11-21

申请人： Kenneth Hann

发明人： Kenneth Hann

IPC分类号： H04B10/00 ,  H03L7/07 ,  H04J3/04

CPC分类号： H03L7/07 ,  H04J3/047

摘要： A phase synchronized optical master-slave loop comprises at the slave-end a processor (105) configured to include a first timing signal into a bit stream to be transmitted to the master-end, detect a second timing signal from a bit stream received from the master-end, and calculate a phase difference between a regenerated phase signal and a reference phase signal on the basis of a transmission moment of the first timing signal, a first time-stamp indicating a reception moment of the first timing signal at the master-end, a reception moment of the second timing signal, and a second time-stamp indicating a transmission moment of the second timing signal from the master-end. The processor is configured to read the time stamps from the received bit stream that corresponds to a received light signal according to a reception line-code. Thus, conversion of data format is not necessary for the phase synchronization.

摘要翻译： 相位同步光学主从环包括在从端处的处理器（105），被配置为将第一定时信号包括在要发送到主端的比特流中，从从第一定时信号接收的比特流中检测第二定时信号 并且基于第一定时信号的传输力矩计算再生相位信号和参考相位信号之间的相位差，第一时间戳表示主机上的第一定时信号的接收力矩 -end，第二定时信号的接收时刻，以及指示来自主端的第二定时信号的发送时刻的第二时间戳。 处理器被配置为根据接收线路码从接收到的比特流读取对应于接收到的光信号的时间戳。 因此，数据格式的转换对于相位同步是不必要的。

公开(公告)号：US08806261B2

公开(公告)日：2014-08-12

申请号：US13419478

申请日：2012-03-14

申请人： Kenneth Hann ,  Mikko Laulainen ,  Heikki Laamanen ,  Jonas Lundqvist

发明人： Kenneth Hann ,  Mikko Laulainen ,  Heikki Laamanen ,  Jonas Lundqvist

IPC分类号： G06F1/00 ,  G06F1/12 ,  H04J3/06 ,  H04B1/38 ,  H04L7/00 ,  H04L7/08

CPC分类号： H04J3/0664 ,  H04L7/08

摘要： A device for controlling a clock signal generator includes a processor (101) for forming at least two mutually different control quantities on the basis of reception moments of timing messages such as time stamps, where the reception moments are expressed as time values based on a first clock signal and the timing messages are transmitted in accordance with a second clock signal. The processor also calculates a weighted sum of the control quantities, and controls the clock signal generator with the weighted sum so as to synchronize the first clock signal and the second clock signal. The control quantities may represent, for example, a filtered value of observed phase-errors, a phase-error corresponding to a minimum observed transfer delay, and phase-errors corresponding to a given portion of the delay distribution. Using the weighted sum of the mutually different control quantities improves the utilization of the information content of the timing messages.

摘要翻译： 用于控制时钟信号发生器的装置包括：处理器（101），用于基于诸如时间戳的定时消息的接收时刻形成至少两个相互不同的控制量，其中接收时刻表示为基于第一 时钟信号和定时消息根据第二时钟信号发送。 处理器还计算控制量的加权和，并且以加权和控制时钟信号发生器，以使第一时钟信号和第二时钟信号同步。 控制量可以表示例如观察到的相位误差的滤波值，对应于最小观察到的传输延迟的相位误差，以及对应于延迟分布的给定部分的相位误差。 使用相互不同的控制量的加权和提高了定时消息的信息内容的利用率。

公开(公告)号：US07995623B2

公开(公告)日：2011-08-09

申请号：US11949845

申请日：2007-12-04

申请人： Kenneth Hann ,  Heikki Laamanen ,  Mikko Laulainen

发明人： Kenneth Hann ,  Heikki Laamanen ,  Mikko Laulainen

IPC分类号： H04J3/06 ,  H04L7/00

CPC分类号： H04J3/0664

摘要： A method and system for adjusting a clock signal in a network element of a data network adjusts the clock signal based on difference values formed by received synchronizing messages. Each difference value is a difference of a reception and transmission values of a received synchronizing message. The reception value depends on a cumulated number of periods of the clock signal at a moment of arrival of the synchronizing message. The transmission value depends on a position of the synchronizing message in a chronological transmission order of synchronizing messages. When adjusting, an adjusting effect of the difference values belonging to a lower part of a margin of fluctuation of the difference values is weighted more heavily than that of an upper part. Thus, for clock signal adjustment, that share of information represented by the received synchronizing messages that has the least interference is used, irrespective of the data network load.

摘要翻译： 用于调整数据网络的网络元件中的时钟信号的方法和系统基于由接收到的同步消息形成的差值来调整时钟信号。 每个差值是接收到的同步消息的接收和发送值的差。 接收值取决于同步消息到达时刻的时钟信号的累积数量。 发送值取决于同步消息的位置，按同步消息的时间顺序传输顺序。 当调整时，属于差值的波动余量的下部的差值的调整效果比上部的加权更大。 因此，对于时钟信号调整，使用由接收到的具有最小干扰的同步消息表示的信息份额，而不管数据网络负载如何。

公开(公告)号：US09213317B2

公开(公告)日：2015-12-15

申请号：US12254361

申请日：2008-10-20

申请人： Mikko Laulainen ,  Kenneth Hann

发明人： Mikko Laulainen ,  Kenneth Hann

IPC分类号： H04J3/06 ,  G04G7/00 ,  H04W56/00

CPC分类号： G04G7/00 ,  H04J3/0658 ,  H04J3/0667 ,  H04W56/0035 ,  H04W56/0055

摘要： The invention relates to transferring of a time of day value between network elements of a data transfer network. It has been surprisingly detected that the phase reference signals available to various network elements can be utilized in the synchronization of time of day values between these network elements. In the solution according to the invention, a first network element sends to a second network element a difference variable (401, 402, 403) that indicates how much the timing phase of the time of day value maintained in the first network element differs from the timing phase of the phase reference signal available to the first network element. In the second network element that receives the message, an estimate of the time of day value is formed (404, 405) based on the difference variable and the timing phase of the phase reference signal available to the second network element.

摘要翻译： 本发明涉及在数据传送网络的网元之间传送时间值。 惊奇地发现，可以在各种网络元件之间的时间值的同步中使用可用于各种网络元件的相位参考信号。 在根据本发明的解决方案中，第一网络元件向第二网络元件发送一个差异变量（401,402,403），该差异变量指示在第一网元中保持的时间值的定时相位与 相位参考信号的定时相位可用于第一网络元件。 在接收到该消息的第二网元中，基于第二网元可用的差分变量和相位参考信号的定时相位，形成时间值估计（404,405）。

公开(公告)号：US08279859B2

公开(公告)日：2012-10-02

申请号：US12128008

申请日：2008-05-28

申请人： Kenneth Hann ,  Heikki Laamanen ,  Mikko Laulainen

发明人： Kenneth Hann ,  Heikki Laamanen ,  Mikko Laulainen

IPC分类号： H04L12/66

CPC分类号： H04L7/0008 ,  H04J1/00

摘要： A method and arrangement for transferring synchronizing information in a data transmission system includes modem connections. The arrangement includes a modulator (207) arranged to generate an analog signal (222) modulated by synchronizing information, the frequency spectrum of the signal being located in a frequency range that falls outside the data transmission bands of the modem line connected to the network element. The arrangement includes a switching circuit (208) arranged to connect the analog signal to a data transmission cable (206) that forms part of the modem line connected to a network element. The arrangement includes a second switching circuit (209) arranged to receive the analog signal from a data transmission cable that forms part of the modem line connected to the second network element. The arrangement also includes a regenerator (209-arranged to regenerate the synchronizing information from the analog signal.

摘要翻译： 用于在数据传输系统中传送同步信息的方法和装置包括调制解调器连接。 该装置包括：调制器（207），被配置为产生通过同步信息调制的模拟信号（222），该信号的频谱位于与连接到网络元件的调制解调器线路的数据传输频带之外的频率范围内 。 该装置包括一个开关电路（208），被配置为将模拟信号连接到形成连接到网络元件的调制解调器线路的一部分的数据传输电缆（206）。 该装置包括第二切换电路（209），其被布置为从形成连接到第二网络元件的调制解调器线路的一部分的数据传输电缆接收模拟信号。 该装置还包括再生器（209-布置成从模拟信号再生同步信息）。

公开(公告)号：US07756165B2

公开(公告)日：2010-07-13

申请号：US11898839

申请日：2007-09-17

申请人： Kenneth Hann ,  Mikko Laulainen

发明人： Kenneth Hann ,  Mikko Laulainen

IPC分类号： H04J3/07

CPC分类号： H04L12/6418 ,  H04L47/22 ,  H04L49/9094

摘要： The invention relates to producing data traffic where the time intervals between successive data frames follow a predetermined probability distribution. In the present invention, it is surprisingly discovered that a time interval of a desired length between successive data frames can be produced by setting a certain bit quantity of digital stuffing data, defined on the basis of the target length of the time interval target, in a buffer memory (101), where successive data frames are waiting to be transmitted. The digital stuffing data is set in the buffer memory (101), so that the stuffing data is, in the read-out order, located between successive data frames.

摘要翻译： 本发明涉及产生数据业务，其中连续数据帧之间的时间间隔遵循预定的概率分布。 在本发明中，令人意外地发现，可以通过将基于时间间隔目标的目标长度定义的数字填充数据的特定比特量设置在连续数据帧中的期望长度的时间间隔 缓冲存储器（101），其中连续数据帧正在等待发送。 数字填充数据被设置在缓冲存储器（101）中，使得填充数据以读出顺序位于连续的数据帧之间。

公开(公告)号：US20080101514A1

公开(公告)日：2008-05-01

申请号：US11907810

申请日：2007-10-17

申请人： Mikko Laulainen ,  Kenneth Hann ,  Jorma Kausiala

发明人： Mikko Laulainen ,  Kenneth Hann ,  Jorma Kausiala

IPC分类号： H04L7/00

CPC分类号： H04J3/0661 ,  H04J3/065 ,  H04J3/0667

摘要： The invention relates to a method and an arrangement for transferring timing messages in a digital data transfer system. In a solution according to the invention a timing message is transferred (101, 102, 103) within control data carried in a protocol data unit. The timing message is dependent on a transmission moment of the protocol data unit from a network element of the digital data transfer system. The control data is either a synchronization status message (Ethernet-SSM) carried in an Ethernet-frame, an overhead (OH) of a Synchronous Optical Network-frame (SONET), or an overhead (OH) of a Synchronous Digital Hierarchy-frame (SDH). Therefore, the number of such protocol data units that are dedicated only for timing purposes can be reduced.

摘要翻译： 本发明涉及用于在数字数据传输系统中传送定时消息的方法和装置。 在根据本发明的解决方案中，在协议数据单元中携带的控制数据内传送定时消息（101,102,103）。 定时消息取决于来自数字数据传输系统的网络元件的协议数据单元的传输时刻。 控制数据是以太网帧中承载的同步状态消息（Ethernet-SSM），同步光网络帧（SONET）的开销（OH）或同步数字体系框架的开销（OH） （SDH）。 因此，可以减少专用于定时目的的协议数据单元的数量。

公开(公告)号：US10063334B2

公开(公告)日：2018-08-28

申请号：US15317114

申请日：2015-06-18

申请人： Kenneth Hann ,  Heikki Laamanen

发明人： Kenneth Hann ,  Heikki Laamanen

IPC分类号： H04J3/06 ,  H04W56/00

CPC分类号： H04J3/0641 ,  H04J3/0644 ,  H04J3/0658 ,  H04J3/0667 ,  H04W56/0015 ,  H04W56/002 ,  H04W56/006

摘要： A device and a method for generating a secondary timing signal that is synchronous with a primary timing signal are presented. The method comprises deriving (401) an auxiliary timing signal from an auxiliary signal received at a first site and correcting (402, 403) the timing phase of the auxiliary timing signal so as to obtain the timing phase for the secondary timing signal. The timing phase is corrected with the aid of the following a) a constant phase shift between the auxiliary timing signal and another auxiliary timing signal derived in a second site where both the primary timing signal and the auxiliary signal are available and b) a dynamic phase shift between the other auxiliary timing signal and the primary timing signal at the second site.