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15 条记录 (耗时 0.033 秒)

    Frequency translating repeater with low cost high performance local oscillator architecture
    1.
    发明授权
    Frequency translating repeater with low cost high performance local oscillator architecture 有权
    具有低成本高性能本地振荡器架构的频率转换中继器

    公开(公告)号：US07187904B2

    公开(公告)日：2007-03-06

    申请号：US11143927

    申请日：2005-06-03

    申请人： Kenneth M. Gainey ,  Kevin J. Negus ,  James C. Otto ,  James A. Proctor, Jr.

    发明人： Kenneth M. Gainey ,  Kevin J. Negus ,  James C. Otto ,  James A. Proctor, Jr.

    IPC分类号： H04B7/15

    CPC分类号： H04B7/15528 ,  H04B7/12

    摘要： A frequency translating repeater (120) for use in a time division duplex (TDD) radio protocol communications system includes local oscillator (LO) circuits (210, 310, and 410) to facilitate repeating by providing isolation, reduced phase noise, reduced pulling, and the like. Tunable LOs (441, 442) can be directly coupled to down-converters (413, 414) and up-converters (426, 427) for increased isolation, reduced phase noise, less stringent frequency accuracy, and a reduced potential for pulling.

    摘要翻译： 用于时分双工（TDD）无线电协议通信系统的频率转换中继器（120）包括本地振荡器（LO）电路（210,310和410），以便通过提供隔离，降低的相位噪声，减小的拉取， 等等。 可调谐LO（441,442）可以直接耦合到下变频器（413,414）和上变频器（426,427），以增加隔离度，降低相位噪声，降低频率精度，降低拉电位。

    Hybrid band intelligent backhaul radio
    2.
    发明授权
    Hybrid band intelligent backhaul radio 有权
    混合频带智能回程无线电

    公开(公告)号：US08385305B1

    公开(公告)日：2013-02-26

    申请号：US13448294

    申请日：2012-04-16

    申请人： Kevin J. Negus ,  James A. Proctor, Jr.

    发明人： Kevin J. Negus ,  James A. Proctor, Jr.

    IPC分类号： H04Q7/24

    CPC分类号： H04W72/0453 ,  H04J1/00 ,  H04L5/14 ,  H04W72/0486 ,  H04W76/15 ,  H04W84/042 ,  H04W92/045

    摘要： A hybrid band intelligent backhaul radio (HB-IBR) is disclosed that is a combination of two radios operating in different bands. Embodiments include a dual radio configuration wherein a first radio operates in a non-line of sight (NLOS) radio link configuration and a second ancillary radio operates in a near line of sight or line of sight configuration (n)LOS. For example, the HB-IBR may have an Intelligent Backhaul Radio (IBR) operating in the non-line of sight mode of operation within the 5.8 GHz unlicensed band, and have an ancillary radio link operating in the FCC part 101E band of operation at 60 GHz. A common medium access control (MAC) block may be utilized between the dual radios.

    摘要翻译： 公开了一种混合频带智能回程无线电（HB-IBR），其是在不同频带中操作的两个无线电的组合。 实施例包括双无线电配置，其中第一无线电在非视线（NLOS）无线电链路配置中操作，而第二辅助无线电在近视线或视线配置（n）LOS中操作。 例如，HB-IBR可以具有在5.8GHz无许可频带内工作在非视线操作模式的智能回程无线电（IBR），并且具有在FCC部分101E操作频带中操作的辅助无线电链路 60 GHz。 可以在双无线电之间使用公共介质访问控制（MAC）块。

    Intelligent backhaul radio with zero division duplexing
    3.
    发明授权
    Intelligent backhaul radio with zero division duplexing 有权
    智能回程无线电与零分割双工

    公开(公告)号：US08422540B1

    公开(公告)日：2013-04-16

    申请号：US13609156

    申请日：2012-09-10

    申请人： Kevin J. Negus ,  James A. Proctor, Jr.

    发明人： Kevin J. Negus ,  James A. Proctor, Jr.

    IPC分类号： H04B1/38

    CPC分类号： H04L5/1423 ,  H01Q21/062 ,  H01Q21/24 ,  H01Q21/28 ,  H04B1/38 ,  H04B1/525 ,  H04B1/54 ,  H04B15/00 ,  H04L5/1461 ,  H04W24/02

    摘要： A intelligent backhaul radio is disclosed, which can operate by zero division duplexing for use in PTP or PMP topologies, providing for significant spectrum usage benefits among other benefits. Specific system architectures and structures to enable active cancellation of multiple transmit signals at multiple receivers within a MIMO radio are disclosed. Further disclosed aspects include the adaptive optimization of cancellation parameters or coefficients.

    摘要翻译： 公开了一种智能回程无线电，其可以通过零分割双工来运行以用于PTP或PMP拓扑，从而提供显着的频谱使用益处以及其他益处。 公开了能够在MIMO无线电中的多个接收机处主动取消多个发射信号的具体系统架构和结构。 进一步公开的方面包括消除参数或系数的自适应优化。

    Intelligent backhaul system
    6.
    发明授权
    Intelligent backhaul system 有权
    智能回程系统

    公开(公告)号：US08761100B2

    公开(公告)日：2014-06-24

    申请号：US13271051

    申请日：2011-10-11

    申请人： Kevin J. Negus ,  Kevin J. Duffy

    发明人： Kevin J. Negus ,  Kevin J. Duffy

    IPC分类号： H04W4/00

    CPC分类号： H04W72/0413 ,  G06F8/65 ,  H04B7/0469 ,  H04B7/0691 ,  H04B7/0874 ,  H04L5/14 ,  H04L5/1469 ,  H04L41/0803 ,  H04L45/02 ,  H04L67/34 ,  H04W48/16 ,  H04W72/044 ,  H04W72/08 ,  H04W72/1205 ,  H04W74/04 ,  H04W88/14 ,  H04W92/20

    摘要： A intelligent backhaul system is disclosed to manage and control multiple intelligent backhaul radios within a geographic zone. The intelligent backhaul system includes multiple intelligent backhaul radios (IBRs) that are able to function in both obstructed and unobstructed line of sight propagation conditions, one or more intelligent backhaul controllers (IBCs) connecting the IBRs with other network elements, and an intelligent backhaul management system (IBMS). The IBMS may include a private and/or public server and/or agents in one or more IBRs or IBCs.

    摘要翻译： 公开了一种智能回程系统来管理和控制地理区域内的多个智能回程无线电。 智能回程系统包括能够在障碍和无障碍视线传播条件下工作的多个智能回程无线电（IBR），将IBR与其他网络元件连接的一个或多个智能回程控制器（IBC）和智能回程管理 系统（IBMS）。 IBMS可以在一个或多个IBR或IBC中包括私有和/或公共服务器和/或代理。

    Asymmetric data traffic throughput in CSMA/CA networks
    7.
    发明授权
    Asymmetric data traffic throughput in CSMA/CA networks 有权
    CSMA / CA网络中的不对称数据流量吞吐量

    公开(公告)号：US07035283B2

    公开(公告)日：2006-04-25

    申请号：US09828279

    申请日：2001-04-06

    申请人： Kevin J. Negus

    发明人： Kevin J. Negus

    IPC分类号： H04J3/16 ,  H04L12/413

    CPC分类号： H04W80/00 ,  H04L1/1664 ,  H04L1/1671 ,  H04L12/413 ,  H04L29/06 ,  H04L69/16 ,  H04L69/163 ,  H04L2001/0092 ,  H04W74/0816

    摘要： This application describes a modification to a wireless communication system protocol Medium Access Control layer in which certain short medium access control layer acknowledgments have higher layer acknowledgments appended to them in order to prevent the requirement of a data receiving node needing to contend for the wireless medium under asymmetric data traffic flow.

    摘要翻译： 该应用描述了对无线通信系统协议媒体访问控制层的修改，其中某些短介质访问控制层确认具有附加的更高层确认，以便防止数据接收节点需要在无线介质下进行竞争 数据流量不对称。

    Interleaved time-division demultiplexor
    8.
    发明授权
    Interleaved time-division demultiplexor 失效
    交错时分解复用器

    公开(公告)号：US5150364A

    公开(公告)日：1992-09-22

    申请号：US573550

    申请日：1990-08-24

    申请人： Kevin J. Negus

    发明人： Kevin J. Negus

    IPC分类号： H04J3/04

    CPC分类号： H04J3/047

    摘要： A synchronous, interleaved, time-division 1:M demultiplexor uses M equally-spaced phases of a clock signal having a frequency of B/M to latch M incoming serial data bits (where B is the incoming bit rate and M is an integer power of two equal to or greater than four). Following an input stage of parallel synchronous latches, an intermediate stage of parallel synchronous latches is used in which the intermediate latches are clocked with selected phases of the M-phase clock to latch each bit at a time at least 2/B (i.e., two incoming bit periods) after such bit is received from its respective input latch. Following the intermediate stage of parallel synchronous latches, an output stage of parallel synchronous latches is used in which the output latches are clocked with at least one selected phase of the M-phase clock to latch each bit at a time at least 2/B after such bit is received from its respective intermediate latch.

    摘要翻译： 同步，交错的时分1：M解复用器使用具有B / M频率的时钟信号的M个相等间隔的相位来锁存M个输入串行数据位（其中B是输入比特率，M是整数幂 两个等于或大于四个）。 在并行同步锁存器的输入级之后，使用并行同步锁存器的中间级，其中中间锁存器以M相时钟的选定相位进行计时，以在至少2 / B的时间将每个位锁存（即，两个 在从其相应的输入锁存器接收到该位之后，输入位周期）。 在并行同步锁存器的中间级之后，使用并行同步锁存器的输出级，其中输出锁存器以至少一个M相时钟的选定相位进行计时，以在至少2 / B之后的每个时钟锁存每个位 该位从其各自的中间锁存器接收。

    Interleaved time-division multiplexor with phase-compensated frequency doublers
    9.
    发明授权
    Interleaved time-division multiplexor with phase-compensated frequency doublers 失效
    具有相位补偿频率倍增器的交错时分复用器

    公开(公告)号：US5111455A

    公开(公告)日：1992-05-05

    申请号：US572854

    申请日：1990-08-24

    申请人： Kevin J. Negus

    发明人： Kevin J. Negus

    IPC分类号： H04J3/04

    CPC分类号： H04J3/047

    摘要： A synchronous, interleaved, time-division M:1 multiplexor. Following an input stage of parallel synchronous latches for latching M incoming parallel data bits (where M is an integer power of two equal to or greater than four) is an intermediate stage of parallel synchronous latches. The intermediate latches are clocked with selected phases of an M-phase clock having M equally-spaced phases of a clock signal having a frequency of B/M (where B is the outgoing bit rate) to latch each bit at a time at least 2/B (i.e., two outgoing bit periods) after such bit is received from its respective input latch. A first stage of 2:1 multiplexors, following the intermediate latches and used to begin multiplexing the latched bits, are clocked with selected phases of the M-phase clock to begin multiplexing each bit at a time at least 1/B (i.e., one outgoing bit period) after such bit is received from its respective intermediate latch. Further stages of 2:1 multiplexors complete the multiplexing and are each clocked with clock signals which are successively doubled in frequency at each additional stage of 2:1 multiplexors (e.g., 2B/M, 4B/M, 8B/M, . . . ) and phase compensated so as to align the clock signals with their respective data. The phase-compensated, frequency doubling for each 2:1 multiplexor stage is done by "exclusive-ORing" pairs of quadrature clock signals from the immediately preceding 2:1 multiplexor stage.

    摘要翻译： 同步，交错的时分M：1多路复用器。 在并行同步锁存器的输入级之后，用于锁存M个输入并行数据位（其中M是等于或大于4的2的整数幂）是并行同步锁存器的中间级。 中间锁存器具有M相位时钟的选定相位的时钟，M相的时钟具有具有B / M频率（其中B是输出比特率）的时钟信号的具有M个等间隔相位的M个等时相位，以在至少2个时间锁存每个位 / B（即，两个输出位周期）之后，从其相应的输入锁存器接收该位。 在中间锁存器之后并用于开始复用锁存位的第一级2：1多路复用器以M相时钟的选定相位进行计时，以便每次至少1 / B复用每个位（即一个 输出比特周期）。 2：1多路复用器的进一步阶段完成了多路复用，并且每个时钟信号都是在2：1多路复用器的每个附加级（例如，2B / M，4B / M，8B / M，...， ）并进行相位补偿，以便将时钟信号与它们各自的数据对准。 每个2：1多路复用器级的相位补偿倍频通过“异或”来自紧接在前的2：1多路复用器级的正交时钟信号对进行。