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公开(公告)号:US20140008796A1
公开(公告)日:2014-01-09
申请号:US13934485
申请日:2013-07-03
申请人: Keun-Ho CHOI
发明人: Keun-Ho CHOI
IPC分类号: H01L23/522
CPC分类号: H01L23/5221 , H01L23/3128 , H01L23/49811 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/05553 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48148 , H01L2224/48227 , H01L2224/49113 , H01L2224/4941 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2224/48145 , H01L2924/00 , H01L2924/00012 , H01L2924/014 , H01L2224/05599
摘要: A semiconductor package includes a mounting board including a bonding pad, first and second semiconductor chips sequentially stacked on the mounting board, a first wire connecting a first region of the bonding pad to a chip pad of the first semiconductor chip, and a second wire connecting the first region of the bonding pad to a chip pad of the second semiconductor chip, the second wire having a reverse loop configuration.
摘要翻译: 半导体封装包括安装板,其包括接合焊盘,顺序地堆叠在安装板上的第一和第二半导体芯片,将焊盘的第一区域连接到第一半导体芯片的芯片焊盘的第一引线和连接 所述接合焊盘的第一区域到所述第二半导体芯片的芯片焊盘,所述第二引线具有反向回路配置。