公开(公告)号：US07746457B2

公开(公告)日：2010-06-29

申请号：US12290867

申请日：2008-11-04

申请人： Kiyoshi Imai ,  Makoto Takahashi ,  Shinji Shimizu

发明人： Kiyoshi Imai ,  Makoto Takahashi ,  Shinji Shimizu

IPC分类号： G01J1/42 ,  G01R13/20 ,  H04N7/08

CPC分类号： G01J1/04 ,  G01J1/0418 ,  G01J1/044 ,  G01J1/44 ,  G01J3/02 ,  G01J3/0213 ,  G01J3/0232 ,  G01J3/2803 ,  G01J3/2889

摘要： The present invention provides a light quantity measuring apparatus capable of properly measuring, in short time, light to be measured whose quantity fluctuates periodically. Charges generated and stored in photodiodes during a measurement period are read in a plurality of times. A control unit obtains pixel data according to quantity of the charges generated and stored by the photodiodes in a plurality of storage periods obtained by dividing a measurement period. Further, the control unit adds up the plurality of pieces of pixel data, and calculates pixel data according to the quantities of charges generated and stored by the photodiodes in the measurement period.

摘要翻译： 本发明提供一种光量测量装置，其能够在短时间内适当地测量其量值周期性地波动的待测量的光。 在测量期间产生并存储在光电二极管中的电荷被读取多次。 控制单元根据通过划分测量周期获得的多个存储周期，根据由光电二极管产生和存储的电荷的量来获得像素数据。 此外，控制单元将多个像素数据相加，并根据测量周期中的光电二极管产生和存储的电荷量来计算像素数据。

公开(公告)号：US20090116002A1

公开(公告)日：2009-05-07

申请号：US12290867

申请日：2008-11-04

申请人： Kiyoshi Imai ,  Makoto Takahashi ,  Shinji Shimizu

发明人： Kiyoshi Imai ,  Makoto Takahashi ,  Shinji Shimizu

IPC分类号： G01J1/42

CPC分类号： G01J1/04 ,  G01J1/0418 ,  G01J1/044 ,  G01J1/44 ,  G01J3/02 ,  G01J3/0213 ,  G01J3/0232 ,  G01J3/2803 ,  G01J3/2889

摘要： The present invention provides a light quantity measuring apparatus capable of properly measuring, in short time, light to be measured whose quantity fluctuates periodically. Charges generated and stored in photodiodes during a measurement period are read in a plurality of times. A control unit obtains pixel data according to quantity of the charges generated and stored by the photodiodes in a plurality of storage periods obtained by dividing a measurement period. Further, the control unit adds up the plurality of pieces of pixel data, and calculates pixel data according to the quantities of charges generated and stored by the photodiodes in the measurement period.

摘要翻译： 本发明提供一种光量测量装置，其能够在短时间内适当地测量其量值周期性地波动的待测量的光。 在测量期间产生并存储在光电二极管中的电荷被读取多次。 控制单元根据通过划分测量周期获得的多个存储周期，根据由光电二极管产生和存储的电荷的量来获得像素数据。 此外，控制单元将多个像素数据相加，并根据测量周期中的光电二极管产生和存储的电荷量来计算像素数据。

公开(公告)号：US08537300B2

公开(公告)日：2013-09-17

申请号：US12700760

申请日：2010-02-05

申请人： Yoshio Toriyama ,  Shinji Shimizu ,  Akio Tezuka ,  Masafumi Nagaoka

发明人： Yoshio Toriyama ,  Shinji Shimizu ,  Akio Tezuka ,  Masafumi Nagaoka

IPC分类号： G02F1/1333

CPC分类号： G02F1/133608

摘要： A display device includes a display panel unit and a backlight unit which radiates light toward the display panel. The display panel unit includes a display panel on an upper surface of a box-shaped panel housing which has first projecting portions on side walls of the housing. The backlight unit incorporates a light source in a bottom portion of a box-shaped light source housing which has second projecting portions on side walls of the light source housing. By bringing the first projecting portions and second projecting portions into contact with each other, a distance between the light source of the backlight unit and the display panel can be held. Further, by forming third projecting portions which project further than the first projecting portions on the panel housing, handling of the display panel unit is facilitated.

摘要翻译： 显示装置包括向显示面板照射光的显示面板单元和背光单元。 显示面板单元包括在盒形面板壳体的上表面上的显示面板，其在壳体的侧壁上具有第一突出部分。 背光单元在光源壳体的侧壁上具有在盒形光源壳体的底部中的第二突出部分的光源。 通过使第一突出部和第二突出部彼此接触，可以保持背光单元的光源与显示面板之间的距离。 此外，通过形成比面板壳体上的第一突出部更远的第三突出部，便于显示面板单元的处理。

公开(公告)号：US06503685B1

公开(公告)日：2003-01-07

申请号：US09711082

申请日：2000-11-14

申请人： Shinji Shimizu ,  Yasuyuki Watanabe ,  Yasuhiko Kojima ,  Koji Oe ,  Nansei Tasiro

发明人： Shinji Shimizu ,  Yasuyuki Watanabe ,  Yasuhiko Kojima ,  Koji Oe ,  Nansei Tasiro

IPC分类号： G03C173

CPC分类号： G03F7/202 ,  B41C1/1025 ,  B41C2210/02 ,  B41C2210/04 ,  B41C2210/06 ,  B41C2210/22 ,  B41C2210/24 ,  B41C2210/262 ,  B41M5/26 ,  B41M5/368 ,  C08J3/07 ,  C08J3/12

摘要： A heat-sensitive composition is disclosed which includes a substance which absorbs light and generates heat, an anionic self water-dispersible resin particle having an acid value of 10 to 300 and an average particle diameter of 0.005 to 15 &mgr;m, and a fluorine base surfactant. An original plate for a lithographic printing plate is disclosed which includes an ordinary negative- or positive-type PS plate having coated thereon the heat-sensitive composition. The original plate is image-wise exposed with high energy density light based on digital image information from a computer, subjected to first development with an aqueous alkali solution, flood exposure with active light, a second development with a developer for a negative or a positive, and post-treatment to obtain a printing plate.

摘要翻译： 公开了一种热敏性组合物，其包含吸收光并产生热的物质，酸值为10〜300，平均粒径为0.005〜15μm的阴离子型自分散水性树脂粒子，氟基表面活性剂 。 公开了一种用于平版印刷版的原版，其包括在其上涂覆有热敏组合物的普通负型或正型PS板。 基于来自计算机的数字图像信息，用碱性水溶液进行第一次显影，用活性光进行暴露曝光，用显影剂进行负面或阳性的第二次显影，将原始平板以高能量密度的光图像曝光 ，并进行后处理以获得印版。

公开(公告)号：US06284174B1

公开(公告)日：2001-09-04

申请号：US09424954

申请日：1999-12-06

申请人： Kunihiko Ueda ,  Toshio Nishitani ,  Hiroki Furuta ,  Teruaki Saijo ,  Kanji Saito ,  Hiroshi Kato ,  Hiroshi Ohtani ,  Shinji Shimizu ,  Koji Hashimoto

发明人： Kunihiko Ueda ,  Toshio Nishitani ,  Hiroki Furuta ,  Teruaki Saijo ,  Kanji Saito ,  Hiroshi Kato ,  Hiroshi Ohtani ,  Shinji Shimizu ,  Koji Hashimoto

IPC分类号： D01D110

CPC分类号： D01D4/00 ,  D01D4/02 ,  D01D4/06

摘要： A melt spinning pack, including a pack case, a spinneret having many spinning holes positioned at the bottom of the case, a pack cap having a polymer introducing hole at the center positioned at the top of the case, and a flow arranging plate having many flow arranging holes with restricted portions reduced in cross sectional area compared to the inlets of the holes positioned between the spinneret and the pack cap, satisfying the requirement that the contraction percentage R be 50% or less, respectively contained in the case.

摘要翻译： 一种熔融纺丝组件，包括一个包装盒，一个具有位于壳体底部的许多纺丝孔的喷丝头，一个在壳体顶部位于中心位置处具有聚合物引入孔的包装盖，以及具有许多 与位于喷丝头和包装盖之间的孔的入口相比，具有限制部分的横截面积减小的流动分配孔满足分别包含在壳体中的收缩百分比R为50％或更小的要求。

公开(公告)号：US06281071B1

公开(公告)日：2001-08-28

申请号：US09317999

申请日：1999-05-25

申请人： Jun Murata ,  Yoshitaka Tadaki ,  Isamu Asano ,  Mitsuaki Horiuchi ,  Jun Sugiura ,  Hiroko Kaneko ,  Shinji Shimizu ,  Atsushi Hiraiwa ,  Hidetsugu Ogishi ,  Masakazu Sagawa ,  Masami Ozawa ,  Toshihiro Sekiguchi

发明人： Jun Murata ,  Yoshitaka Tadaki ,  Isamu Asano ,  Mitsuaki Horiuchi ,  Jun Sugiura ,  Hiroko Kaneko ,  Shinji Shimizu ,  Atsushi Hiraiwa ,  Hidetsugu Ogishi ,  Masakazu Sagawa ,  Masami Ozawa ,  Toshihiro Sekiguchi

IPC分类号： H01L218242

CPC分类号： H01L27/105 ,  H01L27/10808

摘要： A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it. In a fifth aspect, the capacitor dielectric film is a silicon nitride film having a silicon oxide layer thereon, the silicon oxide layer being formed by oxidizing a surface layer of the silicon nitride under high pressure. In sixth and seventh aspects, wiring is provided.

摘要翻译： 公开了一种具有开关MISFET的半导体集成电路器件和形成在诸如DRAM的半导体衬底之上的电容器元件。 在本发明的第一方面中，电容器元件连接的开关MISFET的半导体区域的杂质浓度小于外围电路的MISFET的半导体区域的杂质浓度。 在第二方面，Y选择信号线与电容器元件的下电极层重叠。 在第三方面中，通过用于沟道阻挡区域的杂质的扩散，形成至少在电容器元件连接的开关MISFET的半导体区域下方的势垒层。 在第四方面中，电容器元件的电介质膜与其上的电容器电极层共同扩展。 在第五方面中，电容器电介质膜是其上具有氧化硅层的氮化硅膜，通过在高压下氧化氮化硅的表面层而形成氧化硅层。 在第六和第七方面中，提供了布线。

公开(公告)号：US5753550A

公开(公告)日：1998-05-19

申请号：US620867

申请日：1996-03-25

申请人： Jun Murata ,  Yoshitaka Tadaki ,  Isamu Asano ,  Mitsuaki Horiuchi ,  Jun Sugiura ,  Hiroko Kaneko ,  Shinji Shimizu ,  Atsushi Hiraiwa ,  Hidetsugu Ogishi ,  Masakazu Sagawa ,  Masami Ozawa ,  Toshihiro Sekiguchi

发明人： Jun Murata ,  Yoshitaka Tadaki ,  Isamu Asano ,  Mitsuaki Horiuchi ,  Jun Sugiura ,  Hiroko Kaneko ,  Shinji Shimizu ,  Atsushi Hiraiwa ,  Hidetsugu Ogishi ,  Masakazu Sagawa ,  Masami Ozawa ,  Toshihiro Sekiguchi

IPC分类号： H01L27/10 ,  H01L21/8242 ,  H01L27/105 ,  H01L27/108

CPC分类号： H01L27/105 ,  H01L27/10808

摘要： A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, is disclosed. In a first aspect, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In other aspects, a Y-select signal line overlaps the lower electrode layer of the capacitor element; a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region; the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it, the capacitor dielectric film being a silicon nitride film having a silicon oxide layer thereon, the silicon oxide layer being formed by oxidizing a surface layer of the silicon nitride under high pressure; an aluminum wiring layer and a protective (and/or barrier) layer are formed by sputtering in the same vacuum sputtering chamber without breaking the vacuum between forming the layers; and a refractory metal, or a refractory metal silicide, is used as the protective layer for an aluminum wiring containing an added element (e.g., Cu) to prevent migration.

摘要翻译： 公开了一种具有开关MISFET的半导体集成电路器件和形成在半导体衬底上的电容器元件。 在第一方面中，电容器元件所连接的开关MISFET的半导体区域的杂质浓度小于外围电路的MISFET的半导体区域的杂质浓度。 在其他方面，Y选择信号线与电容器元件的下电极层重叠; 至少在与电容器元件连接的开关MISFET的半导体区域下方设置的势垒层通过用于沟道阻挡区域的杂质的扩散而形成; 电容器元件的电介质膜与其上的电容器电极层共同扩展，电容器电介质膜是其上具有氧化硅层的氮化硅膜，氧化硅层通过氧化氮化硅的表面层而形成 在高压下 通过溅射在相同的真空溅射室中形成铝布线层和保护（和/或阻挡层），而不破坏形成层之间的真空; 和难熔金属或难熔金属硅化物用作用于包含添加元素（例如Cu）以防止迁移的铝布线的保护层。

公开(公告)号：US5428556A

公开(公告)日：1995-06-27

申请号：US319055

申请日：1994-10-06

申请人： Yoshio Torizawa ,  Shinji Shimizu ,  Masayuki Okabe

发明人： Yoshio Torizawa ,  Shinji Shimizu ,  Masayuki Okabe

IPC分类号： B23Q17/09 ,  G05B19/4065 ,  B21K5/12

CPC分类号： G05B19/4065 ,  G05B2219/37249 ,  G05B2219/37251 ,  G05B2219/37252 ,  G05B2219/37336 ,  G05B2219/37587 ,  G05B2219/37601

摘要： There is provided an apparatus for predicting a tool life which reports a tool life ratio to an operator or a control device, when a remarkable change of work load values is detected. In a predicted life setting section 122, there is set a percentage of a quantity worked until the detection of the noticeable change of the work load values based on the workable quantity until the breakage of the tool which is regarded as 100%. A predicted residual work quantity calculating section 123 calculates a residual tool life value converted into a parameter at a point of time when an alarm is input from a work load monitoring section 121, on the basis of data of a work quantity accumulating section 120 and the predicted life setting section 122. A predicted residual work quantity outputting section 124 reports the residual tool life value to an operator or a control device. In consequence, when the remarkable change of the work load values has been detected, a ratio of the residual work quantity to the tool life can be reported to the operator or the control device.

摘要翻译： 当检测到工作负载值的显着变化时，提供了一种用于预测工具寿命的装置，其报告与操作者或控制装置的工具寿命比。 在预测寿命设定部122中，设定直到直到作为被认为是100％的工具的断裂为止，直到检测到工作负荷值的显着变化为止的可行性量的工作量的百分比。 预测残留量计算部123基于工作量积存部120的数据，计算从工作负荷监视部121输入报警的时刻转换为参数的剩余刀具寿命值， 预测寿命设定部122.预测残留作业量输出部124向操作者或控制装置报告剩余刀具寿命值。 因此，当检测到工作负荷值的显着变化时，可以向操作者或控制装置报告残留作业量与刀具寿命的比率。

公开(公告)号：US5237528A

公开(公告)日：1993-08-17

申请号：US822325

申请日：1992-01-17

申请人： Hideo Sunami ,  Tokuo Kure ,  Masanobu Miyao ,  Yoshifumi Kawamoto ,  Katsuhiro Shimohigashi ,  Yoshio Sakai ,  Osamu Minato ,  Toshiaki Masuhara ,  Mitsumasa Koyanagi ,  Shinji Shimizu

发明人： Hideo Sunami ,  Tokuo Kure ,  Masanobu Miyao ,  Yoshifumi Kawamoto ,  Katsuhiro Shimohigashi ,  Yoshio Sakai ,  Osamu Minato ,  Toshiaki Masuhara ,  Mitsumasa Koyanagi ,  Shinji Shimizu

IPC分类号： G11C11/404 ,  H01L27/108 ,  H01L29/94

CPC分类号： G11C11/404 ,  H01L27/10829 ,  H01L27/10841 ,  H01L29/945

摘要： A semiconductor memory comprises a capacitor with a data storage portion, and an insulated-gate field-effect transistor. The capacitor is formed by a plate which is made up of the side walls and base of a groove formed in a semiconductor substrate, and by a capacitor electrode formed on the side walls and the base, over an insulation film, and which is connected electrically to the source or drain of the insulated-gate field-effect transistor. Various embodiments are provided for reducing size and preventing leakage between other memory cells, including forming stacked capacitors, forming the transistor over the capacitor, using a silicon-over-insulator arrangement for the transistor, forming a common capacitor plate and providing high impurity layers within the substrate.

摘要翻译： 半导体存储器包括具有数据存储部分的电容器和绝缘栅场效应晶体管。 该电容器由在半导体衬底中形成的沟槽的侧壁和底部以及形成在侧壁和基底上的电容器电极在绝缘膜上形成并且电连接 到绝缘栅场效应晶体管的源极或漏极。 提供了各种实施例，用于减小尺寸并防止其它存储单元之间的泄漏，包括形成叠层电容器，在电容器上形成晶体管，使用用于晶体管的绝缘体上硅布置，形成公共电容器板并提供高杂质层 底物。

公开(公告)号：US5214496A

公开(公告)日：1993-05-25

申请号：US452683

申请日：1989-12-19

申请人： Hideo Sunami ,  Tokuo Kure ,  Masanobu Miyao ,  Yoshifumi Kawamoto ,  Katsuhiro Shimohigashi ,  Yoshio Sakai ,  Osamu Minato ,  Toshiaki Masuhara ,  Mitsumasa Koyanagi ,  Shinji Shimizu

发明人： Hideo Sunami ,  Tokuo Kure ,  Masanobu Miyao ,  Yoshifumi Kawamoto ,  Katsuhiro Shimohigashi ,  Yoshio Sakai ,  Osamu Minato ,  Toshiaki Masuhara ,  Mitsumasa Koyanagi ,  Shinji Shimizu

IPC分类号： G11C11/404 ,  H01L27/108 ,  H01L29/94

CPC分类号： H01L27/10829 ,  G11C11/404 ,  H01L27/10841 ,  H01L29/945

摘要： A semiconductor memory comprises a capacitor with a data storage portion, and an insulated-gate field-effect transistor. The capacitor is formed by a plate which is made up of the side walls and base of a groove formed in a semiconductor substrate, and by a capacitor electrode formed on the side walls and the base, over an insulation film, and which is connected electrically to the source or drain of the insulated-gate field-effect transistor. Various embodiments are provided for reducing size and preventing leakage between other memory cells, including forming stacked capacitors, forming the transistor over the capacitor, using a silicon-over-insulator arrangement for the transistor, forming a common capacitor plate and providing high impurity layers within the substrate.