公开(公告)号：US20140289541A1

公开(公告)日：2014-09-25

申请号：US13848377

申请日：2013-03-21

申请人： Kjeld Svendsen ,  Arun Jangity

发明人： Kjeld Svendsen ,  Arun Jangity

IPC分类号： G06F1/32 ,  H03B28/00 ,  G05F1/46

CPC分类号： G06F1/3296 ,  G06F1/26 ,  G06F1/3206 ,  G06F1/324 ,  H03L3/00 ,  Y02D10/126 ,  Y02D10/172

摘要： Systems and methods are provided that facilitate power management in a processing device. The system contains a power management component and a coupled to the processing device. The power management component determines and input rate and target voltages and/or frequency. The power management component can scale voltages and/or frequencies based on target voltages and/or frequencies. Accordingly, power consumption can be reduced and processing devices can be more efficient.

摘要翻译： 提供了便于处理设备中的电源管理的系统和方法。 该系统包含电源管理组件，并耦合到处理设备。 电源管理组件确定并输入速率和目标电压和/或频率。 电源管理组件可以基于目标电压和/或频率来缩放电压和/或频率。 因此，可以降低功耗，并且处理装置可以更有效率。

公开(公告)号：US07944236B2

公开(公告)日：2011-05-17

申请号：US12855466

申请日：2010-08-12

申请人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

发明人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

IPC分类号： H03K19/173

CPC分类号： G06F13/4022 ,  Y02D10/14 ,  Y02D10/151

摘要： A bus structure providing pipelined busing of data between logic circuits and special-purpose circuits of an integrated circuit, the bus structure including a network of pipelined conductors, and connectors selectively joining the pipelined conductors between the special-purpose circuits, other pipelined connectors, and the logic circuits.

公开(公告)号：US08405418B1

公开(公告)日：2013-03-26

申请号：US13107899

申请日：2011-05-14

申请人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

发明人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

IPC分类号： H03K19/173

CPC分类号： G06F13/4022 ,  Y02D10/14 ,  Y02D10/151

摘要： A bus structure providing pipelined busing of data between logic circuits and special-purpose circuits of an integrated circuit, the bus structure including a network of pipelined conductors, and connectors selectively joining the pipelined conductors between the special-purpose circuits, other pipelined connectors, and the logic circuits.

公开(公告)号：US20210013885A1

公开(公告)日：2021-01-14

申请号：US17033342

申请日：2020-09-25

申请人： Sean R. Atsatt ,  Arun Jangity ,  Thien Le ,  Simon Chong

发明人： Sean R. Atsatt ,  Arun Jangity ,  Thien Le ,  Simon Chong

IPC分类号： H03K19/1776 ,  H03K19/17724 ,  H03K19/17736 ,  H03K3/037

摘要： Systems and methods described herein may relate to providing a dynamically configurable circuitry able to be programed using a microsector granularity. Furthermore, selective partial reconfiguration operations may be performed use write operations to write a new configuration over existing configurations to selectively reprogram a portion of programmable logic. An n-bit data register (e.g., a 1-bit data register) and/or control circuitry receiving data and commands from an access register disposed between portions of programmable logic may enable at least some of the operations described.

公开(公告)号：US09170642B2

公开(公告)日：2015-10-27

申请号：US13848377

申请日：2013-03-21

申请人： Kjeld P. Svendsen ,  Arun Jangity

发明人： Kjeld P. Svendsen ,  Arun Jangity

IPC分类号： G06F1/00 ,  G06F1/04 ,  G06F1/26 ,  G06F1/32 ,  H03L3/00

CPC分类号： G06F1/3296 ,  G06F1/26 ,  G06F1/3206 ,  G06F1/324 ,  H03L3/00 ,  Y02D10/126 ,  Y02D10/172

摘要： Systems and methods are provided that facilitate power management in a processing device. The system contains a power management component and a coupled to the processing device. The power management component determines and input rate and target voltages and/or frequency. The power management component can scale voltages and/or frequencies based on target voltages and/or frequencies. Accordingly, power consumption can be reduced and processing devices can be more efficient.

摘要翻译： 提供了便于处理设备中的电源管理的系统和方法。 该系统包含电源管理组件，并耦合到处理设备。 电源管理组件确定和输入速率和目标电压和/或频率。 电源管理组件可以基于目标电压和/或频率来缩放电压和/或频率。 因此，可以降低功耗，并且处理装置可以更有效率。

公开(公告)号：US07902862B2

公开(公告)日：2011-03-08

申请号：US11901182

申请日：2007-09-14

申请人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

发明人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

IPC分类号： H03K19/173

CPC分类号： G06F13/4022 ,  Y02D10/14 ,  Y02D10/151

摘要： A bus structure providing pipelined busing of data between logic circuits and special-purpose circuits of an integrated circuit, the bus structure including a network of pipelined conductors, and connectors selectively joining the pipelined conductors between the special-purpose circuits, other pipelined connectors, and the logic circuits.

摘要翻译： 总线结构在逻辑电路和集成电路的专用电路之间提供流水线传输数据，总线结构包括流水线导体网络，并且连接器选择性地将流水线导体连接在专用电路，其它流水线连接器和 逻辑电路。

公开(公告)号：US20100306429A1

公开(公告)日：2010-12-02

申请号：US12855466

申请日：2010-08-12

申请人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

发明人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

IPC分类号： G06F13/40 ,  G06F13/42

CPC分类号： G06F13/4022 ,  Y02D10/14 ,  Y02D10/151

摘要： A bus structure providing pipelined busing of data between logic circuits and special-purpose circuits of an integrated circuit, the bus structure including a network of pipelined conductors, and connectors selectively joining the pipelined conductors between the special-purpose circuits, other pipelined connectors, and the logic circuits.

摘要翻译： 总线结构在逻辑电路和集成电路的专用电路之间提供流水线传输数据，总线结构包括流水线导体网络，并且连接器选择性地将流水线导体连接在专用电路，其它流水线连接器和 逻辑电路。

公开(公告)号：US20090073967A1

公开(公告)日：2009-03-19

申请号：US11901182

申请日：2007-09-14

申请人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

发明人： Dana How ,  Godfrey P. D'Souza ,  Malcolm J. Wing ,  Colin N. Murphy ,  Arun Jangity

IPC分类号： H04L12/50

CPC分类号： G06F13/4022 ,  Y02D10/14 ,  Y02D10/151

摘要： A bus structure providing pipelined busing of data between logic circuits and special-purpose circuits of an integrated circuit, the bus structure including a network of pipelined conductors, and connectors selectively joining the pipelined conductors between the special-purpose circuits, other pipelined connectors, and the logic circuits.

摘要翻译： 总线结构在逻辑电路和集成电路的专用电路之间提供流水线传输数据，总线结构包括流水线导体网络，并且连接器选择性地将流水线导体连接在专用电路，其它流水线连接器和 逻辑电路。