公开(公告)号：US20110248268A1

公开(公告)日：2011-10-13

申请号：US13167762

申请日：2011-06-24

申请人： Koji DAIRIKI ,  Takayuki IKEDA ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Satoshi KOBAYASHI

发明人： Koji DAIRIKI ,  Takayuki IKEDA ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Satoshi KOBAYASHI

IPC分类号： H01L29/786

CPC分类号： H01L29/78618 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78696

摘要： To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

摘要翻译： 为了改善薄膜晶体管的导通电流和截止电流的问题，薄膜晶体管包括一对杂质半导体层，赋予一种导电类型的杂质元素，在其间具有间隔; 在所述栅极绝缘层上与所述栅电极和添加了赋予一种导电类型的杂质元素的所述一对杂质半导体层中的一个重叠的导电层; 以及非晶半导体层，其被连续地设置在赋予一种导电类型的杂质元素的一对杂质半导体层之间，使得非晶半导体层从导电层延伸到栅极绝缘层上并且接触 同时添加赋予一种导电类型的杂质元素的一对杂质半导体层。

公开(公告)号：US20090218568A1

公开(公告)日：2009-09-03

申请号：US12391398

申请日：2009-02-24

申请人： Koji DAIRIKI ,  Takayuki IKEDA ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Satoshi KOBAYASHI

发明人： Koji DAIRIKI ,  Takayuki IKEDA ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Satoshi KOBAYASHI

IPC分类号： H01L29/786 ,  H01L33/00

CPC分类号： H01L29/78618 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78696

摘要： To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

摘要翻译： 为了改善薄膜晶体管的导通电流和截止电流的问题，薄膜晶体管包括一对杂质半导体层，赋予一种导电类型的杂质元素，在其间具有间隔; 在所述栅极绝缘层上与所述栅电极和添加了赋予一种导电类型的杂质元素的所述一对杂质半导体层中的一个重叠的导电层; 以及非晶半导体层，其被连续地设置在赋予一种导电类型的杂质元素的一对杂质半导体层之间，使得非晶半导体层从导电层延伸到栅极绝缘层上并且接触 同时添加赋予一种导电类型的杂质元素的一对杂质半导体层。

公开(公告)号：US20090218572A1

公开(公告)日：2009-09-03

申请号：US12390954

申请日：2009-02-23

申请人： Koji DAIRIKI ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Shunpei YAMAZAKI ,  Hiromichi GODO ,  Daisuke KAWAE ,  Satoshi KOBAYASHI

发明人： Koji DAIRIKI ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Shunpei YAMAZAKI ,  Hiromichi GODO ,  Daisuke KAWAE ,  Satoshi KOBAYASHI

IPC分类号： H01L33/00 ,  H01L29/786

CPC分类号： H01L29/78609 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78618 ,  H01L29/78669

摘要： A thin-film transistor in which problems with ON-state current and OFF-state current are solved, and a thin-film transistor capable of high-speed operation. The thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions, provided with a space therebetween so as to be overlapped with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of semiconductor layers in which an impurity element which serves as an acceptor is added, overlapped over the gate insulating layers with the gate electrode and the impurity semiconductor layers, and disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer being in contact with the gate insulating layer and the pair of semiconductor layers and extended between the pair of semiconductor layers.

摘要翻译： 解决了导通状态电流和截止电流的问题的薄膜晶体管，以及能够进行高速运转的薄膜晶体管。 薄膜晶体管包括一对杂质半导体层，其中添加赋予一种导电类型的杂质元素以形成源极和漏极区域，其间具有间隔，以便与具有栅极绝缘层的栅电极重叠 插入在栅电极和杂质半导体层之间; 添加作为受体的杂质元素的一对半导体层，与栅极电极和杂质半导体层重叠在栅极绝缘层上，并且在沟道长度方向上间隔设置; 以及与所述栅绝缘层和所述一对半导体层接触并在所述一对半导体层之间延伸的非晶半导体层。

公开(公告)号：US20090218576A1

公开(公告)日：2009-09-03

申请号：US12390144

申请日：2009-02-20

申请人： Koji DAIRIKI ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Shunpei YAMAZAKI ,  Hiromichi GODO ,  Daisuke KAWAE ,  Satoshi KOBAYASHI

发明人： Koji DAIRIKI ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Shunpei YAMAZAKI ,  Hiromichi GODO ,  Daisuke KAWAE ,  Satoshi KOBAYASHI

IPC分类号： H01L33/00 ,  H01L29/786

CPC分类号： H01L27/1214 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765

摘要： A thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions so as to be overlapped at least partly with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of conductive layers which is overlapped over the gate insulating layers at least partly with the gate electrode and the impurity semiconductor layers, and is disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer which is in contact with the gate insulating layer and the pair of conductive layers and is extended between the pair of conductive layers.

摘要翻译： 薄膜晶体管包括一对杂质半导体层，其中添加赋予一种导电类型的杂质元素以形成源极区和漏极区，以至少部分地与栅电极重叠，栅极绝缘层介于 栅电极和杂质半导体层; 一对导电层，其至少部分地与所述栅极电极和所述杂质半导体层重叠在所述栅极绝缘层上方，并且在沟道长度方向上间隔开; 以及与所述栅极绝缘层和所述一对导电层接触并在所述一对导电层之间延伸的非晶半导体层。

公开(公告)号：US20120132719A1

公开(公告)日：2012-05-31

申请号：US13368380

申请日：2012-02-08

申请人： Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Masami ENDO ,  Hiroki DEMBO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Munehiro KOZUMA

发明人： Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Masami ENDO ,  Hiroki DEMBO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Munehiro KOZUMA

IPC分类号： G06K19/073

CPC分类号： G06K19/07749 ,  G06K7/0008 ,  G06K19/0716 ,  G06K2017/0045

摘要： A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost.

摘要翻译： 半导体器件具有电源电路，该电源电路具有从无线信号产生电源电压的功能，以及具有通过A / D转换电压来检测无线信号的强度的功能的A / D转换电路 由无线信号产生。 这能够提供不需要更换电池的半导体器件，其物理形状和质量几乎没有限制，并且具有检测物理位置的功能。 通过使用形成在塑料基板上的薄膜晶体管形成半导体器件，可以以低成本提供具有物理形状的灵活性和检测物理位置的功能的轻量级的半导体器件。

公开(公告)号：US20110261864A1

公开(公告)日：2011-10-27

申请号：US13177583

申请日：2011-07-07

申请人： Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Masami ENDO ,  Hiroki DEMBO ,  Daisuke KAWAE ,  Takayuki INOUE

发明人： Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Masami ENDO ,  Hiroki DEMBO ,  Daisuke KAWAE ,  Takayuki INOUE

IPC分类号： H04B1/56

CPC分类号： G06K19/07749

摘要： In a case where an ASK method is used for a communication method between a semiconductor device and a reader/writer, the amplitude of a radio signal is changed by data transmitted from the semiconductor device to the reader/writer when data is not transmitted from the reader/writer to the semiconductor device. Therefore, in some cases, the semiconductor device mistakes data transmitted from the semiconductor device itself for data transmitted from the reader/writer to the semiconductor device. The semiconductor device includes an antenna circuit, a transmission circuit, a reception circuit, and an arithmetic processing circuit. The antenna circuit transmits and receives a radio signal. The transmission circuit outputs to the reception circuit a signal showing whether or not the antenna circuit is transmitting the radio signal.

摘要翻译： 在使用ASK方式进行半导体装置与读取器/写入器之间的通信方式的情况下，通过从半导体装置发送到读取器/写入器的数据，无线信号的振幅由数据不从 读取器/写入器到半导体器件。 因此，在某些情况下，半导体器件将从半导体器件本身发送的数据错误地从读取器/写入器发送到半导体器件的数据。 半导体器件包括天线电路，发送电路，接收电路和运算处理电路。 天线电路发送和接收无线电信号。 发送电路向接收电路输出表示天线电路是否正在发送无线信号的信号。

公开(公告)号：US20100032679A1

公开(公告)日：2010-02-11

申请号：US12504897

申请日：2009-07-17

申请人： Daisuke KAWAE ,  Yoshiyuki KUROKAWA ,  Hidekazu MIYAIRI

发明人： Daisuke KAWAE ,  Yoshiyuki KUROKAWA ,  Hidekazu MIYAIRI

IPC分类号： H01L33/00

CPC分类号： H01L29/78696 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78645

摘要： A thin film transistor whose threshold voltage can be controlled and which has a favorable switching characteristic is provided. The thin film transistor includes a first gate electrode layer; a semiconductor layer; a first gate insulating layer provided between the first gate electrode layer and the semiconductor layer; source electrode and drain electrode layers which are provided over the semiconductor layer; a conductive layer covered by the first gate insulating layer and the semiconductor layer and provided so as to overlap with part of the first gate electrode layer; a second gate insulating layer provided so as to cover at least a back channel portion of the semiconductor layer; and a second gate electrode layer provided over the second gate insulating layer so as to overlap with the back channel portion of the semiconductor layer.

摘要翻译： 提供了可以控制阈值电压并具有良好的开关特性的薄膜晶体管。 薄膜晶体管包括第一栅电极层; 半导体层; 设置在所述第一栅极电极层和所述半导体层之间的第一栅极绝缘层; 源电极和漏极电极层，设置在半导体层上; 由第一栅极绝缘层和半导体层覆盖的导电层，并且设置成与第一栅极电极层的一部分重叠; 第二栅极绝缘层，设置成覆盖半导体层的至少后沟道部分; 以及第二栅极电极层，设置在所述第二栅极绝缘层上方以与所述半导体层的所述后部沟道部重叠。

公开(公告)号：US20090236600A1

公开(公告)日：2009-09-24

申请号：US12398295

申请日：2009-03-05

申请人： Shunpei YAMAZAKI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Hidekazu MIYAIRI

发明人： Shunpei YAMAZAKI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Hidekazu MIYAIRI

IPC分类号： H01L29/04

CPC分类号： H01L29/78696 ,  H01L29/04 ,  H01L29/66765

摘要： A thin film transistor is provided, which includes a gate insulating layer covering a gate electrode, a microcrystalline semiconductor layer provided over the gate insulating layer, an amorphous semiconductor layer overlapping the microcrystalline semiconductor layer and the gate insulating layer, and a pair of impurity semiconductor layers which are provided over the amorphous semiconductor layer and to which an impurity element imparting one conductivity type is added to form a source region and a drain region. The gate insulating layer has a step adjacent to a portion in contact with an end portion of the microcrystalline semiconductor layer. A second thickness of the gate insulating layer in a portion outside the microcrystalline semiconductor layer is smaller than a first thickness thereof in a portion in contact with the microcrystalline semiconductor layer.

摘要翻译： 提供一种薄膜晶体管，其包括覆盖栅极的栅极绝缘层，设置在栅极绝缘层上的微晶半导体层，与微晶半导体层和栅极绝缘层重叠的非晶半导体层，以及一对杂质半导体 提供在非晶半导体层上并且添加赋予一种导电类型的杂质元素以形成源区和漏区的层。 栅极绝缘层具有与微晶半导体层的端部接触的部分相邻的台阶。 在与微晶半导体层接触的部分中，微晶半导体层外部的栅极绝缘层的第二厚度小于其第一厚度。

公开(公告)号：US20120081186A1

公开(公告)日：2012-04-05

申请号：US13316808

申请日：2011-12-12

申请人： Daisuke KAWAE ,  Masami ENDO ,  Yoshiyuki KUROKAWA ,  Takayuki IKEDA

发明人： Daisuke KAWAE ,  Masami ENDO ,  Yoshiyuki KUROKAWA ,  Takayuki IKEDA

IPC分类号： H03K3/03

CPC分类号： H03K3/0315 ,  G06F1/04 ,  G06K19/07749 ,  H03K2005/00045 ,  H03K2005/00084

摘要： A semiconductor device includes an antenna circuit for receiving a wireless signal, a power supply circuit generating power by the wireless signal received by the antenna circuit, and a clock generation circuit to which power is supplied. The clock generation circuit includes a ring oscillator which self-oscillates and a frequency divider which adjusts frequency of an output signal of the ring oscillator in an appropriate range. A digital circuit portion is driven by a clock having high frequency accuracy, so that a malfunction such as an incorrect operation or no response is prevented.

摘要翻译： 半导体器件包括用于接收无线信号的天线电路，通过由天线电路接收的无线信号产生电力的电源电路以及供给电力的时钟产生电路。 时钟发生电路包括自振荡的环形振荡器和将环形振荡器的输出信号的频率调整到适当范围的分频器。 数字电路部分由具有高频精度的时钟驱动，从而防止诸如错误操作或不响应的故障。

公开(公告)号：US20090090909A1

公开(公告)日：2009-04-09

申请号：US12243085

申请日：2008-10-01

申请人： Shunpei YAMAZAKI ,  Yoshiyuki KUROKAWA ,  Daisuke KAWAE ,  Satoshi KOBAYASHI

发明人： Shunpei YAMAZAKI ,  Yoshiyuki KUROKAWA ,  Daisuke KAWAE ,  Satoshi KOBAYASHI

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L29/4908 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78696

摘要： To improve field effect mobility of an inverted-staggered TFT using amorphous silicon. In an inverted-staggered TFT, a thin amorphous semiconductor layer which is made to have n-type conductivity is formed between a gate insulating film and an amorphous semiconductor layer. By depositing an amorphous semiconductor layer after a substrate over which up to a gate insulating film is formed is exposed to an atmosphere which contains a phosphine gas in a small amount, an amorphous semiconductor layer which contains phosphorus is formed during the early stage of deposition of the amorphous semiconductor layer. The thus obtained amorphous semiconductor layer has the concentration peak of phosphorus around the surface of the gate insulating film.

摘要翻译： 为了提高使用非晶硅的反交错TFT的场效应迁移率。 在反交错TFT中，在栅极绝缘膜和非晶半导体层之间形成具有n型导电性的薄的非晶半导体层。 通过在其上形成至多栅极绝缘膜的基板之后沉积非晶半导体层，暴露于含有少量磷化氢气体的气氛中，在沉积的早期阶段形成含有磷的非晶半导体层 非晶半导体层。 由此获得的非晶半导体层具有围绕栅极绝缘膜的表面的磷的浓度峰值。