THIN-FILM TRANSISTOR AND DISPLAY DEVICE
    1.
    发明申请
    THIN-FILM TRANSISTOR AND DISPLAY DEVICE 有权
    薄膜晶体管和显示器件

    公开(公告)号:US20090218572A1

    公开(公告)日:2009-09-03

    申请号:US12390954

    申请日:2009-02-23

    IPC分类号: H01L33/00 H01L29/786

    摘要: A thin-film transistor in which problems with ON-state current and OFF-state current are solved, and a thin-film transistor capable of high-speed operation. The thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions, provided with a space therebetween so as to be overlapped with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of semiconductor layers in which an impurity element which serves as an acceptor is added, overlapped over the gate insulating layers with the gate electrode and the impurity semiconductor layers, and disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer being in contact with the gate insulating layer and the pair of semiconductor layers and extended between the pair of semiconductor layers.

    摘要翻译: 解决了导通状态电流和截止电流的问题的薄膜晶体管,以及能够进行高速运转的薄膜晶体管。 薄膜晶体管包括一对杂质半导体层,其中添加赋予一种导电类型的杂质元素以形成源极和漏极区域,其间具有间隔,以便与具有栅极绝缘层的栅电极重叠 插入在栅电极和杂质半导体层之间; 添加作为受体的杂质元素的一对半导体层,与栅极电极和杂质半导体层重叠在栅极绝缘层上,并且在沟道长度方向上间隔设置; 以及与所述栅绝缘层和所述一对半导体层接触并在所述一对半导体层之间延伸的非晶半导体层。

    THIN-FILM TRANSISTOR AND DISPLAY DEVICE
    2.
    发明申请
    THIN-FILM TRANSISTOR AND DISPLAY DEVICE 有权
    薄膜晶体管和显示器件

    公开(公告)号:US20090218576A1

    公开(公告)日:2009-09-03

    申请号:US12390144

    申请日:2009-02-20

    IPC分类号: H01L33/00 H01L29/786

    摘要: A thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions so as to be overlapped at least partly with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of conductive layers which is overlapped over the gate insulating layers at least partly with the gate electrode and the impurity semiconductor layers, and is disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer which is in contact with the gate insulating layer and the pair of conductive layers and is extended between the pair of conductive layers.

    摘要翻译: 薄膜晶体管包括一对杂质半导体层,其中添加赋予一种导电类型的杂质元素以形成源极区和漏极区,以至少部分地与栅电极重叠,栅极绝缘层介于 栅电极和杂质半导体层; 一对导电层,其至少部分地与所述栅极电极和所述杂质半导体层重叠在所述栅极绝缘层上方,并且在沟道长度方向上间隔开; 以及与所述栅极绝缘层和所述一对导电层接触并在所述一对导电层之间延伸的非晶半导体层。

    THIN FILM TRANSISOTR AND DISPLAY DEVICE
    3.
    发明申请
    THIN FILM TRANSISOTR AND DISPLAY DEVICE 有权
    薄膜透镜和显示器件

    公开(公告)号:US20090218568A1

    公开(公告)日:2009-09-03

    申请号:US12391398

    申请日:2009-02-24

    IPC分类号: H01L29/786 H01L33/00

    摘要: To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

    摘要翻译: 为了改善薄膜晶体管的导通电流和截止电流的问题,薄膜晶体管包括一对杂质半导体层,赋予一种导电类型的杂质元素,在其间具有间隔; 在所述栅极绝缘层上与所述栅电极和添加了赋予一种导电类型的杂质元素的所述一对杂质半导体层中的一个重叠的导电层; 以及非晶半导体层,其被连续地设置在赋予一种导电类型的杂质元素的一对杂质半导体层之间,使得非晶半导体层从导电层延伸到栅极绝缘层上并且接触 同时添加赋予一种导电类型的杂质元素的一对杂质半导体层。

    THIN FILM TRANSISTOR AND DISPLAY DEVICE
    4.
    发明申请
    THIN FILM TRANSISTOR AND DISPLAY DEVICE 有权
    薄膜晶体管和显示器件

    公开(公告)号:US20110248268A1

    公开(公告)日:2011-10-13

    申请号:US13167762

    申请日:2011-06-24

    IPC分类号: H01L29/786

    摘要: To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

    摘要翻译: 为了改善薄膜晶体管的导通电流和截止电流的问题,薄膜晶体管包括一对杂质半导体层,赋予一种导电类型的杂质元素,在其间具有间隔; 在所述栅极绝缘层上与所述栅电极和添加了赋予一种导电类型的杂质元素的所述一对杂质半导体层中的一个重叠的导电层; 以及非晶半导体层,其被连续地设置在赋予一种导电类型的杂质元素的一对杂质半导体层之间,使得非晶半导体层从导电层延伸到栅极绝缘层上并且接触 同时添加赋予一种导电类型的杂质元素的一对杂质半导体层。

    THIN FILM TRANSISTOR
    5.
    发明申请
    THIN FILM TRANSISTOR 有权
    薄膜晶体管

    公开(公告)号:US20100127261A1

    公开(公告)日:2010-05-27

    申请号:US12467005

    申请日:2009-05-15

    IPC分类号: H01L29/786

    摘要: The thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode, an amorphous semiconductor layer over the gate insulating layer, a semiconductor layer including an impurity element imparting one conductivity type over the amorphous semiconductor layer. The amorphous semiconductor layer comprises an NH radical. Defects of the amorphous semiconductor layer are reduced by cross-linking dangling bonds with the NH radical in the amorphous semiconductor layer.

    摘要翻译: 薄膜晶体管包括在具有绝缘表面的衬底上,覆盖栅电极的栅极绝缘层,栅极绝缘层上的非晶半导体层,包括在非晶半导体层上赋予一种导电类型的杂质元素的半导体层。 非晶半导体层包含NH自由基。 通过与非晶半导体层中的NH自由基交联悬挂键来减少非晶半导体层的缺陷。

    THIN FILM TRANSISTOR
    6.
    发明申请
    THIN FILM TRANSISTOR 有权
    薄膜晶体管

    公开(公告)号:US20090321737A1

    公开(公告)日:2009-12-31

    申请号:US12490447

    申请日:2009-06-24

    IPC分类号: H01L29/04

    摘要: A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

    摘要翻译: 至少在源区和漏区侧,薄膜晶体管包括作为缓冲层的半导体层,该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。 与在沟道形成区域中包含非晶半导体的薄膜晶体管相比,可以提高薄膜晶体管的导通电流。 此外,与在沟道形成区域中包含微晶半导体的薄膜晶体管相比,可以减小薄膜晶体管的截止电流。

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    9.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20120064677A1

    公开(公告)日:2012-03-15

    申请号:US13225703

    申请日:2011-09-06

    IPC分类号: H01L21/336

    摘要: Provided is a method for manufacturing a semiconductor device with fewer masks and in a simple process. A gate electrode is formed. A gate insulating film, a semiconductor film, an impurity semiconductor film, and a conductive film are stacked in this order, covering the gate electrode. A source electrode and a drain electrode are formed by processing the conductive film. A source region, a drain region, and a semiconductor layer, an upper part of a portion of which does not overlap with the source region and the drain region is removed, are formed by processing the upper part of the semiconductor film, while the impurity semiconductor film is divided. A passivation film over the gate insulating film, the semiconductor layer, the source region, the drain region, the source electrode, and the drain electrode are formed. An etching mask is formed over the passivation film. At least the passivation film and the semiconductor layer are processed to have an island shape while an opening reaching the source electrode or the drain electrode is formed, with the use of the etching mask. The etching mask is removed. A pixel electrode is formed over the gate insulating film and the passivation film.

    摘要翻译: 提供一种用于制造具有较少掩模的半导体器件的方法,并且在简单的过程中。 形成栅电极。 依次层叠栅绝缘膜,半导体膜,杂质半导体膜和导电膜,覆盖栅电极。 通过处理导电膜形成源电极和漏电极。 通过处理半导体膜的上部,形成源区域,漏极区域和半导体层,其部分的上部不与源极区域和漏极区域重叠,而杂质 半导体薄膜被划分。 形成栅极绝缘膜,半导体层,源极区域,漏极区域,源极电极和漏极电极之后的钝化膜。 在钝化膜上形成蚀刻掩模。 通过使用蚀刻掩模,至少钝化膜和半导体层被加工成具有岛状,同时形成到达源电极或漏电极的开口。 去除蚀刻掩模。 在栅极绝缘膜和钝化膜上形成像素电极。

    THIN FILM TRANSISTOR
    10.
    发明申请
    THIN FILM TRANSISTOR 有权
    薄膜晶体管

    公开(公告)号:US20090267068A1

    公开(公告)日:2009-10-29

    申请号:US12429486

    申请日:2009-04-24

    IPC分类号: H01L29/786

    摘要: The thin film transistor includes a gate insulating layer covering a gate electrode, over a substrate having an insulating surface; a semiconductor layer forming a channel formation region, in which a plurality of crystal regions is included in an amorphous structure; an impurity semiconductor layer imparting one conductivity type which forms a source region and a drain region; and a buffer layer formed from an amorphous semiconductor, which is located between the semiconductor layer and the impurity semiconductor layer. The thin film transistor includes the crystal region which includes minute crystal grains and inverted conical or inverted pyramidal grain each of which grows approximately radially from a position away from an interface between the gate insulating layer and the semiconductor layer toward a direction in which the semiconductor layer is deposited in a region which does not reach the impurity semiconductor layer.

    摘要翻译: 薄膜晶体管包括覆盖栅电极的栅极绝缘层,在具有绝缘表面的基板上; 形成在非晶结构中包含多个晶体区域的沟道形成区域的半导体层; 赋予形成源极区域和漏极区域的一种导电型的杂质半导体层; 以及由位于半导体层和杂质半导体层之间的非晶半导体形成的缓冲层。 薄膜晶体管包括晶体区域,其包括微小晶粒和倒圆锥形或倒棱锥晶粒,其每个从远离栅极绝缘层和半导体层之间的界面的位置朝向半导体层的方向大致径向地生长 沉积在不到达杂质半导体层的区域中。