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公开(公告)号：US06538653B1
公开(公告)日：2003-03-25
申请号：US08625241
申请日：1996-04-01
IPC分类号： G06T340
摘要： A graphic processing system has a processor for managing a display area and a character font area both included within an address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.
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公开(公告)号：US5751930A
公开(公告)日：1998-05-12
申请号：US213820
申请日：1994-03-16
IPC分类号： G09G5/40 , G06F12/00 , G09G1/02 , G09G1/06 , G09G1/16 , G09G5/22 , G09G5/24 , G09G5/26 , G09G5/36 , G09G5/38 , G09G5/39 , G09G5/393 , G09G5/399 , G06T3/40 , G06T3/60
摘要： A graphic processing system for text display which includes a data processing unit, composed of a memory and a processing unit, for creating character code information, and a graphic data processing unit, composed of a graphic data processor and a frame buffer, for creating pixel information. The text display is performed by creating character code information in the data processing unit, supplying the character code information from the data processing unit to the graphic data processor, creating addresses on the frame buffer corresponding to the character code information by the graphic data processor, reading out a character font from a second area of the frame buffer using the created addresses, writing the read-out character font in a predetermined position of a first area of the frame buffer, and outputting the display data at the first area of the frame buffer to a display unit.
摘要翻译： 一种用于文本显示的图形处理系统，包括由用于创建字符代码信息的存储器和处理单元组成的数据处理单元，以及由图形数据处理器和帧缓冲器组成的用于创建像素的图形数据处理单元 信息。 通过在数据处理单元中产生字符代码信息，从数据处理单元向图形数据处理器提供字符代码信息，通过图形数据处理器创建对应于字符代码信息的帧缓冲器上的地址来执行文本显示， 使用所创建的地址从帧缓冲器的第二区域读出字符字体，将读出的字符字体写入帧缓冲器的第一区域的预定位置，并在帧的第一区域输出显示数据 缓冲到显示单元。
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公开(公告)号：US06697070B1
公开(公告)日：2004-02-24
申请号：US09454590
申请日：1999-12-07
IPC分类号： G06T1100
摘要： A graphic processing system has a processor for managing a display area and a character font area both include within an are disposed in the address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.
摘要翻译： 图形处理系统具有用于管理显示区域的处理器和包括在地址空间内的字符字体区域。 从指示通过系统的数据总线传送的字符的编码信息中，处理器生成相应字符的字符字体图案已被存储的地址，并将该字符字体图案转移到显示区域上的预定位置。 图形处理系统实现了字体的高速发展。
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4.发明授权Graphic processing system for displaying characters and pictures at high speed 失效用于高速显示字符和图片的图形处理系统
公开(公告)号：US4947342A
公开(公告)日：1990-08-07
申请号：US905173
申请日：1986-09-09
IPC分类号： G09G5/40 , G06F12/00 , G09G1/02 , G09G1/06 , G09G1/16 , G09G5/22 , G09G5/24 , G09G5/26 , G09G5/36 , G09G5/38 , G09G5/39 , G09G5/393 , G09G5/399
摘要： A graphic processing system has a processor for managing a display area and a character font area both included within an address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.
摘要翻译： 图形处理系统具有用于管理包括在地址空间内的显示区域和字符字体区域的处理器。 从指示通过系统的数据总线传送的字符的编码信息中，处理器生成相应字符的字符字体图案已被存储的地址，并将该字符字体图案转移到显示区域上的预定位置。 图形处理系统实现了字体的高速发展。
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公开(公告)号：US4720708A
公开(公告)日：1988-01-19
申请号：US686594
申请日：1984-12-26
申请人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
发明人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
CPC分类号： G09G5/12
摘要： A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.
摘要翻译： 用于以隔行模式控制一个CRT器件的CRT（阴极射线管）控制器具有双向结构的同步电路，以便使CRT控制器与其他电路（其它CRT控制器或TV系统）可以同步操作， 。 当CRTC用作CRT显示系统的主电路时，与垂直扫描计数器的计数信号和CRTC的隔行控制器的输出同步地从同步电路导出同步信号，并将其提供给 其他CRTC的同步终端。 用于控制其它CRTC的隔行扫描的扫描计数器和触发器与同步信号同步地被复位到其初始状态。 当CRTC用作从电路时，与外部同步信号同步，将扫描计数器和CRTC的触发器复位到初始状态。
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公开(公告)号：US5610622A
公开(公告)日：1997-03-11
申请号：US309413
申请日：1994-09-20
申请人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
发明人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
CPC分类号： G09G5/12
摘要： A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization on with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.
摘要翻译： 用于以隔行模式控制一个CRT器件的CRT（阴极射线管）控制器具有双向结构的同步电路，以便使CRT控制器与其他电路（其它CRT控制器或TV系统）可以同步操作， 。 当CRTC用作CRT显示系统的主电路时，根据垂直扫描计数器的计数信号和CRTC的隔行控制器的输出，同步信号从同步电路得到，并被提供 到其他CRTC的同步终端。 用于控制其他CRTC的隔行扫描的扫描计数器和触发器与同步信号同步地被复位到其初始状态。 当CRTC用作从电路时，与外部同步信号同步，将扫描计数器和CRTC的触发器复位到初始状态。
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公开(公告)号：US4904990A
公开(公告)日：1990-02-27
申请号：US144279
申请日：1988-01-15
申请人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
发明人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
CPC分类号： G09G5/12
摘要： A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.
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公开(公告)号：US5606338A
公开(公告)日：1997-02-25
申请号：US309411
申请日：1994-09-20
申请人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
发明人： Hiroshi Takeda , Shigeaki Yoshida , Koyo Katsura
CPC分类号： G09G5/12
摘要： A CRT (cathode ray tube) controller for controlling one CRT device in an interlace mode has a synchronizing circuit of bi-directional construction, in order to make possible synchronous operation of the CRT controller with other circuits (other CRT controllers or a TV system). When the CRTC is used as a master circuit of a CRT display system, a synchronizing signal is derived from the synchronizing circuit in synchronization with a count signal of a vertical scanning counter and an output of an interlace controller of the CRTC, and is supplied to a synchronizing terminal of the other CRTCs. Scanning counters and a flip-flop for controlling an interlace operation of the other CRTCs are reset to their initial state in synchronization with the synchronizing signal. When the CRTC is used as a slave circuit, scanning counters and a flip-flop of the CRTC are reset to their initial state in synchronization with the external synchronizing signal.
摘要翻译： 用于以隔行模式控制一个CRT器件的CRT（阴极射线管）控制器具有双向结构的同步电路，以便使CRT控制器与其他电路（其它CRT控制器或TV系统）可以同步操作， 。 当CRTC用作CRT显示系统的主电路时，与垂直扫描计数器的计数信号和CRTC的隔行控制器的输出同步地从同步电路导出同步信号，并将其提供给 其他CRTC的同步终端。 用于控制其他CRTC的隔行扫描的扫描计数器和触发器与同步信号同步地被复位到其初始状态。 当CRTC用作从电路时，与外部同步信号同步，将扫描计数器和CRTC的触发器复位到初始状态。
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9.发明授权Method of testing analog/digital converter and structure of analog/digital converter suited for the test 失效测试模拟/数字转换器和模拟/数字转换器结构的测试方法
公开(公告)号：US4580126A
公开(公告)日：1986-04-01
申请号：US669349
申请日：1984-11-08
申请人： Kazuo Kato , Takeshi Hirayama , Shigeaki Yoshida , Yoshinori Sato
发明人： Kazuo Kato , Takeshi Hirayama , Shigeaki Yoshida , Yoshinori Sato
CPC分类号： H03M1/109 , H03M1/1047
摘要： A method of testing a successive comparison type analog/digital converter which incorporates a voltage comparator, a register for successive comparison and a digital/analog converter. A reference digital signal is inputted to the incorporated digital/analog comparator to be converted into an analog signal, while a digital signal corresponding to the reference digital signal is inputted to an externally provided reference digital/analog converter to be converted into an analog signal. Both analog signals thus produced are compared with each other through the incorporated voltage comparator to thereby determine conversion accuracy. A successive comparison type analog/digital converter suited for the test includes further a change-over switch for introducing the externally supplied digital signal to the incorporated digital/analog converter and a changeover switch for leading outwardly the output signal from the voltage comparator.
摘要翻译： 一种测试连续比较型模拟/数字转换器的方法，其包括电压比较器，用于连续比较的寄存器和数字/模拟转换器。 参考数字信号被输入到并入的数字/模拟比较器，以转换为模拟信号，而与参考数字信号相对应的数字信号被输入到外部提供的参考数字/模拟转换器，以转换为模拟信号。 通过并入的电压比较器将由此产生的两个模拟信号彼此进行比较，从而确定转换精度。 适用于测试的连续比较型模/数转换器还包括用于将外部提供的数字信号引入到并入的数字/模拟转换器的转换开关和用于向外引导来自电压比较器的输出信号的转换开关。
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公开(公告)号：US4156500A
公开(公告)日：1979-05-29
申请号：US801978
申请日：1977-05-31
申请人： Shigeaki Yoshida , Susumu Ihara , Koichi Nishimune
发明人： Shigeaki Yoshida , Susumu Ihara , Koichi Nishimune
CPC分类号： H01B13/2633 , B21C37/042 , B21F19/00
摘要： A method of producing a copper clad steel wire, which comprises the steps of preparing a 5 to 15 mm diameter steel rod and a 21 to 66.7 mm width copper tape; continuously supplying the steel rod and the copper tape separately and cleaning the surfaces thereof; forming the copper tape in tubular form such that the copper tape can cover the steel rod while supplying the steel rod and the copper tape in parallel, and welding the edges of the copper tape in a non-oxidizing atmosphere; sinking the tubular copper tape sufficiently for the copper tape to substantially come into contact with the steel rod to form a copper clad steel rod; cold-drawing the copper clad steel rod and/or hot working the clad rod at a temperature of 400.degree. to 800.degree. C. to reduce its cross-sectional area by more than 20%; and then annealing the copper clad steel rod at a temperature of 300.degree. to 1050.degree. C.
摘要翻译： 一种铜包覆钢丝的制造方法，其特征在于，包括5〜15mm直径的钢棒和21〜66.7mm宽的铜带的制造工序。 分别连续供给钢棒和铜带，清洗其表面; 以管状形成铜带，使得铜带能够平行地供给钢棒和铜带而覆盖钢棒，并且将铜带的边缘焊接在非氧化性气氛中; 使铜管带充分沉入铜带大体上与钢棒接触以形成铜包钢棒; 冷拔铜包钢棒和/或在400〜800℃的温度下对复合棒进行热加工，将其横截面积减少20％以上; 然后在300〜1050℃的温度下退火铜包钢棒。
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