公开(公告)号：US20120061578A1

公开(公告)日：2012-03-15

申请号：US13175097

申请日：2011-07-01

申请人： James Lim ,  Kwan-Wook Jung ,  Dong-Hyuk Kim ,  Jea-Eun Ryu

发明人： James Lim ,  Kwan-Wook Jung ,  Dong-Hyuk Kim ,  Jea-Eun Ryu

IPC分类号： G01T1/24

CPC分类号： G01T1/2928 ,  H01L27/14663 ,  H01L27/14692

摘要： An X-ray detector panel comprises: a substrate; a transistor including a gate electrode disposed on the substrate, a gate insulating layer disposed on the gate electrode, an active layer disposed on the gate insulating layer, and a source electrode and a drain electrode disposed on the active layer and separated from each other; a photodiode including a first electrode connected to the drain electrode of the transistor, a photoconductive layer disposed on the first electrode, and a second electrode disposed on the photoconductive layer; an interlayer insulating layer including a first interlayer insulating layer covering the transistor and the photodiode, the first interlayer insulating layer being formed of an insulating material having a band gap energy of about 8 eV to about 10 eV; a data line disposed on the interlayer insulating layer and contacting the source electrode of the transistor via the interlayer insulating layer; a bias line disposed on the interlayer insulating layer and contacting the second electrode of the photodiode via the interlayer insulating layer; and a passivation layer disposed on the data line, the bias line, and the interlayer insulating layer.

摘要翻译： X射线检测器面板包括：基板; 设置在所述基板上的栅电极，配置在所述栅电极上的栅极绝缘层，配置在所述栅极绝缘层上的有源层，以及设置在所述有源层上并分离的源电极和漏电极的晶体管， 光电二极管，包括连接到晶体管的漏电极的第一电极，设置在第一电极上的光电导层和设置在光电导层上的第二电极; 层间绝缘层，包括覆盖所述晶体管和所述光电二极管的第一层间绝缘层，所述第一层间绝缘层由具有约8eV至约10eV的带隙能量的绝缘材料形成; 数据线，设置在所述层间绝缘层上，并经由所述层间绝缘层与所述晶体管的源电极接触; 偏置线，设置在所述层间绝缘层上，并经由所述层间绝缘层与所述光电二极管的所述第二电极接触; 以及设置在数据线，偏置线和层间绝缘层上的钝化层。

公开(公告)号：US08916830B2

公开(公告)日：2014-12-23

申请号：US13175097

申请日：2011-07-01

申请人： James Lim ,  Kwan-Wook Jung ,  Dong-Hyuk Kim ,  Jea-Eun Ryu

发明人： James Lim ,  Kwan-Wook Jung ,  Dong-Hyuk Kim ,  Jea-Eun Ryu

IPC分类号： H01L27/146 ,  G01T1/20 ,  G01T1/24 ,  G01T1/29

CPC分类号： G01T1/2928 ,  H01L27/14663 ,  H01L27/14692

摘要： An X-ray detector panel comprises: a substrate; a transistor including a gate electrode disposed on the substrate, a gate insulating layer disposed on the gate electrode, an active layer disposed on the gate insulating layer, and a source electrode and a drain electrode disposed on the active layer and separated from each other; a photodiode including a first electrode connected to the drain electrode of the transistor, a photoconductive layer disposed on the first electrode, and a second electrode disposed on the photoconductive layer; an interlayer insulating layer including a first interlayer insulating layer covering the transistor and the photodiode, the first interlayer insulating layer being formed of an insulating material having a band gap energy of about 8 eV to about 10 eV; a data line disposed on the interlayer insulating layer and contacting the source electrode of the transistor via the interlayer insulating layer; a bias line disposed on the interlayer insulating layer and contacting the second electrode of the photodiode via the interlayer insulating layer; and a passivation layer disposed on the data line, the bias line, and the interlayer insulating layer.

摘要翻译： X射线检测器面板包括：基板; 设置在所述基板上的栅电极，配置在所述栅电极上的栅极绝缘层，配置在所述栅极绝缘层上的有源层，以及设置在所述有源层上并分离的源电极和漏电极的晶体管， 光电二极管，包括连接到晶体管的漏电极的第一电极，设置在第一电极上的光电导层和设置在光电导层上的第二电极; 层间绝缘层，包括覆盖所述晶体管和所述光电二极管的第一层间绝缘层，所述第一层间绝缘层由具有约8eV至约10eV的带隙能量的绝缘材料形成; 数据线，设置在所述层间绝缘层上，并经由所述层间绝缘层与所述晶体管的源电极接触; 偏置线，设置在所述层间绝缘层上，并经由所述层间绝缘层与所述光电二极管的所述第二电极接触; 以及设置在数据线，偏置线和层间绝缘层上的钝化层。

公开(公告)号：US08803210B2

公开(公告)日：2014-08-12

申请号：US12975568

申请日：2010-12-22

申请人： Kwan-Wook Jung ,  Dong-Hyuk Kim ,  Woo-Jae Lim ,  Jea-Eun Ryu

发明人： Kwan-Wook Jung ,  Dong-Hyuk Kim ,  Woo-Jae Lim ,  Jea-Eun Ryu

IPC分类号： H01L31/062 ,  H01L31/113

CPC分类号： H01L27/14663

摘要： An X-ray detector includes a substrate; a gate line that is extended in a first direction on the substrate; a gate electrode that is extended from the gate line; a semiconductor layer that is positioned on the gate electrode; a source electrode and drain electrode that are positioned on the semiconductor layer; a lower electrode that is extended from the drain electrode; a photodiode that is positioned on the lower electrode; a first insulation layer that is positioned on the source electrode and the drain electrode and that includes a first opening that exposes the source electrode; and a data line that is extended in a second direction intersecting a first direction on the first insulation layer to intersect the gate line with the first insulation layer interposed between the data line and the gate line, and the data line being electrically connected to the source electrode through the first opening.

摘要翻译： X射线检测器包括：基板; 在基板上沿第一方向延伸的栅极线; 从栅极线延伸的栅电极; 位于栅电极上的半导体层; 位于所述半导体层上的源电极和漏电极; 从所述漏电极延伸的下电极; 位于下电极上的光电二极管; 第一绝缘层，其位于源电极和漏电极上，并且包括暴露源电极的第一开口; 以及数据线，其在与所述第一绝缘层上的第一方向相交的第二方向上延伸以与所述栅极线相交，并且所述第一绝缘层插入在所述数据线和所述栅极线之间，并且所述数据线电连接到所述源极 电极通过第一个开口。

公开(公告)号：US08299465B2

公开(公告)日：2012-10-30

申请号：US12972393

申请日：2010-12-17

申请人： Kwan-Wook Jung ,  Dong-Hyuk Kim

发明人： Kwan-Wook Jung ,  Dong-Hyuk Kim

IPC分类号： H01L31/119

CPC分类号： H01L31/022408 ,  H01L27/1461 ,  H01L27/14632 ,  H01L27/14643 ,  H01L27/14663 ,  H01L27/14692 ,  H01L31/119

摘要： An X-ray detector constructed as an exemplary embodiment of the present invention includes a semiconductor layer, a data line including a source electrode covering a first portion of the semiconductor layer, a drain electrode disposed opposite to the source electrode, a first lower electrode formed on the upper portion of a second portion of the semiconductor layer and a gate insulating layer and elongated from the drain electrode, and a passivation layer formed on the upper portion of one part of the lower electrode including the drain electrode. Further, the second lower electrode is formed approaching the gate electrode. The X-ray detector constructed as the exemplary embodiment of the present invention includes a second lower electrode formed on the passivation layer and placed approaching a gate electrode. The area in which a diode is disposed may be maximized, and the amount of leakage current may be reduced.

摘要翻译： 作为本发明的示例性实施例构造的X射线检测器包括半导体层，包括覆盖半导体层的第一部分的源电极的数据线，与源电极相对设置的漏极，形成的第一下电极 在所述半导体层的第二部分的上部和栅极绝缘层上并且从所述漏极延伸，以及钝化层，形成在包括所述漏电极的所述下电极的一部分的上部。 此外，第二下电极形成为接近栅电极。 作为本发明的示例性实施例构造的X射线检测器包括形成在钝化层上并放置为接近栅电极的第二下电极。 设置二极管的区域可以最大化，并且可以减少泄漏电流的量。

公开(公告)号：US20110147741A1

公开(公告)日：2011-06-23

申请号：US12972393

申请日：2010-12-17

申请人： Kwan-Wook Jung ,  Dong-Hyuk Kim

发明人： Kwan-Wook Jung ,  Dong-Hyuk Kim

IPC分类号： H01L31/119

CPC分类号： H01L31/022408 ,  H01L27/1461 ,  H01L27/14632 ,  H01L27/14643 ,  H01L27/14663 ,  H01L27/14692 ,  H01L31/119

摘要： An X-ray detector constructed as an exemplary embodiment of the present invention includes a semiconductor layer, a data line including a source electrode covering a first portion of the semiconductor layer, a drain electrode disposed opposite to the source electrode, a first lower electrode formed on the upper portion of a second portion of the semiconductor layer and a gate insulating layer and elongated from the drain electrode, and a passivation layer formed on the upper portion of one part of the lower electrode including the drain electrode. Further, the second lower electrode is formed approaching the gate electrode. The X-ray detector constructed as the exemplary embodiment of the present invention includes a second lower electrode formed on the passivation layer and placed approaching a gate electrode. The area in which a diode is disposed may be maximized, and the amount of leakage current may be reduced.

摘要翻译： 作为本发明的示例性实施例构造的X射线检测器包括半导体层，包括覆盖半导体层的第一部分的源电极的数据线，与源电极相对设置的漏极，形成的第一下电极 在所述半导体层的第二部分的上部和栅极绝缘层上并且从所述漏极延伸，以及钝化层，形成在包括所述漏电极的所述下电极的一部分的上部。 此外，第二下电极形成为接近栅电极。 作为本发明的示例性实施例构造的X射线检测器包括形成在钝化层上并放置为接近栅电极的第二下电极。 设置二极管的区域可以最大化，并且可以减少泄漏电流的量。

公开(公告)号：US08450125B2

公开(公告)日：2013-05-28

申请号：US13186515

申请日：2011-07-20

申请人： Dong-Suk Shin ,  Yong-Joo Lee ,  Dong-Hyuk Kim ,  Myung-Sun Kim ,  Hoi-Sung Chung

发明人： Dong-Suk Shin ,  Yong-Joo Lee ,  Dong-Hyuk Kim ,  Myung-Sun Kim ,  Hoi-Sung Chung

IPC分类号： H01L21/66

CPC分类号： H01L29/66636 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L22/12 ,  H01L29/78 ,  H01L29/7848 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of evaluating an epitaxial growing process includes forming a mold layer on each of a plurality of substrates, forming a photoresist pattern on each mold layer, the photoresist pattern having opening portions, a total area of a bottom portion of the opening portions being different for each substrate, patterning each mold layer to expose a surface portion of the substrate to form an evaluation pattern on each substrate, evaluation patterns including opening portions corresponding to the opening portion in the photoresist pattern, determining substrate opening ratios for each substrate based on the opening portions in the evaluation pattern thereon, the substrate opening ratios being different for each substrate, performing a selective epitaxial process on each substrate to form an epitaxial layer, and evaluating characteristics of the epitaxial layer for each substrate to determine an optimal substrate opening ratio.

摘要翻译： 评价外延生长方法的方法包括在多个基板的每一个上形成模具层，在每个模具层上形成光致抗蚀剂图案，所述光致抗蚀剂图案具有开口部分，所述开口部分的底部的总面积不同 对于每个基板，图案化每个模具层以暴露基板的表面部分以在每个基板上形成评估图案，评估图案包括与光致抗蚀剂图案中的开口部分对应的开口部分，基于该基板确定每个基板的基板开口率 在其上的评估图案中的开口部分，基板开口率对于每个基板不同，在每个基板上执行选择性外延处理以形成外延层，以及评估每个基板的外延层的特性以确定最佳的基板开口率。

公开(公告)号：US08207040B2

公开(公告)日：2012-06-26

申请号：US13021029

申请日：2011-02-04

申请人： Hoi-Sung Chung ,  Dong-Suk Shin ,  Dong-Hyuk Kim ,  Jung-Shik Heo ,  Myung-Sun Kim

发明人： Hoi-Sung Chung ,  Dong-Suk Shin ,  Dong-Hyuk Kim ,  Jung-Shik Heo ,  Myung-Sun Kim

IPC分类号： H01L21/8238 ,  H01L21/336 ,  H01L21/36 ,  H01L21/425

CPC分类号： H01L21/823807 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848 ,  Y10S438/938

摘要： A method of manufacturing a semiconductor device includes forming a gate electrode on a semiconductor substrate and a sidewall spacer on the gate electrode. Then, a portion of the semiconductor substrate at both sides of the sidewall spacer is partially etched to form a trench. A SiGe mixed crystal layer is formed in the trench. A silicon layer is formed on the SiGe mixed crystal layer. A portion of the silicon layer is partially etched using an etching solution having different etching rates in accordance with a crystal direction of a face of the silicon layer to form a capping layer including a silicon facet having an (111) inclined face.

摘要翻译： 一种制造半导体器件的方法包括在半导体衬底上形成栅电极和在栅电极上形成侧壁间隔物。 然后，部分地蚀刻在侧壁间隔物的两侧的半导体衬底的一部分以形成沟槽。 在沟槽中形成SiGe混合晶体层。 在SiGe混晶层上形成硅层。 使用根据硅层的表面的晶体方向具有不同蚀刻速率的蚀刻溶液来部分蚀刻硅层的一部分，以形成包括具有（111）倾斜面的硅小面的覆盖层。

公开(公告)号：US20120021537A1

公开(公告)日：2012-01-26

申请号：US13186515

申请日：2011-07-20

申请人： Dong-Suk Shin ,  Yong-Joo Lee ,  Dong-Hyuk Kim ,  Myung-Sun Kim ,  Hoi-Sung Chung

发明人： Dong-Suk Shin ,  Yong-Joo Lee ,  Dong-Hyuk Kim ,  Myung-Sun Kim ,  Hoi-Sung Chung

IPC分类号： H01L21/66

CPC分类号： H01L29/66636 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L22/12 ,  H01L29/78 ,  H01L29/7848 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of evaluating an epitaxial growing process includes forming a mold layer on each of a plurality of substrates, forming a photoresist pattern on each mold layer, the photoresist pattern having opening portions, a total area of a bottom portion of the opening portions being different for each substrate, patterning each mold layer to expose a surface portion of the substrate to form an evaluation pattern on each substrate, evaluation patterns including opening portions corresponding to the opening portion in the photoresist pattern, determining substrate opening ratios for each substrate based on the opening portions in the evaluation pattern thereon, the substrate opening ratios being different for each substrate, performing a selective epitaxial process on each substrate to form an epitaxial layer, and evaluating characteristics of the epitaxial layer for each substrate to determine an optimal substrate opening ratio.

摘要翻译： 评价外延生长方法的方法包括在多个基板的每一个上形成模具层，在每个模具层上形成光致抗蚀剂图案，所述光致抗蚀剂图案具有开口部分，所述开口部分的底部的总面积不同 对于每个基板，图案化每个模具层以暴露基板的表面部分以在每个基板上形成评估图案，评估图案包括与光致抗蚀剂图案中的开口部分对应的开口部分，基于该基板确定每个基板的基板开口率 在其上的评估图案中的开口部分，基板开口率对于每个基板不同，在每个基板上执行选择性外延处理以形成外延层，以及评估每个基板的外延层的特性以确定最佳的基板开口率。

公开(公告)号：US20110230027A1

公开(公告)日：2011-09-22

申请号：US13052460

申请日：2011-03-21

申请人： Myung-Sun Kim ,  Dong-Suk Shin ,  Dong-Hyuk Kim ,  Yong-Joo Lee ,  Hoi-Sung Chung

发明人： Myung-Sun Kim ,  Dong-Suk Shin ,  Dong-Hyuk Kim ,  Yong-Joo Lee ,  Hoi-Sung Chung

IPC分类号： H01L21/336

CPC分类号： H01L29/66636 ,  H01L21/26586 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/7834

摘要： Provided are methods of forming semiconductor devices. A method may include preparing a semiconductor substrate including a first region and a second region adjacent the first region. The method may also include forming sacrificial pattern covering the second region and exposing the first region. The method may further include forming a capping layer including a faceted sidewall on the first region using selective epitaxial growth (SEG). The faceted sidewall may be separate from the sacrificial pattern. The sacrificial pattern may be removed. Impurity ions may be implanted into the semiconductor substrate.

摘要翻译： 提供了形成半导体器件的方法。 一种方法可以包括制备包括第一区域和邻近第一区域的第二区域的半导体衬底。 该方法还可以包括形成覆盖第二区域并暴露第一区域的牺牲图案。 该方法还可以包括使用选择性外延生长（SEG）在第一区域上形成包括有侧壁的覆盖层。 分面侧壁可以与牺牲图案分离。 可以去除牺牲图案。 杂质离子可以注入到半导体衬底中。

公开(公告)号：US20120223364A1

公开(公告)日：2012-09-06

申请号：US13410475

申请日：2012-03-02

申请人： Hoi-Sung CHUNG ,  Dong-Suk Shin ,  Dong-Hyuk Kim ,  Myung-Sun Kim

发明人： Hoi-Sung CHUNG ,  Dong-Suk Shin ,  Dong-Hyuk Kim ,  Myung-Sun Kim

IPC分类号： H01L29/78 ,  H01L21/8238 ,  H01L21/20

CPC分类号： H01L21/823807 ,  H01L21/30608 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7848

摘要： In a method of manufacturing a transistor, a gate structure is formed on a substrate including silicon. An upper portion of the substrate adjacent to the gate structure is etched to form a first recess in the substrate. A preliminary first epitaxial layer including silicon-germanium is formed in the first recess. An upper portion of the preliminary first epitaxial layer is etched to form a second recess on the preliminary first epitaxial layer. In addition, a portion of the preliminary first epitaxial layer adjacent to the second recess is etched to thereby transform the preliminary first epitaxial layer into a first epitaxial layer. A second epitaxial layer including silicon-germanium is formed in the second recess located on the first epitaxial layer.

摘要翻译： 在制造晶体管的方法中，在包括硅的衬底上形成栅极结构。 蚀刻与栅极结构相邻的衬底的上部，以在衬底中形成第一凹部。 在第一凹部中形成包括硅 - 锗的初步的第一外延层。 蚀刻初步第一外延层的上部以在初步第一外延层上形成第二凹槽。 此外，蚀刻与第二凹槽相邻的初步第一外延层的一部分，从而将初步第一外延层转变为第一外延层。 在位于第一外延层上的第二凹槽中形成包括硅 - 锗的第二外延层。