公开(公告)号：US06980036B2

公开(公告)日：2005-12-27

申请号：US10671105

申请日：2003-09-25

申请人： Kyoung-hwan Kwon ,  Hyun-soon Jang ,  Kyu-hyoun Kim

发明人： Kyoung-hwan Kwon ,  Hyun-soon Jang ,  Kyu-hyoun Kim

IPC分类号： G06F1/04 ,  G11C11/40 ,  G11C29/00 ,  G11C29/12 ,  H03B1/00 ,  H03B19/00 ,  H03B19/10 ,  H03K5/00 ,  H03K5/1534 ,  H03K21/10

CPC分类号： H03K5/1534 ,  H03K5/00006

摘要： In a frequency multiplier and a method of multiplying a frequency of an external clock signal, a data output buffer, and a semiconductor device including the frequency multiplier and the data output buffer, the frequency multiplier receives an external clock signal having a predetermined frequency and outputs an internal clock signal having greater frequency than the predetermined frequency. In the semiconductor device, the data output buffer outputs data tested in response to test data. Therefore, it is possible to test a plurality of memory cells at a time by using a clock signal having a low frequency. In addition, the time and cost required for the test can be greatly reduced, and conventional testing equipment that operates at a relatively low frequency can be effectively used.

摘要翻译： 在频率倍增器和将外部时钟信号的频率，数据输出缓冲器和包括倍频器和数据输出缓冲器的半导体器件相乘的方法中，倍频器接收具有预定频率的外部时钟信号并输出 具有比预定频率更大的频率的内部时钟信号。 在半导体器件中，数据输出缓冲器输出根据测试数据测试的数据。 因此，可以通过使用具有低频率的时钟信号来一次测试多个存储单元。 此外，可以大大降低测试所需的时间和成本，并且可以有效地使用在较低频率下工作的常规测试设备。

公开(公告)号：US06876564B2

公开(公告)日：2005-04-05

申请号：US10689403

申请日：2003-10-20

申请人： Kyoung-hwan Kwon ,  Kwang-sook Noh

发明人： Kyoung-hwan Kwon ,  Kwang-sook Noh

IPC分类号： G01R31/28 ,  G11C11/40 ,  G11C29/12 ,  H01L21/822 ,  H01L27/04 ,  H03K19/173 ,  G11C5/06

CPC分类号： H03K19/1732

摘要： Provided are an integrated circuit and a method thereof, in which different types of signals can be applied to an internal circuit via one pin. The integrated circuit device includes a distribution unit, a level fixing unit, and an activation unit. The distribution unit receives and outputs a first input signal input via the first input pin, and receives and outputs a second input signal input via the first input pin in response to a control signal. The level fixing unit receives the first input signal from the distribution unit and applies a signal having the same voltage level as the first input signal to a first internal circuit in response to the control signal. The activation unit receives the second input signal input via the second input pin and then applies the second input signal to a second internal circuit or applies the second input signal output from the distribution unit to the second internal circuit in response to the control signal.

摘要翻译： 提供了一种集成电路及其方法，其中可以通过一个引脚将不同类型的信号施加到内部电路。 集成电路装置包括分配单元，电平固定单元和激活单元。 分配单元接收并输出经由第一输入引脚输入的第一输入信号，并且响应于控制信号接收并输出经由第一输入引脚输入的第二输入信号。 电平固定单元从分配单元接收第一输入信号，并响应于控制信号将与第一输入信号具有相同电压电平的信号施加到第一内部电路。 激活单元接收经由第二输入引脚输入的第二输入信号，然后将第二输入信号施加到第二内部电路，或者响应于控制信号将从分配单元输出的第二输入信号施加到第二内部电路。