Anisotropic stress generation by stress-generating liners having a sublithographic width
    1.
    发明授权
    Anisotropic stress generation by stress-generating liners having a sublithographic width 有权
    具有亚光刻宽度的应力产生衬垫产生各向异性应力

    公开(公告)号:US07989291B2

    公开(公告)日:2011-08-02

    申请号:US12712369

    申请日:2010-02-25

    IPC分类号: H01L29/72

    摘要: A protruding structure having a linear edge is formed on a substrate. The protruding structure may be a gate line of a field effect transistor. A stress-generating liner is deposited on the substrate. A non-photosensitive self-assembling block copolymer layer containing at least two immiscible polymeric block components is deposited on the stress-generating liner, and is annealed to allow phase separation of immiscible components. The polymeric resist is developed to remove at least one of the at least two polymeric block components, which formed a pattern of nested lines due to the linear edge of the protruding structure. Linear nanoscale stripes are formed in the polymeric resist which is self-aligning and self-assembled. The stress-generating layer is patterned into linear stress-generating stripes having a sublithographic width. The linear stress-generating stripes provide a predominantly uniaxial stress along their lengthwise direction, providing an anisotropic stress to an underlying semiconductor device.

    摘要翻译: 在基板上形成具有线性边缘的突出结构。 突出结构可以是场效应晶体管的栅极线。 应力产生衬垫沉积在衬底上。 含有至少两种不混溶的聚合物嵌段组分的非感光性自组装嵌段共聚物层沉积在应力产生衬里上,并进行退火以允许不相容的组分相分离。 聚合物抗蚀剂被显影以除去至少两个聚合物嵌段组分中的至少一个,其由于突出结构的线性边缘而形成嵌套线的图案。 在自对准和自组装的聚合物抗蚀剂中形成线性纳米级条纹。 将应力产生层图案化成具有亚光刻宽度的线性应力产生条纹。 线性应力产生条纹沿其长度方向提供主要的单轴应力,向下面的半导体器件提供各向异性的应力。

    ANISOTROPIC STRESS GENERATION BY STRESS-GENERATING LINERS HAVING A SUBLITHOGRAPHIC WIDTH
    2.
    发明申请
    ANISOTROPIC STRESS GENERATION BY STRESS-GENERATING LINERS HAVING A SUBLITHOGRAPHIC WIDTH 失效
    通过应力产生具有子平面宽度的衬垫的各向异性应力生成

    公开(公告)号:US20090184374A1

    公开(公告)日:2009-07-23

    申请号:US12017557

    申请日:2008-01-22

    IPC分类号: H01L21/336 H01L29/78

    摘要: A protruding structure having a linear edge is formed on a substrate. The protruding structure may be a gate line of a field effect transistor. A stress-generating liner is deposited on the substrate. A non-photosensitive self-assembling block copolymer layer containing at least two immiscible polymeric block components is deposited on the stress-generating liner, and is annealed to allow phase separation of immiscible components. The polymeric resist is developed to remove at least one of the at least two polymeric block components, which formed a pattern of nested lines due to the linear edge of the protruding structure. Linear nanoscale stripes are formed in the polymeric resist which is self-aligning and self-assembled. The stress-generating layer is patterned into linear stress-generating stripes having a sublithographic width. The linear stress-generating stripes provide a predominantly uniaxial stress along their lengthwise direction, providing an anisotropic stress to an underlying semiconductor device.

    摘要翻译: 在基板上形成具有线性边缘的突出结构。 突出结构可以是场效应晶体管的栅极线。 应力产生衬垫沉积在衬底上。 含有至少两种不混溶的聚合物嵌段组分的非感光性自组装嵌段共聚物层沉积在应力产生衬里上,并进行退火以允许不相容的组分相分离。 聚合物抗蚀剂被显影以除去至少两个聚合物嵌段组分中的至少一个,其由于突出结构的线性边缘而形成嵌套线的图案。 在自对准和自组装的聚合物抗蚀剂中形成线性纳米级条纹。 将应力产生层图案化成具有亚光刻宽度的线性应力产生条纹。 线性应力产生条纹沿其长度方向提供主要的单轴应力,向下面的半导体器件提供各向异性的应力。

    Anisotropic stress generation by stress-generating liners having a sublithographic width
    3.
    发明授权
    Anisotropic stress generation by stress-generating liners having a sublithographic width 失效
    具有亚光刻宽度的应力产生衬垫产生各向异性应力

    公开(公告)号:US07696542B2

    公开(公告)日:2010-04-13

    申请号:US12017557

    申请日:2008-01-22

    IPC分类号: H01L29/72

    摘要: A protruding structure having a linear edge is formed on a substrate. The protruding structure may be a gate line of a field effect transistor. A stress-generating liner is deposited on the substrate. A non-photosensitive self-assembling block copolymer layer containing at least two immiscible polymeric block components is deposited on the stress-generating liner, and is annealed to allow phase separation of immiscible components. The polymeric resist is developed to remove at least one of the at least two polymeric block components, which formed a pattern of nested lines due to the linear edge of the protruding structure. Linear nanoscale stripes are formed in the polymeric resist which is self-aligning and self-assembled. The stress-generating layer is patterned into linear stress-generating stripes having a sublithographic width. The linear stress-generating stripes provide a predominantly uniaxial stress along their lengthwise direction, providing an anisotropic stress to an underlying semiconductor device.

    摘要翻译: 在基板上形成具有线性边缘的突出结构。 突出结构可以是场效应晶体管的栅极线。 应力产生衬垫沉积在衬底上。 含有至少两种不混溶的聚合物嵌段组分的非感光性自组装嵌段共聚物层沉积在应力产生衬里上,并进行退火以允许不相容的组分相分离。 聚合物抗蚀剂被显影以除去至少两个聚合物嵌段组分中的至少一个,其由于突出结构的线性边缘而形成嵌套线的图案。 在自对准和自组装的聚合物抗蚀剂中形成线性纳米级条纹。 将应力产生层图案化成具有亚光刻宽度的线性应力产生条纹。 线性应力产生条纹沿其长度方向提供主要的单轴应力,向下面的半导体器件提供各向异性的应力。

    ANISOTROPIC STRESS GENERATION BY STRESS-GENERATING LINERS HAVING A SUBLITHOGRAPHIC WIDTH
    4.
    发明申请
    ANISOTROPIC STRESS GENERATION BY STRESS-GENERATING LINERS HAVING A SUBLITHOGRAPHIC WIDTH 有权
    通过应力产生具有子平面宽度的衬垫的各向异性应力生成

    公开(公告)号:US20100151638A1

    公开(公告)日:2010-06-17

    申请号:US12712369

    申请日:2010-02-25

    IPC分类号: H01L21/336 H01L21/30

    摘要: A protruding structure having a linear edge is formed on a substrate. The protruding structure may be a gate line of a field effect transistor. A stress-generating liner is deposited on the substrate. A non-photosensitive self-assembling block copolymer layer containing at least two immiscible polymeric block components is deposited on the stress-generating liner, and is annealed to allow phase separation of immiscible components. The polymeric resist is developed to remove at least one of the at least two polymeric block components, which formed a pattern of nested lines due to the linear edge of the protruding structure. Linear nanoscale stripes are formed in the polymeric resist which is self-aligning and self-assembled. The stress-generating layer is patterned into linear stress-generating stripes having a sublithographic width. The linear stress-generating stripes provide a predominantly uniaxial stress along their lengthwise direction, providing an anisotropic stress to an underlying semiconductor device.

    摘要翻译: 在基板上形成具有线性边缘的突出结构。 突出结构可以是场效应晶体管的栅极线。 应力产生衬垫沉积在衬底上。 含有至少两种不混溶的聚合物嵌段组分的非感光性自组装嵌段共聚物层沉积在应力产生衬里上,并进行退火以允许不相容的组分相分离。 聚合物抗蚀剂被显影以除去至少两个聚合物嵌段组分中的至少一个,其由于突出结构的线性边缘而形成嵌套线的图案。 在自对准和自组装的聚合物抗蚀剂中形成线性纳米级条纹。 将应力产生层图案化成具有亚光刻宽度的线性应力产生条纹。 线性应力产生条纹沿其长度方向提供主要的单轴应力,向下面的半导体器件提供各向异性的应力。

    ASSET MANAGEMENT INFRASTRUCTURE
    7.
    发明申请
    ASSET MANAGEMENT INFRASTRUCTURE 有权
    资产管理基础设施

    公开(公告)号:US20120126937A1

    公开(公告)日:2012-05-24

    申请号:US13296242

    申请日:2011-11-15

    IPC分类号: G08B29/00

    CPC分类号: G08B13/14 G06Q10/087

    摘要: Asset management for control of electric appliances comprises a keycode unit and an equipment unit embedded in an appliance. The keycode unit is located in a protected environment and relates to an asset management area. The equipment unit may store an appliance identification code. The keycode unit and the equipment unit may be in communication contact, whereby the equipment unit sends positioning coordinates to the keycode unit, and wherein the equipment unit is adapted to lock the appliance via the lock unit, in response to a lock signal that the equipment unit receives from the keycode unit, if the appliance moves outside the asset management area.

    摘要翻译: 用于控制电器的资产管理包括密码单元和嵌入在器具中的设备单元。 键码单元位于受保护的环境中,与资产管理区域有关。 设备单元可以存储设备标识码。 键码单元和设备单元可以是通信接触的,由此设备单元向键码单元发送定位坐标,并且其中设备单元适于经由锁定单元锁定设备,响应于锁定信号,设备 如果设备移动到资产管理区域外,则单元从密钥单元接收。

    Self-aligned nano-scale device with parallel plate electrodes
    10.
    发明授权
    Self-aligned nano-scale device with parallel plate electrodes 有权
    具有平行平板电极的自对准纳米级装置

    公开(公告)号:US08802990B2

    公开(公告)日:2014-08-12

    申请号:US13432037

    申请日:2012-03-28

    IPC分类号: H01B5/14 H01L21/76 H01L21/764

    CPC分类号: B81C1/00698 B81B2201/0292

    摘要: A contiguous deep trench includes a first trench portion having a constant width between a pair of first parallel sidewalls, second and third trench portions each having a greater width than the first trench portion and laterally connected to the first trench portion. A non-conformal deposition process is employed to form a conductive layer that has a tapered geometry within the contiguous deep trench portion such that the conductive layer is not present on bottom surfaces of the contiguous deep trench. A gap fill layer is formed to plug the space in the first trench portion. The conductive layer is patterned into two conductive plates each having a tapered vertical portion within the first trench portion. After removing remaining portions of the gap fill layer, a device is formed that has a small separation distance between the tapered vertical portions of the conductive plates.

    摘要翻译: 连续的深沟槽包括在一对第一平行侧壁之间具有恒定宽度的第一沟槽部分,第二沟槽部分和第三沟槽部分各自具有比第一沟槽部分更大的宽度并横向连接到第一沟槽部分。 使用非共形沉积工艺来形成导电层,该导电层在邻接的深沟槽部分内具有锥形几何形状,使得导电层不存在于邻接的深沟槽的底表面上。 形成间隙填充层以堵塞第一沟槽部分中的空间。 将导电层图案化为在第一沟槽部分内具有锥形垂直部分的两个导电板。 在去除间隙填充层的剩余部分之后,形成在导电板的锥形垂直部分之间具有小间隔距离的装置。