公开(公告)号：US20100317148A1

公开(公告)日：2010-12-16

申请号：US12849648

申请日：2010-08-03

申请人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer K. Krause ,  Kevin M. Prettyman

发明人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer K. Krause ,  Kevin M. Prettyman

IPC分类号： H01L31/18

CPC分类号： H01L31/022433 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  Y02E10/50

摘要： Processes for fabricating a contact grid for a photovoltaic cell generally includes providing a photovoltaic cell having an antireflective coating disposed on a sun facing side, the photovoltaic cell comprising a silicon substrate having a p-n junction; soft stamping a pattern of a UV sensitive photoresist and/or polymer onto the antireflective coating; exposing the UV sensitive photoresist and/or polymer to ultraviolet radiation to cure the UV sensitive photoresist and/or polymer; etching the pattern to form openings in the antireflective coating that define the contact grid; stripping the UV sensitive photoresist and/or polymer; and depositing a conductive metal into the openings defined by the pattern. The metal based paste can be aluminum based, which can be annealed at a relatively low temperature.

摘要翻译： 用于制造用于光伏电池的接触栅极的方法通常包括提供具有设置在面向太阳侧的抗反射涂层的光伏电池，所述光伏电池包括具有p-n结的硅衬底; 将UV敏感的光致抗蚀剂和/或聚合物的图案软化到抗反射涂层上; 将UV敏感的光致抗蚀剂和/或聚合物暴露于紫外线辐射以固化UV敏感的光致抗蚀剂和/或聚合物; 蚀刻图案以在防反射涂层中形成限定接触网格的开口; 剥离UV敏感的光致抗蚀剂和/或聚合物; 以及将导电金属沉积到由图案限定的开口中。 金属基糊料可以是铝基，其可以在相对低的温度下退火。

公开(公告)号：US20100075261A1

公开(公告)日：2010-03-25

申请号：US12234856

申请日：2008-09-22

申请人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer K. Krause ,  Kevin M. Prettyman

发明人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer K. Krause ,  Kevin M. Prettyman

IPC分类号： G03F7/20

CPC分类号： H01L31/022433 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  Y02E10/50

摘要： Processes for fabricating a contact grid for a photovoltaic cell generally includes providing a photovoltaic cell having an antireflective coating disposed on a sun facing side, the photovoltaic cell comprising a silicon substrate having a p-n junction; soft stamping a pattern of a UV sensitive photoresist and/or polymer onto the antireflective coating; exposing the UV sensitive photoresist and/or polymer to ultraviolet radiation to cure the UV sensitive photoresist and/or polymer; etching the pattern to form openings in the antireflective coating that define the contact grid; stripping the UV sensitive photoresist and/or polymer; and depositing a conductive metal into the openings defined by the pattern. The metal based paste can be aluminum based, which can be annealed at a relatively low temperature.

摘要翻译： 用于制造用于光伏电池的接触栅极的方法通常包括提供具有设置在面向太阳侧的抗反射涂层的光伏电池，所述光伏电池包括具有p-n结的硅衬底; 将UV敏感的光致抗蚀剂和/或聚合物的图案软化到抗反射涂层上; 将UV敏感的光致抗蚀剂和/或聚合物暴露于紫外线辐射以固化UV敏感的光致抗蚀剂和/或聚合物; 蚀刻图案以在防反射涂层中形成限定接触网格的开口; 剥离UV敏感的光致抗蚀剂和/或聚合物; 并将导电金属沉积到由图案限定的开口中。 金属基糊料可以是铝基，其可以在相对低的温度下退火。

公开(公告)号：US08043886B2

公开(公告)日：2011-10-25

申请号：US12849648

申请日：2010-08-03

申请人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer K. Krause ,  Kevin M. Prettyman

发明人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer K. Krause ,  Kevin M. Prettyman

IPC分类号： H01L21/283

CPC分类号： H01L31/022433 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  Y02E10/50

摘要： Processes for fabricating a contact grid for a photovoltaic cell generally includes providing a photovoltaic cell having an antireflective coating disposed on a sun facing side, the photovoltaic cell comprising a silicon substrate having a p-n junction; soft stamping a pattern of a UV sensitive photoresist and/or polymer onto the antireflective coating; exposing the UV sensitive photoresist and/or polymer to ultraviolet radiation to cure the UV sensitive photoresist and/or polymer; etching the pattern to form openings in the antireflective coating that define the contact grid; stripping the UV sensitive photoresist and/or polymer; and depositing a conductive metal into the openings defined by the pattern. The metal based paste can be aluminum based, which can be annealed at a relatively low temperature.

摘要翻译： 用于制造用于光伏电池的接触栅极的方法通常包括提供具有设置在面向太阳侧的抗反射涂层的光伏电池，所述光伏电池包括具有p-n结的硅衬底; 将UV敏感的光致抗蚀剂和/或聚合物的图案软化到抗反射涂层上; 将UV敏感的光致抗蚀剂和/或聚合物暴露于紫外线辐射以固化UV敏感的光致抗蚀剂和/或聚合物; 蚀刻图案以在防反射涂层中形成限定接触网格的开口; 剥离UV敏感的光致抗蚀剂和/或聚合物; 以及将导电金属沉积到由图案限定的开口中。 金属基糊料可以是铝基，其可以在相对低的温度下退火。

公开(公告)号：US20110100443A1

公开(公告)日：2011-05-05

申请号：US12916236

申请日：2010-10-29

申请人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin M. Prettyman ,  Carl Radens ,  Brian C. Sapp

发明人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin M. Prettyman ,  Carl Radens ,  Brian C. Sapp

IPC分类号： H01L31/06 ,  H01L31/0236

CPC分类号： H01L31/022425 ,  H01L31/068 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A method for manufacturing a photovoltaic solar cell device includes the following. A p-n junction having a first doping density is formed. Formation of the p-n junction is enhanced by introducing a second doping density to form high doped areas for a dual emitter application. The high doped areas are defined by a masking process integrated with the formation of the p-n junction, resulting in a mask pattern of the high doped areas. A metallization of the high doped areas occurs in accordance with the mask pattern of the high doped areas.

摘要翻译： 光伏太阳能电池器件的制造方法包括以下。 形成具有第一掺杂密度的p-n结。 通过引入第二掺杂密度以形成用于双发射器应用的高掺杂区域来增强p-n结的形成。 高掺杂区域由与p-n结的形成集成的掩模工艺限定，产生高掺杂区域的掩模图案。 根据高掺杂区域的掩模图案发生高掺杂区域的金属化。

公开(公告)号：US08614115B2

公开(公告)日：2013-12-24

申请号：US12916236

申请日：2010-10-29

申请人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin M. Prettyman ,  Carl Radens ,  Brian C. Sapp

发明人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin M. Prettyman ,  Carl Radens ,  Brian C. Sapp

IPC分类号： H01L21/00 ,  H01L31/18

CPC分类号： H01L31/022425 ,  H01L31/068 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A method for manufacturing a photovoltaic solar cell device includes the following. A p-n junction having a first doping density is formed. Formation of the p-n junction is enhanced by introducing a second doping density to form high doped areas for a dual emitter application. The high doped areas are defined by a masking process integrated with the formation of the p-n junction, resulting in a mask pattern of the high doped areas. A metallization of the high doped areas occurs in accordance with the mask pattern of the high doped areas.

摘要翻译： 光伏太阳能电池器件的制造方法包括以下。 形成具有第一掺杂密度的p-n结。 通过引入第二掺杂密度以形成用于双发射器应用的高掺杂区域来增强p-n结的形成。 高掺杂区域由与p-n结的形成集成的掩模工艺限定，产生高掺杂区域的掩模图案。 根据高掺杂区域的掩模图案发生高掺杂区域的金属化。

公开(公告)号：US08486751B2

公开(公告)日：2013-07-16

申请号：US12952465

申请日：2010-11-23

申请人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin M. Prettyman ,  Brian C. Sapp

发明人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin M. Prettyman ,  Brian C. Sapp

IPC分类号： H01L21/00 ,  H01L21/66

CPC分类号： H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A method of manufacturing a photovoltaic cell using a semiconductor wafer having a front side and a rear side, wherein the photovoltaic cell produces electricity when the front side of the semiconductor wafer is illuminated.

摘要翻译： 使用具有前侧和后侧的半导体晶片制造光伏电池的方法，其中当半导体晶片的前侧被照亮时，光伏电池产生电力。

公开(公告)号：US20110120519A1

公开(公告)日：2011-05-26

申请号：US12952465

申请日：2010-11-23

申请人： Lawrence A. Clevenger ,  Harlod J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin M. Prettyman ,  Brian C. Sapp

发明人： Lawrence A. Clevenger ,  Harlod J. Hovel ,  Rainer Klaus Krause ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin M. Prettyman ,  Brian C. Sapp

IPC分类号： H01L31/042 ,  H01L21/66 ,  H01L31/02

CPC分类号： H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A method of manufacturing a photovoltaic cell using a semiconductor wafer having a front side and a rear side, wherein the photovoltaic cell produces electricity when the front side of the semiconductor wafer is illuminated., the method comprising the steps of:

摘要翻译： 一种使用具有前侧和后侧的半导体晶片制造光伏电池的方法，其中当半导体晶片的前侧被照亮时，该光伏电池产生电力，该方法包括以下步骤：

公开(公告)号：US07087513B2

公开(公告)日：2006-08-08

申请号：US10904138

申请日：2004-10-26

申请人： Benjamin V. Fasano ,  Richard F. Indyk ,  Kevin M. Prettyman

发明人： Benjamin V. Fasano ,  Richard F. Indyk ,  Kevin M. Prettyman

IPC分类号： H01L21/44 ,  H01L21/50

CPC分类号： G01R31/2886 ,  G01R1/0466 ,  H01L21/486 ,  H01L21/6835

摘要： The present invention provides a method for producing a temporary chip carrier for semiconductor chip burn-in test and speed sorting. A multi-layered substrate or card, usually comprised of one of various materials is made by offsetting the conductor-filled vias or holes in the outer few layers with the outer most layer not being filled with a conductor, such that a partially filled via or hole is produced. This effectively produces a smaller surface conductor feature, on which the semiconductor chip is temporarily attached, electrically tested, and subsequently removed using various methods, at forces much lower than normal chip removal processes require.

摘要翻译： 本发明提供一种用于制造用于半导体芯片老化测试和速度分选的临时芯片载体的方法。 通常由各种材料中的一种构成的多层基板或卡通过抵消外部几层中的导体填充的通孔或孔，其中最外层未填充有导体，从而使部分填充的通孔或 产生孔。 这有效地产生较小的表面导体特征，半导体芯片暂时附着，电学测试，并随后使用各种方法，以比正常的芯片去除工艺要求低得多的力除去。

公开(公告)号：US06987316B2

公开(公告)日：2006-01-17

申请号：US10707810

申请日：2004-01-14

申请人： Srinivasa N. Reddy ,  Mukta G. Farooq ,  Kevin M. Prettyman

发明人： Srinivasa N. Reddy ,  Mukta G. Farooq ,  Kevin M. Prettyman

IPC分类号： H01L23/06 ,  H01L23/10 ,  H01L23/15

CPC分类号： H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/113 ,  H05K2201/096 ,  H01L2924/00

摘要： A multilayer ceramic substrate in which an outer metal pad is anchored to the substrate by a single metal-filled via in the first ceramic layer adjacent to the metal pad. In turn, this single metal-filled via is anchored to the substrate by a larger, single metal-filled via in the next ceramic layer adjacent to the first ceramic layer. Preferably, the metal-filled vias and metal pad are 100 volume percent metal.

摘要翻译： 一种多层陶瓷基板，其中外金属焊盘通过与金属焊盘相邻的第一陶瓷层中的单个金属填充通孔锚定到基板。 反过来，通过在与第一陶瓷层相邻的下一个陶瓷层中的较大的单个金属填充的通孔将该单个金属填充的通孔锚定到衬底。 优选地，金属填充的通孔和金属垫是100体积％的金属。

公开(公告)号：US5635000A

公开(公告)日：1997-06-03

申请号：US577180

申请日：1995-12-22

申请人： Jon A. Casey ,  Cynthia J. Calli ,  Darren T. Cook ,  David B. Goland ,  John U. Knickerbocker ,  Mark J. LaPlante ,  David C. Long ,  Daniel S. Mackin ,  Kathleen M. McGuire ,  Keith C. O'Neil ,  Kevin M. Prettyman ,  Michael T. Puchalski ,  Joseph C. Saltarelli ,  Candace A. Sullivan

发明人： Jon A. Casey ,  Cynthia J. Calli ,  Darren T. Cook ,  David B. Goland ,  John U. Knickerbocker ,  Mark J. LaPlante ,  David C. Long ,  Daniel S. Mackin ,  Kathleen M. McGuire ,  Keith C. O'Neil ,  Kevin M. Prettyman ,  Michael T. Puchalski ,  Joseph C. Saltarelli ,  Candace A. Sullivan

IPC分类号： H01L21/48 ,  H01L21/683 ,  H05K1/03 ,  H05K3/40 ,  B32B31/04 ,  B32B31/28

CPC分类号： H05K3/4061 ,  H01L21/4867 ,  H01L21/6833 ,  H05K1/0306 ,  H05K2203/105 ,  Y10T156/1056 ,  Y10T156/1158 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49139 ,  Y10T428/239 ,  Y10T428/31 ,  Y10T428/31786

摘要： The present invention relates generally to a new apparatus and method for screening using electrostatic adhesion. More particularly, the invention encompasses an apparatus that uses an electrostatic charge during the screening process for a semiconductor substrate. Basically, a backing layer is adhered to a green ceramic sheet using an electrostatic charge, while the green ceramic sheet is processed.

摘要翻译： 本发明一般涉及使用静电粘附进行筛选的新装置和方法。 更具体地，本发明包括在半导体衬底的筛选过程中使用静电电荷的装置。 基本上，使用静电荷将背衬层附着在生坯陶瓷片上，同时处理生坯陶瓷片。