摘要:
For one disclosed embodiment, a lower limit for a power consumption device may be identified. Performance of the power consumption device may be reduced in response to a determination that a temperature corresponding to the power consumption device exceeds a threshold. Performance reduction may be limited based on the lower limit. Other embodiments are also disclosed.
摘要:
Methods and apparatuses for intervening in the self power or thermal regulations of a plurality of independent power consumption devices are described herein. The novel methods may include monitoring power consumption and thermal conditions of the plurality of power consumption (i.e., power/heat dissipation) devices that are configured to independently self-regulate their power/thermal production. A determination may then be made as to whether an aggregate of the power and/or thermal production of the plurality of power consumption devices exceed a threshold. And if the aggregate of the power or thermal production of the power consumption devices was determined to exceed the threshold, terminating, at least partially, the independent self-regulating of the thermal production and intervening in the thermal regulation of one or more of the power consumption devices. In contrast, if the aggregate of the power and/or thermal production of the plurality of power consumption devices is determined to be below the threshold then the power consumption devices may be allowed to self-regulate their power consumptions, and in some instances, one or more of the individual power clamps for the one or more of the power consumption devices may be relaxed or raised.
摘要:
Methods and apparatuses for intervening in the self power or thermal regulations of a plurality of independent power consumption devices are described herein. The novel methods may include monitoring power consumption and thermal conditions of the plurality of power consumption (i.e., power/heat dissipation) devices that are configured to independently self-regulate their power/thermal production. A determination may then be made as to whether an aggregate of the power and/or thermal production of the plurality of power consumption devices exceed a threshold. And if the aggregate of the power or thermal production of the power consumption devices was determined to exceed the threshold, terminating, at least partially, the independent self-regulating of the thermal production and intervening in the thermal regulation of one or more of the power consumption devices. In contrast, if the aggregate of the power and/or thermal production of the plurality of power consumption devices is determined to be below the threshold then the power consumption devices may be allowed to self-regulate their power consumptions, and in some instances, one or more of the individual power clamps for the one or more of the power consumption devices may be relaxed or raised.
摘要:
Methods and apparatuses for intervening in the self power or thermal regulations of a plurality of independent power consumption devices are described herein. The novel methods may include monitoring power consumption and thermal conditions of the plurality of power consumption (i.e., power/heat dissipation) devices that are configured to independently self-regulate their power/thermal production. A determination may then be made as to whether an aggregate of the power and/or thermal production of the plurality of power consumption devices exceed a threshold. And if the aggregate of the power or thermal production of the power consumption devices was determined to exceed the threshold, terminating, at least partially, the independent self-regulating of the thermal production and intervening in the thermal regulation of one or more of the power consumption devices. In contrast, if the aggregate of the power and/or thermal production of the plurality of power consumption devices is determined to be below the threshold then the power consumption devices may be allowed to self-regulate their power consumptions, and in some instances, one or more of the individual power clamps for the one or more of the power consumption devices may be relaxed or raised.
摘要:
An embodiment of a system for avoiding race conditions when using edge-triggered interrupts includes a processor that asserts an interrupt pending signal in response to the receipt of an edge-triggered interrupt. A power management device receives the interrupt pending signal. If the processor is in a low power state when it asserts the interrupt pending signal, then the power management device causes the processor to enter a high power state to allow the processor to service the pending interrupt.
摘要:
A high performance Local Bus Peripheral Interface (LBPI) for a computer local bus and its high performance peripheral interface(s), using a pipelined architecture to increase the use of the available data transfer bandwidth. To accomplish the above, the LBPI, which is coupled between the computer local bus and the peripheral interface(s), is provided a pipelined architecture which includes a Read Ahead Buffer, a Read Ahead Counter, a Data Out Latch, and a Controlling State Machine with a Configuration Register. In one embodiment, the LBPI can be selectably configured to couple on the host side to either a VL bus or PCI bus. Efficiency of Read-Ahead operations is further enhanced by maintaining a countdown of the number of words of a data sector already transferred and/or "snooping" the peripheral device commands from the computer to intelligently predict the occurrence of subsequent read data transfers commands. The Controlling State Machine also "snoops" the peripheral device commands to maintain its record of the operating parameters of the peripheral devices and also keeps track of which of the devices is currently active. In one embodiment, the LBPI supports DMA and PIO data transfers on the peripheral side. In another embodiment, the LBPI translates memory data transfers into IO data transfers to improve efficiency of IO data transfers. A DMA Timeout Counter is used during DMA mode data transfer operations to prevent the system from indefinitely waiting for an appropriate DMA Request Signal from a selected peripheral. During a DMA mode data transfer operation, forced interrupts may be generated and transmitted to the host in order to emulate a PIO mode data transfer operation. During a DMA mode data transfer operation, an imposed status or "Fake 3F6" register is utilized to transmit status information to the host system.
摘要:
A method and apparatus for performing logical attachments and detachments in a hot-plug-in data bus is described. A hot-plug-in data bus may utilize pull-down resistors to keep bus signals near a low voltage level when bus units are physically detached. Active pull-up resistors may then raise the bus signals away from ground when the bus units are physically attached via cabling or other forms of interconnection. The pull-up resistors may be switched away from the pull-up voltage source, which allows the remaining pull-down resistors to pull the bus signals down to the voltage levels corresponding to physical detachment of the cabling.
摘要:
A high performance Local Bus Peripheral Interface (LBPI) for a computer local bus and its high performance peripheral interface(s) uses a pipelined architecture to increase the use of the available data transfer bandwidth. In one embodiment, the LBPI can be selectably configured to couple on the host side to either a VL bus or PCI bus. The LBPI maintains a countdown of the number of words of a data sector already transferred and/or "snoops" the peripheral device commands from the computer to predict the occurrence of subsequent read data transfers commands. The Controlling State Machine also "snoops" the peripheral device commands to maintain its record of the operating parameters of the peripheral devices and also keeps track of which of the devices is currently active. In one embodiment, the LBPI supports DMA and PIO data transfers on the peripheral side. In another embodiment, the LBPI translates memory data transfers into IO data transfers to improve efficiency of IO data transfers. A DMA Timeout Counter is used during DMA mode data transfer operations to prevent the system from indefinitely waiting for an appropriate DMA Request Signal from a selected peripheral. During a DMA mode data transfer operation, forced interrupts may be generated and transmitted to the host in order to emulate a PIO mode data transfer operation. During a DMA mode data transfer operation, an imposed status or "Fake 3F6" register is utilized to transmit status information to the host system.
摘要:
An audio noise mitigation approach. For one aspect, a first voltage associated with a first power management state is provided. A signal responsive to an indication associated with at least a first type of periodic exit event is received and responsive to the signal, a transition to a second voltage associated with a second state is initiated, a rate of the transition to the second voltage being slower than a similar voltage transition initiated in response to a non-periodic exit event.
摘要:
Systems and methods of managing power consumption provide for placing a processor in a non-snoopable state while a storage interface associated with the processor is enabled for bus mastering. In one embodiment, the bus mastering results in traffic between the storage interface and a storage device, where the traffic is monitored and the processor is placed a snoopable state when traffic is moving, and in the non-snoopable idle state if the traffic ceases for a period of time.