公开(公告)号：US20070178711A1

公开(公告)日：2007-08-02

申请号：US11341201

申请日：2006-01-27

申请人： Lucien Bissey ,  William Stanton

发明人： Lucien Bissey ,  William Stanton

IPC分类号： H01L21/31

CPC分类号： G03F7/0035 ,  H01L21/31144 ,  H01L21/312 ,  H01L21/76897

摘要： The invention includes semiconductor constructions containing optically saturable absorption layers. An optically saturable absorption layer can be between photoresist and a topography, with the topography having two or more surfaces of differing reflectivity relative to one another. The invention also includes methods of patterning photoresist in which a saturable absorption layer is provided between the photoresist and a topography with surfaces of differing reflectivity, and in which the differences in reflectivity are utilized to enhance the accuracy with which an image is photolithographically formed in the photoresist.

摘要翻译： 本发明包括含光学可饱和吸收层的半导体结构。 光可饱和吸收层可以在光致抗蚀剂和形貌之间，其中形貌具有两个或更多个相对于彼此具有不同反射率的表面。 本发明还包括图案化光刻胶的方法，其中在光致抗蚀剂和具有不同反射率的表面之间设置饱和吸收层的光刻胶，并且其中反射率的差异被用于增强图像在光刻胶中形成的精度 光刻胶。

公开(公告)号：US20060118846A1

公开(公告)日：2006-06-08

申请号：US11010951

申请日：2005-08-04

申请人： Lucien Bissey ,  Kevin Duesman

发明人： Lucien Bissey ,  Kevin Duesman

IPC分类号： H01L29/94

CPC分类号： H01L29/7827 ,  H01L21/2257 ,  H01L27/10876 ,  H01L27/10882 ,  H01L27/10885 ,  H01L27/10891 ,  H01L27/11803 ,  H01L29/42392

摘要： A memory structure having a vertically oriented access transistor with an annular gate region and a method for fabricating the structure. More specifically, a transistor is fabricated such that the channel of the transistor extends outward with respect to the surface of the substrate. An annular gate is fabricated around the vertical channel such that it partially or completely surrounds the channel. A buried annular bitline may also be implemented. After the vertically oriented transistor is fabricated with the annular gate, a storage device may be fabricated over the transistor to provide a memory cell.

摘要翻译： 具有具有环形栅极区域的垂直取向的存取晶体管的存储器结构和用于制造该结构的方法。 更具体地，制造晶体管，使得晶体管的沟道相对于衬底的表面向外延伸。 围绕垂直通道制造环形门，使得其部分地或完全地围绕通道。 还可以实现埋置的环形位线。 在用环形栅极制造垂直取向的晶体管之后，可以在晶体管上制造存储器件以提供存储器单元。

公开(公告)号：US20070145464A1

公开(公告)日：2007-06-28

申请号：US11708616

申请日：2007-02-21

申请人： Thomas Voshell ,  Lucien Bissey ,  Kevin Duesman

发明人： Thomas Voshell ,  Lucien Bissey ,  Kevin Duesman

IPC分类号： H01L29/76

CPC分类号： G11C11/404 ,  H01L27/0207 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10876 ,  H01L27/10885 ,  H01L29/4238 ,  H01L29/66666 ,  H01L29/7827

摘要： A memory structure has a vertically oriented access transistor with an annular gate region. A transistor is fabricated such that the channel of the transistor extends outward with respect to the surface of the substrate. An annular gate is fabricated around the vertical channel such that it partially or completely surrounds the channel. A buried annular bitline may also be implemented. After the vertically oriented transistor is fabricated with the annular gate, a storage device may be fabricated over the transistor to provide a memory cell.

公开(公告)号：US20050023621A1

公开(公告)日：2005-02-03

申请号：US10930264

申请日：2004-08-31

申请人： Warren Farnworth ,  Lucien Bissey

发明人： Warren Farnworth ,  Lucien Bissey

IPC分类号： H01L21/285 ,  H01L21/336 ,  H01L21/768 ,  H01L27/02 ,  H01L29/06 ,  H01L23/62

CPC分类号： H01L29/66636 ,  H01L21/28512 ,  H01L21/76895 ,  H01L27/0251 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrostatic discharge (ESD) protection device connects to a bonding pad and an internal circuit for protecting the internal circuit during an ESD event. The ESD protection device includes a transistor connected between the bonding pad and a supply node. The transistor includes a first doped region having a textured surface connected to the bonding pad, and a second doped region having a textured surface connected to the supply node.

摘要翻译： 静电放电（ESD）保护器件连接到接合焊盘和内部电路，用于在ESD事件期间保护内部电路。 ESD保护器件包括连接在接合焊盘和电源节点之间的晶体管。 晶体管包括具有连接到焊盘的纹理化表面的第一掺杂区域和具有连接到电源节点的纹理表面的第二掺杂区域。