公开(公告)号：US20220069773A1

公开(公告)日：2022-03-03

申请号：US17306960

申请日：2021-05-04

Applicant: MEDIATEK INC.

Inventor： Sen-You Liu ,  Chien-Wei Chen ,  Keng-Meng Chang ,  Yao-Chi Wang

IPC: H03B5/36

Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range.

公开(公告)号：US20230396215A1

公开(公告)日：2023-12-07

申请号：US18088612

申请日：2022-12-25

Applicant: MEDIATEK INC.

Inventor： Keng-Meng Chang ,  Sen-You Liu ,  Yao-Chi Wang

IPC: H03B5/32

CPC classification number: H03B5/32 ,  H03B2200/005 ,  H03B2200/0042 ,  H03B2200/0058

Abstract: A reconfigurable crystal oscillator and a method for reconfiguring a crystal oscillator are provided. The reconfigurable crystal oscillator includes a transconductance circuit, a feedback resistor, a crystal tank, an input-end capacitor and an output-end capacitor. Both of the feedback resistor and the crystal tank are coupled between an input terminal and an output terminal of the transconductance circuit. The input-end capacitor is coupled to the input terminal of the transconductance circuit, and the output-end capacitor is coupled to the output terminal of the transconductance circuit. In particular, the transconductance circuit is configured to provide a transconductance, and when an operation mode of the reconfigurable crystal oscillator is switched, an input-end capacitance of the input-end capacitor and an output-end capacitance of the output-end capacitor are switched, respectively.

公开(公告)号：US20220209714A1

公开(公告)日：2022-06-30

申请号：US17693454

申请日：2022-03-14

Applicant: MEDIATEK INC.

Inventor： Sen-You Liu ,  Chien-Wei Chen ,  Keng-Meng Chang ,  Yao-Chi Wang

IPC: H03B5/36

Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range. For example, the specific voltage range is determined according to a second voltage level.

公开(公告)号：US11342884B2

公开(公告)日：2022-05-24

申请号：US17306959

申请日：2021-05-04

Applicant: MEDIATEK INC.

Inventor： Chien-Wei Chen ,  Yu-Li Hsueh ,  Keng-Meng Chang ,  Yao-Chi Wang

IPC: H03B5/36 ,  H03K19/21

Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may generate a reset signal including at least one reset pulse for resetting the bias voltage. In addition, the reset signal is generated without calibrating the at least one reset pulse to a zero-crossing point of the sinusoidal wave.

公开(公告)号：US11387781B1

公开(公告)日：2022-07-12

申请号：US17395439

申请日：2021-08-05

Applicant: MEDIATEK INC.

Inventor： Keng-Meng Chang ,  Yao-Chi Wang ,  Yanjie Mo ,  Sen-You Liu ,  Chun-Ming Lin

IPC: H03B5/32 ,  H03K5/00 ,  H03B5/36 ,  H03B5/12 ,  H03L7/00 ,  H03L7/06

Abstract: A fast start-up crystal oscillator (XO) and a fast start-up method thereof are provided. The fast start-up XO may include a XO core circuit, a frequency synthesizer, and a fast start-up interfacing circuit, wherein the frequency synthesizer may include a voltage control oscillator (VCO) and a divider. The XO core circuit generates a XO signal having a XO frequency. The VCO generates a VCO clock having a VCO frequency, and the divider generates a divided clock having a divided frequency, wherein the VCO frequency is divided by a divisor of the divider to obtain the divided frequency. The fast start-up interfacing circuit transmits the divided clock to the XO core circuit, and then generates a reference clock having the XO frequency according to the XO signal. More particularly, the VCO frequency is calibrated according to the reference clock, in order to make the divided frequency approach the XO frequency.

公开(公告)号：US20170346464A1

公开(公告)日：2017-11-30

申请号：US15498525

申请日：2017-04-27

Applicant: MEDIATEK Inc.

Inventor： Keng-Meng Chang ,  Yao-Chi Wang

IPC: H03H11/30 ,  H03K5/159 ,  H03K19/21

CPC classification number: H03H11/30 ,  H03K5/159 ,  H03K19/0005 ,  H03K19/017545 ,  H03K19/21 ,  H03L1/00 ,  H03L1/022 ,  H03L7/0816 ,  H03L7/103 ,  H03L7/113 ,  H03L7/18 ,  H04B1/0475 ,  H04B1/1638 ,  H04L25/0278 ,  H04L25/028 ,  H04L25/0292

Abstract: A biased impedance circuit, an impedance adjustment circuit, and an associated signal generator are provided. The biased impedance circuit is coupled to a summation node and applies a biased impedance to the summation node. A periodic input signal is received at the summation node. The biased impedance circuit includes a switching circuit for receiving an output window signal, wherein a period of the output window signal is shorter than a period of the periodic input signal. The switching circuit includes a low impedance path and a high impedance path. The low impedance sets the biased impedance to a first impedance when the output window signal is at a first voltage level. The high impedance path sets the biased impedance to a second impedance when the output window signal is at a second voltage level. The first impedance is less than the second impedance.

公开(公告)号：US12047038B2

公开(公告)日：2024-07-23

申请号：US18088612

申请日：2022-12-25

Applicant: MEDIATEK INC.

Inventor： Keng-Meng Chang ,  Sen-You Liu ,  Yao-Chi Wang

IPC: H03B5/32 ,  H03B5/36

CPC classification number: H03B5/32 ,  H03B5/366 ,  H03B2200/0042 ,  H03B2200/005 ,  H03B2200/0058 ,  H03B2200/009

Abstract: A reconfigurable crystal oscillator and a method for reconfiguring a crystal oscillator are provided. The reconfigurable crystal oscillator includes a transconductance circuit, a feedback resistor, a crystal tank, an input-end capacitor and an output-end capacitor. Both of the feedback resistor and the crystal tank are coupled between an input terminal and an output terminal of the transconductance circuit. The input-end capacitor is coupled to the input terminal of the transconductance circuit, and the output-end capacitor is coupled to the output terminal of the transconductance circuit. In particular, the transconductance circuit is configured to provide a transconductance, and when an operation mode of the reconfigurable crystal oscillator is switched, an input-end capacitance of the input-end capacitor and an output-end capacitance of the output-end capacitor are switched, respectively.

公开(公告)号：US11671056B2

公开(公告)日：2023-06-06

申请号：US17693454

申请日：2022-03-14

Applicant: MEDIATEK INC.

Inventor： Sen-You Liu ,  Chien-Wei Chen ,  Keng-Meng Chang ,  Yao-Chi Wang

IPC: H03B5/36

CPC classification number: H03B5/36 ,  H03B5/362 ,  H03B5/364 ,  H03B2200/009

Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range. For example, the specific voltage range is determined according to a second voltage level.

公开(公告)号：US20220069772A1

公开(公告)日：2022-03-03

申请号：US17306959

申请日：2021-05-04

Applicant: MEDIATEK INC.

Inventor： Chien-Wei Chen ,  Yu-Li Hsueh ,  Keng-Meng Chang ,  Yao-Chi Wang

IPC: H03B5/36 ,  H03K19/21

Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may generate a reset signal including at least one reset pulse for resetting the bias voltage. In addition, the reset signal is generated without calibrating the at least one reset pulse to a zero-crossing point of the sinusoidal wave.

公开(公告)号：US10826429B2

公开(公告)日：2020-11-03

申请号：US16172926

申请日：2018-10-29

Applicant: MEDIATEK Inc.

Inventor： Keng-Meng Chang ,  Yun-Chen Chuang ,  Yao-Chi Wang

IPC: H03B5/12 ,  H03B5/04 ,  H03L7/099 ,  H03L1/00 ,  H02M3/158

Abstract: A compensation module, an oscillation circuit and associated compensation method for reducing an oscillation frequency variation in an output oscillation signal of a voltage-controlled oscillator (VCO) core are provided. The compensation module includes a compensation circuit and a polarity selection circuit. The compensation circuit has a capacitance value related to voltages of a first and a second receiving terminals. The oscillation frequency variation is changed with the capacitance value. The polarity selection circuit conducts a periodic regulated signal to one of the first receiving terminal and the second receiving terminal. The polarity selection circuit conducts a filtered bias signal to the other of the first receiving terminal and the second receiving terminal. The periodic regulated signal is sensitive to a regulated voltage variation, and the filtered bias signal is insensitive to the regulated voltage variation.