公开(公告)号：US11670375B2

公开(公告)日：2023-06-06

申请号：US17458211

申请日：2021-08-26

Applicant: Micron Technology, Inc.

Inventor： Hua Tan ,  Jingxun Eric Wu ,  Yingying Zhu ,  Hui Yang ,  Bo Zhou

IPC: G11C16/04 ,  G11C16/10 ,  G06F3/06 ,  G11C16/26 ,  G11C16/06 ,  G11C29/10 ,  G11C29/50

CPC classification number: G11C16/10 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0679 ,  G11C16/0483 ,  G11C16/06 ,  G11C16/26 ,  G11C29/10 ,  G11C29/50

Abstract: A memory device provides a memory array including memory cells, a temperature sensing circuit, and a memory control unit operatively coupled to the memory array. The memory control unit includes a processor. The processor is configured to receive temperature information from the temperature sensing circuit, initiate programming of the memory cells with data using a first threshold voltage distribution when the temperature information indicates an operating temperature is in a first temperature range, and initiate programming of the memory cells with data using a second threshold voltage distribution when the temperature information indicates the operating temperature is in a second temperature range.

公开(公告)号：US11107533B2

公开(公告)日：2021-08-31

申请号：US16484881

申请日：2018-12-28

Applicant: Micron Technology, Inc.

Inventor： Hua Tan ,  Jingxun Eric Wu ,  Yingying Zhu ,  Hui Yang ,  Bo Zhou

IPC: G11C16/04 ,  G11C16/10 ,  G06F3/06 ,  G11C16/26 ,  G11C16/06 ,  G11C29/10 ,  G11C29/50

Abstract: A memory array including memory cells, a temperature sensing circuit, and a memory control unit operatively coupled to the memory array. The memory control unit includes a processor. The processor is configured to receive temperature information from the temperature sensing circuit, initiate programming of the memory cells with data using a first threshold voltage distribution when the temperature information indicates an operating temperature is in a first temperature range, and initiate programming of the memory cells with data using a second threshold voltage distribution when the temperature information indicates the operating temperature is in a second temperature range.

公开(公告)号：US20230143181A1

公开(公告)日：2023-05-11

申请号：US16968371

申请日：2019-08-27

Applicant: Micron Technology, Inc.

Inventor： Hua Tan ,  Hui Yang ,  Mauro Luigi Sali

IPC: G06F3/06 ,  G06F12/0815 ,  G06F12/02

CPC classification number: G06F3/0619 ,  G06F3/0656 ,  G06F3/0679 ,  G06F12/0815 ,  G06F12/0253 ,  G06F2212/1016

Abstract: Upon receipt of a synchronize cache command, valid host data size in the SRAM write buffer is checked. If the valid data size is greater than a predetermined value, valid host data in the SRAM write buffer is flushed directly into an open MLC block based on a one-pass transfer program. However, if the valid host data size is less than the predetermined value, the host data is not flushed to an open MLC block but is instead flushed into a temporary storage location to satisfy the command specifications for a command to synchronize a cache. The host data is maintained in the SRAM write buffer, which receives additional data until full. Once full, the host data in the SRAM write buffer is transferred to an open MLC block in one-pass. If the host data in the write buffer is lost, it may be recovered from the temporary storage location.

公开(公告)号：US20210391013A1

公开(公告)日：2021-12-16

申请号：US17458211

申请日：2021-08-26

Applicant: Micron Technology, Inc.

Inventor： Hua Tan ,  Jingxun Eric Wu ,  Yingying Zhu ,  Hui Yang ,  Bo Zhou

IPC: G11C16/10 ,  G11C16/04 ,  G06F3/06 ,  G11C16/26 ,  G11C16/06 ,  G11C29/10 ,  G11C29/50

Abstract: A memory device comprises a memory array including memory cells, a temperature sensing circuit, and a memory control unit operatively coupled to the memory array. The memory control unit includes a processor. The processor is configured to receive temperature information from the temperature sensing circuit, initiate programming of the memory cells with data using a first threshold voltage distribution when the temperature information indicates an operating temperature is in a first temperature range, and initiate programming of the memory cells with data using a second threshold voltage distribution when the temperature information indicates the operating temperature is in a second temperature range.

公开(公告)号：US20200219568A1

公开(公告)日：2020-07-09

申请号：US16484881

申请日：2018-12-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Hua Tan ,  Jingxun Eric Wu ,  Yingying Zhu ,  Hui Yang ,  Bo Zhou

IPC: G11C16/10 ,  G11C16/04 ,  G11C16/26 ,  G06F3/06

Abstract: A memory device comprises a memory array including memory cells, a temperature sensing circuit, and a memory control unit operatively coupled to the memory array. The memory control unit includes a processor. The processor is configured to receive temperature information from the temperature sensing circuit, initiate programming of the memory cells with data using a first threshold voltage distribution when the temperature information indicates an operating temperature is in a first temperature range, and initiate programming of the memory cells with data using a second threshold voltage distribution when the temperature information indicates the operating temperature is in a second temperature range.