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公开(公告)号：US20230069329A1
公开(公告)日：2023-03-02
申请号：US17462167
申请日：2021-08-31
Applicant: Micron Technology, Inc.
Inventor： Steven G. Wurzer , Jeremy Kuehlwein , Michael J. O'Brien
Abstract: A system includes a mixer of a phase interpolator. The mixer includes a dynamic load whose output signal is coupled to a subsequent stage of the phase interpolator. The dynamic load is configured to provide an alternating current (AC) signal to the subsequent stage of the phase interpolator as input clock signals. The mixer further includes a static load whose output signal is coupled to the subsequent stage of the phase interpolator in parallel with the respective output signal line of the dynamic load. The static load configured to provide a direct current (DC) signal to the phase interpolator temporarily in replacement of the respective AC signals to prevent output signals of the subsequent stage of the phase interpolator from being unpredictable.
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公开(公告)号：US10366041B2
公开(公告)日：2019-07-30
申请号：US15418586
申请日：2017-01-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jeremy Kuehlwein , Gregory King , Michael Stay
Abstract: According to one embodiment, an apparatus comprises a differential signaling bus, a tristate transmitter connected with the differential signaling bus, the tristate transmitter configured to provide a signal on the differential signaling bus responsive to a corresponding control signal, a receiver, a pair of differential inputs of the receiver connected with the differential signaling bus and configured to receive the signal from the differential signaling bus, and a termination circuit configured to couple a first differential input of the pair of differential inputs to a first voltage source and to couple a second differential input of the pair of differential inputs to a second voltage source, wherein the first and second voltage sources have different voltage levels.
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公开(公告)号：US10256998B1
公开(公告)日：2019-04-09
申请号：US15970630
申请日：2018-05-03
Applicant: Micron Technology, Inc.
Inventor： Jeremy Kuehlwein , Gregory A. King
IPC: H04L25/02 , H03K19/0185
Abstract: Methods, systems, and devices for mitigating supply noise in single-ended current mode logic (CML) transmitters are described. A first current source may generate a first bias current for a first differential transistor pair included in a CML transmitter, and a second current source may generate a second bias current for a second differential transistor pair. The first differential transistor pair may route the first bias current through either leg of the first differential transistor pair based on a polarity of an input signal and the second differential transistor pair may route the second bias current through either leg of the second differential transistor pair based on the polarity of the input signal. Based on a first polarity, the second bias current may be routed to a ground reference, and based on a second polarity, the second bias current may be routed through the first differential transistor pair to modify a load current internal to the CML transmitter.
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公开(公告)号：US20180217960A1
公开(公告)日：2018-08-02
申请号：US15418586
申请日：2017-01-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jeremy Kuehlwein , Gregory King , Michael Stay
CPC classification number: G06F13/4286 , G06F13/4022 , H01L25/0657 , H01L25/18 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H03F1/26 , H03F3/245 , H03F3/45475 , H03F2203/45051 , H03F2203/45151 , H03F2203/45534
Abstract: According to one embodiment, an apparatus comprises a differential signaling bus, a tristate transmitter connected with the differential signaling bus, the tristate transmitter configured to provide a signal on the differential signaling bus responsive to a corresponding control signal, a receiver, a pair of differential inputs of the receiver connected with the differential signaling bus and configured to receive the signal from the differential signaling bus, and a termination circuit configured to couple a first differential input of the pair of differential inputs to a first voltage source and to couple a second differential input of the pair of differential inputs to a second voltage source, wherein the first and second voltage sources have different voltage levels.
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公开(公告)号：US20250021501A1
公开(公告)日：2025-01-16
申请号：US18767645
申请日：2024-07-09
Applicant: Micron Technology, Inc.
Inventor： Jeremy Kuehlwein , Neil Petrie , Ming-ta Hsieh , Gregory A. King
Abstract: Input/output (I/O) components can include electromechanical switches that can be placed respectively on signal lines coupled between transceivers and I/O pads. Electromechanical switches can operate to isolate respective transceivers from the other transceivers and/or I/O pads to protect those transceivers from ESD events. Electromechanical switches of I/O components can be micro-electromechanical systems (MEMS) switches.
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Patent Agency Ranking
公开(公告)号：US11682437B2
公开(公告)日：2023-06-20
申请号：US17462167
申请日：2021-08-31
Applicant: Micron Technology, Inc.
Inventor： Steven G. Wurzer , Jeremy Kuehlwein , Michael J. O'Brien
Abstract: A system includes a mixer of a phase interpolator. The mixer includes a dynamic load whose output signal is coupled to a subsequent stage of the phase interpolator. The dynamic load is configured to provide an alternating current (AC) signal to the subsequent stage of the phase interpolator as input clock signals. The mixer further includes a static load whose output signal is coupled to the subsequent stage of the phase interpolator in parallel with the respective output signal line of the dynamic load. The static load configured to provide a direct current (DC) signal to the phase interpolator temporarily in replacement of the respective AC signals to prevent output signals of the subsequent stage of the phase interpolator from being unpredictable.
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公开(公告)号：US11238006B2
公开(公告)日：2022-02-01
申请号：US16412254
申请日：2019-05-14
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jeremy Kuehlwein , Gregory King , Michael Stay
Abstract: According to one embodiment, an apparatus comprises a differential signaling bus, a tristate transmitter connected with the differential signaling bus, the tristate transmitter configured to provide a signal on the differential signaling bus responsive to a corresponding control signal, a receiver, a pair of differential inputs of the receiver connected with the differential signaling bus and configured to receive the signal from the differential signaling bus, and a termination circuit configured to couple a first differential input of the pair of differential inputs to a first voltage source and to couple a second differential input of the pair of differential inputs to a second voltage source, wherein the first and second voltage sources have different voltage levels.
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公开(公告)号：US20190266121A1
公开(公告)日：2019-08-29
申请号：US16412254
申请日：2019-05-14
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jeremy Kuehlwein , Gregory King , Michael Stay
Abstract: According to one embodiment, an apparatus comprises a differential signaling bus, a tristate transmitter connected with the differential signaling bus, the tristate transmitter configured to provide a signal on the differential signaling bus responsive to a corresponding control signal, a receiver, a pair of differential inputs of the receiver connected with the differential signaling bus and configured to receive the signal from the differential signaling bus, and a termination circuit configured to couple a first differential input of the pair of differential inputs to a first voltage source and to couple a second differential input of the pair of differential inputs to a second voltage source, wherein the first and second voltage sources have different voltage levels.
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公开(公告)号：US10277426B1
公开(公告)日：2019-04-30
申请号：US16113538
申请日：2018-08-27
Applicant: Micron Technology, Inc.
Inventor： Jeremy Kuehlwein , Gregory A. King
IPC: H04L25/02 , H03K19/0185
Abstract: Methods, systems, and devices for mitigating supply noise in single-ended current mode logic (CML) transmitters are described. A first current source may generate a first bias current for a first differential transistor pair included in a CML transmitter, and a second current source may generate a second bias current for a second differential transistor pair. The first differential transistor pair may route the first bias current through either leg of the first differential transistor pair based on a polarity of an input signal and the second differential transistor pair may route the second bias current through either leg of the second differential transistor pair based on the polarity of the input signal. Based on a first polarity, the second bias current may be routed to a ground reference, and based on a second polarity, the second bias current may be routed through the first differential transistor pair to modify a load current internal to the CML transmitter.
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公开(公告)号：US20250055497A1
公开(公告)日：2025-02-13
申请号：US18770390
申请日：2024-07-11
Applicant: Micron Technology, Inc.
Inventor： Robert Wimmer , Jeremy Kuehlwein
Abstract: Systems, methods and apparatus are provided for transceiver capacitance reduction. An example apparatus can comprise a first signal driver of a transceiver, a second signal driver of the transceiver, and an input/output (I/O) pad coupled to the first and second signal drivers. The apparatus can further comprise a resistor divider of a plurality of resistor dividers coupled to the first signal driver. The resistor divider, when enabled, can reduce capacitance of the first signal driver and maintain the reduced capacitance while the second signal driver is actively driving a signal.
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