Apparatus containing circuit-protection devices

    公开(公告)号:US10163893B1

    公开(公告)日:2018-12-25

    申请号:US15687732

    申请日:2017-08-28

    Inventor: Michael Smith

    Abstract: Apparatus including an array of memory cells may include circuit-protection devices that may include first and second circuit-protection units, a first gate having a first source/drain connected to a first node of the first circuit-protection unit, and a second gate having a first source/drain connected to a first node of the second circuit-protection unit, wherein a second source/drain of the first gate is connected to a second source/drain of the second gate.

    Circuit-protection devices
    4.
    发明授权

    公开(公告)号:US11335675B2

    公开(公告)日:2022-05-17

    申请号:US17128752

    申请日:2020-12-21

    Inventor: Michael Smith

    Abstract: Circuit-protection devices might include first and second circuit-protection units each comprising a first node and a second node, a first field-effect transistor having a first source/drain connected to the first node of the first circuit-protection unit, and a second field-effect transistor having a first source/drain connected to the first node of the second circuit-protection unit, wherein a second source/drain of the first field-effect transistor merges with a second source/drain of the second field-effect transistor.

    Apparatus containing circuit-protection devices

    公开(公告)号:US10892259B2

    公开(公告)日:2021-01-12

    申请号:US16866723

    申请日:2020-05-05

    Inventor: Michael Smith

    Abstract: Apparatus having an array of memory cells might include a first transistor having a control gate, a first source/drain connected to a first contact for connection to peripheral circuitry, and a second source/drain connected to a second contact for connection to a data line selectively connected to a respective set of strings of series-connected memory cells of the array of memory cells; and a second transistor having a control gate, a first source/drain connected to the second contact, and a second source/drain connected to a third contact for connection to a common source selectively connected to each string of series-connected memory cells of the respective set of strings of series-connected memory cells for the data line.

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