公开(公告)号：US20020185628A1

公开(公告)日：2002-12-12

申请号：US10167564

申请日：2002-06-11

Applicant: Micron Technology, Inc.

Inventor： Karl M. Robinson ,  Whonchee Lee

IPC: C09K013/00

CPC classification number: B24B37/04 ,  B24B57/02 ,  C09G1/02

Abstract: A composition and method of construction and use therefor in chemical-mechanical polishing (nullCMPnull) of one or more substrate assemblies is described. More particularly, a polishing solution comprising etchant, abrasive particles, and surfactant and methods of mixing to form and to dispense the polishing solution are described. One or more of the etchant, abrasive particles, and/or surfactant may comprise a liquid medium. Etchant, surfactant or abrasive particles may be premixed, mixed in-situ (nullpoint of use mixingnull), or any combination thereof. The surfactant may be ionic or nonionic. In particular, a polyoxyethylene may be used, and more particularly, a polyoxyethylene ester or ether may be used.

Abstract translation: 描述了一种或多种基板组件的化学机械抛光（“CMP”）的构造和用途的组合物和方法。 更具体地，描述了包括蚀刻剂，磨料颗粒和表面活性剂的抛光溶液以及混合以形成和分配抛光溶液的方法。 蚀刻剂，磨料颗粒和/或表面活性剂中的一种或多种可以包含液体介质。 蚀刻剂，表面活性剂或磨料颗粒可以预混合，原位混合（“使用点混合”）或其任何组合。 表面活性剂可以是离子的或非离子的。 特别地，可以使用聚氧乙烯，更具体地可以使用聚氧乙烯酯或醚。

公开(公告)号：US20020055262A1

公开(公告)日：2002-05-09

申请号：US09997917

申请日：2001-11-30

Applicant: Micron Technology, Inc.

Inventor： Whonchee Lee ,  Yongjun Jeff Hu

IPC: C09K013/00 ,  H01L021/302 ,  H01L021/461

CPC classification number: C23F1/28 ,  H01L21/32134 ,  H01L21/76895

Abstract: An etching method for use in integrated circuit fabrication includes providing a metal nitride layer on a substrate assembly, providing regions of cobalt silicide on first portions of the metal nitride layer, and providing regions of cobalt on second portions of the metal nitride layer. The regions of cobalt and the second portions of the metal nitride layer are removed with at least one solution including a mineral acid and a peroxide. The mineral acid may be selected from the group including HCl, H2SO4, H3PO4, HNO3, and dilute HF (preferably the mineral acid is HCl) and the peroxide may be hydrogen peroxide. Further, the removal of the regions of cobalt and the second portions of the metal nitride layer may include a one step process or a two step process. In the one step process, the regions of cobalt and the second portions of the metal nitride layer are removed with a single solution including the mineral acid and the peroxide. In the two step process, the regions of cobalt are removed with a first solution containing a mineral acid and a peroxide and the second portions of the metal nitride layer are removed with a second solution containing a peroxide. An etching composition including a mineral acid and a peroxide, preferably, HCl and hydrogen peroxide, is also described. The etching methods and compositions may be used in forming structures such as word lines, gate electrodes, local interconnects, etc.

公开(公告)号：US20020060307A1

公开(公告)日：2002-05-23

申请号：US10050639

申请日：2002-01-15

Applicant: Micron Technology, Inc.

Inventor： Whonchee Lee ,  Yongjun Jeff Hu

IPC: C09K013/00 ,  H01L021/302 ,  H01L021/461

CPC classification number: C23F1/28 ,  H01L21/32134 ,  H01L21/76895

Abstract: An etching method for use in integrated circuit fabrication includes providing a metal nitride layer on a substrate assembly, providing regions of cobalt silicide on first portions of the metal nitride layer, and providing regions of cobalt on second portions of the metal nitride layer. The regions of cobalt and the second portions of the metal nitride layer are removed with at least one solution including a mineral acid and a peroxide. The mineral acid may be selected from the group including HCl, H2SO4, H3PO4, HNO3, and dilute HF (preferably the mineral acid is HCl) and the peroxide may be hydrogen peroxide. Further, the removal of the regions of cobalt and the second portions of the metal nitride layer may include a one step process or a two step process. In the one step process, the regions of cobalt and the second portions of the metal nitride layer are removed with a single solution including the mineral acid and the peroxide. In the two step process, the regions of cobalt are removed with a first solution containing a mineral acid and a peroxide and the second portions of the metal nitride layer are removed with a second solution containing a peroxide. An etching composition including a mineral acid and a peroxide, preferably, HCl and hydrogen peroxide, is also described. The etching methods and compositions may be used in forming structures such as word lines, gate electrodes, local interconnects, etc.

Abstract translation: 用于集成电路制造的蚀刻方法包括在衬底组件上提供金属氮化物层，在金属氮化物层的第一部分上提供钴硅化物的区域，以及在金属氮化物层的第二部分上提供钴区域。 用至少一种包含无机酸和过氧化物的溶液除去钴的区域和金属氮化物层的第二部分。 无机酸可以选自HCl，H 2 SO 4，H 3 PO 4，HNO 3和稀HF（优选无机酸是HCl），并且过氧化物可以是过氧化氢。 此外，去除钴的区域和金属氮化物层的第二部分可以包括一步法或两步法。 在一步法中，用包含无机酸和过氧化物的单一溶液除去钴的区域和金属氮化物层的第二部分。 在两步法中，用含有无机酸和过氧化物的第一溶液除去钴的区域，并用含有过氧化物的第二溶液除去金属氮化物层的第二部分。 还描述了包含无机酸和过氧化物，优选HCl和过氧化氢的蚀刻组合物。 蚀刻方法和组合物可以用于形成诸如字线，栅电极，局部互连等的结构。

公开(公告)号：US20020052121A1

公开(公告)日：2002-05-02

申请号：US09997928

申请日：2001-11-30

Applicant: Micron Technology, Inc.

Inventor： Whonchee Lee ,  Pai Pan ,  Terry Gilton

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H01L21/30604 ,  H01L21/76224

Abstract: A silicon etching method includes providing a substrate assembly including an exposed silicon region and an exposed oxide region. An etch composition including an ammonium fluoride component, an inorganic acid component, and an oxidizing agent is also provided. The etch composition has a pH in the range of about 7.0 to about 8.0. The substrate assembly is exposed to the etch composition. Exposing the substrate assembly to the etch composition may result in etching the exposed silicon region at an etching rate that is greater than about 3 times the etching rate of the exposed oxide region and/or etching the silicon region at an etch rate greater than about 9 null/minute. The etching method may be used in forming isolation structures. Further, etch compositions for performing the desired etch are provided.

公开(公告)号：US20040155274A1

公开(公告)日：2004-08-12

申请号：US10771042

申请日：2004-02-03

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Scott J. DeBoer ,  Whonchee Lee

IPC: H01L027/108

CPC classification number: H01L28/84 ,  H01L21/32134 ,  H01L28/75

Abstract: Capacitor structures and capacitors with edge zones that are substantially free of hemispherical grain silicon along the upper edges of the capacitor structures are disclosed. The resulting recessed hemispherical grain silicon layers reduce or prevent separation of particles from the hemispherical grain silicon layer during subsequent manufacturing processes, thereby reducing defects and increasing throughput. Also disclosed are methods of forming the capacitor structures and capacitors in which the silicon layer used to form the hemispherical grain silicon is selectively removed to provide an edge zone that is substantially free of hemispherical grain silicon.

公开(公告)号：US20040040863A1

公开(公告)日：2004-03-04

申请号：US10232215

申请日：2002-08-29

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Whonchee Lee ,  Scott Meikle ,  Trung Doan ,  Eugene P. Marsh

IPC: C25D017/00

CPC classification number: C25F7/00 ,  C25F3/02 ,  C25F5/00

Abstract: A method and an apparatus for electrochemically removing a metal from a substrate surface with an electrolyte and an electrode that has a surface defining a shape suitable to cause substantially uniform removal of a metal-containing surface.

Abstract translation: 一种用电解质和电极从衬底表面电化学去除金属的方法和装置，所述电解质和电极具有限定适于基本均匀地除去含金属表面的形状的表面。