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    Direct writing of low carbon conductive material
    1.
    发明申请
    Direct writing of low carbon conductive material 有权

    公开(公告)号：US20010044207A1

    公开(公告)日：2001-11-22

    申请号：US09886332

    申请日：2001-06-21

    Applicant: Micron Technology, Inc.

    Inventor： Eugene P. Marsh

    IPC: H01L021/44

    CPC classification number: H01L21/76894 ,  H01L21/76892

    Abstract: A method for providing a low carbon and/or low oxygen containing conductive material includes providing a substrate assembly having a surface and providing a stream of a precursor containing conductive material to a region proximate the surface of the substrate assembly where the conductive material is to be deposited. A stream of reaction gas is also provided to the region proximate the surface of the substrate assembly where the conductive material is to be deposited. The reaction gas is one of an oxygen or hydrogen containing gas. A focused beam is scanned over the surface of the substrate assembly in the presence of the stream of precursor containing conductive material and the stream of the reaction gas to deposit the conductive material on the surface. The stream of the precursor containing conductive material may include a stream of a precursor containing one of platinum, palladium, rhodium, ruthenium, chromium, silver, and iridium; preferably platinum. Further, the stream of the reaction gas may include a stream of a reaction gas including at least one gas selected from the group of H2, NH3, O2, O3, NO, N2O, H2O2, and R2O2. The method is particularly advantageous in line repair.

    Methods and apparatus for forming rhodium-containing layers
    3.
    发明申请
    Methods and apparatus for forming rhodium-containing layers 有权
    形成含铑层的方法和装置

    公开(公告)号：US20040147086A1

    公开(公告)日：2004-07-29

    申请号：US10755097

    申请日：2004-01-09

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Stefan Uhlenbrock ,  Eugene P. Marsh

    IPC: H01L021/20

    CPC classification number: H01L21/76843 ,  C23C16/16 ,  C23C16/18 ,  H01L21/28556 ,  H01L21/28568 ,  H01L21/32051 ,  H01L21/7687 ,  H01L27/10811 ,  H01L27/10855 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75

    Abstract: A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula LyRhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and electrodes for cell dielectrics for integrated circuits, particularly for DRAM cell capacitors. The alloy barriers protect surrounding materials from oxidation during oxidative recrystallization steps and protect cell dielectrics from loss of oxygen during high temperature processing steps. Also provided are methods for CVD co-deposition of platinum-rhodium alloy diffusion barriers.

    Abstract translation: 提供了使用式LyRhYz的配合物在诸如半导体晶片的基板上形成含铑层的方法。 还提供了化学气相共沉积的铂 - 铑合金屏障和用于集成电路的电池电介质的电极，特别是用于DRAM电池电容器。 在氧化再结晶步骤期间，合金屏障保护周围材料不被氧化，并在高温处理步骤中保护电池电介质免受氧气损失。 还提供了用于铂 - 铑合金扩散阻挡层的CVD共沉积的方法。

    Diffusion barrier layers and methods of forming same
    5.
    发明申请
    Diffusion barrier layers and methods of forming same 审中-公开
    扩散阻挡层及其形成方法

    公开(公告)号：US20020008270A1

    公开(公告)日：2002-01-24

    申请号：US09942200

    申请日：2001-08-29

    Applicant: Micron Technology, Inc.

    Inventor： Eugene P. Marsh

    IPC: H01L031/119 ,  H01L029/94 ,  H01L023/52 ,  H01L023/48

    CPC classification number: H01L28/60 ,  H01L21/28568 ,  H01L21/76897 ,  H01L27/1085

    Abstract: A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface and forming a barrier layer over at least a portion of the surface. The barrier layer is formed of a platinum(x):ruthenium(1-x) alloy, where x is in the range of about 0.60 to about 0.995; preferably, x is in the range of about 0.90 to about 0.98. The barrier layer may be formed by chemical vapor deposition and the portion of the surface upon which the barrier layer is formed may be a silicon containing surface. The method is used in formation of capacitors, storage cells, contact liners, etc.

    Abstract translation: 一种用于制造集成电路的方法包括：提供具有表面的衬底组件，并在表面的至少一部分上形成阻挡层。 阻挡层由铂（x）：钌（1-x）合金形成，其中x在约0.60至约0.995的范围内; 优选地，x在约0.90至约0.98的范围内。 阻挡层可以通过化学气相沉积形成，并且形成阻挡层的表面的部分可以是含硅表面。 该方法用于形成电容器，存储单元，接触衬垫等

    Methods for patterning metal layers for use with forming semiconductor devices
    7.
    发明申请
    Methods for patterning metal layers for use with forming semiconductor devices 失效
    用于形成用于形成半导体器件的金属层的方法

    公开(公告)号：US20010019885A1

    公开(公告)日：2001-09-06

    申请号：US09812157

    申请日：2001-03-19

    Applicant: Micron Technology, Inc.

    Inventor： Eugene P. Marsh

    IPC: H01L021/44

    CPC classification number: H01L21/76864 ,  H01L21/76843 ,  H01L28/55 ,  H01L28/75

    Abstract: The present invention provides a method for forming a discontinuous conductive layer in the fabrication of integrated circuits. The method includes providing a substrate assembly having a surface including at least one metal-containing adhesion region separated by at least one surface region of the substrate assembly. A conductive metal layer is formed on the surface of the substrate assembly. The substrate assembly including the conductive metal layer thereon in then annealed. Any nonadhered conductive metal is removed from the at least one exposed surface region to form a discontinuous conductive metal layer on at least one metal-containing adhesion region, for example, by simply rising the substrate assembly in water. The conductive metal layer can be platinum or ruthenium.

    Abstract translation: 本发明提供了一种在集成电路制造中形成不连续导电层的方法。 该方法包括提供具有包括由基底组件的至少一个表面区域隔开的至少一个含金属粘附区域的表面的基底组件。 在基板组件的表面上形成导电金属层。 衬底组件包括其上的导电金属层然后退火。 从至少一个暴露的表面区域去除任何不连续的导电金属，以在至少一个含金属的粘合区域上形成不连续的导电金属层，例如通过简单地将基底组件升高在水中。 导电金属层可以是铂或钌。

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