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公开(公告)号：US20090183159A1
公开(公告)日：2009-07-16
申请号：US11973000
申请日：2008-01-11
IPC分类号： G06F9/46
CPC分类号： G06F9/467
摘要： A computer-implemented method for managing concurrent transactions includes recording locations written by a first transaction in a first Bloom filter, recording locations to be read by a second transaction in a second Bloom filter, and performing one of a cancellation or a commission of the second transaction based on an intersection of the first Bloom filter and the second Bloom filter.
摘要翻译： 一种用于管理并发交易的计算机实现方法包括在第一布隆过滤器中由第一交易记录的位置记录位置，在第二布隆过滤器中记录由第二交易读取的位置，以及执行第二交易的第二交易中的一个 基于第一个Bloom过滤器和第二个Bloom过滤器的交集进行交易。
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公开(公告)号：US20080288496A1
公开(公告)日：2008-11-20
申请号：US11750056
申请日：2007-05-17
IPC分类号： G06F17/30
摘要： A method and a system for implementing concurrent producer-consumer buffers are provided. The method and system in one aspect uses separate locks, one for putter and another for taker threads operating on a concurrent producer-consumer buffer. The locks operate independently of a notify-wait process.
摘要翻译： 提供了用于实现并发的生产者 - 消费者缓冲器的方法和系统。 方法和系统在一个方面使用单独的锁，一个用于推杆，另一个用于在并发的生产者 - 消费者缓冲区上操作的接收者线程。 这些锁独立于通知等待进程运行。
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3.发明授权Code section optimization by removing memory barrier instruction and enclosing within a transaction that employs hardware transaction memory 有权通过删除内存障碍指令并将其包含在采用硬件事务内存的事务中进行代码段优化公开(公告)号：US08972704B2
公开(公告)日：2015-03-03
申请号：US13326320
申请日：2011-12-15
CPC分类号： G06F9/522 , G06F8/4441 , G06F8/458 , G06F9/3004 , G06F9/30043 , G06F9/30087 , G06F9/3851 , G06F9/466 , G06F9/467 , G06F11/3409 , G06F11/3466 , G06F2201/81 , G06F2201/865 , G06F2201/88
摘要： A code section of a computer program to be executed by a computing device includes memory barrier instructions. Where the code section satisfies a threshold, the code section is modified, by enclosing the code section within a transaction that employs hardware transactional memory of the computing device, and removing the memory barrier instructions from the code section. Execution of the code section as has been enclosed within the transaction can be monitored to yield monitoring results. Where the monitoring results satisfy an abort threshold corresponding to excessive aborting of the execution of the code section as has been enclosed within the transaction, the code section is split into code sub-sections, and each code sub-section enclosed within a separate transaction that employs the hardware transactional memory. Splitting the code section sections and enclosing each code sub-section within a separate transaction can decrease occurrence of the code section aborting during execution.
摘要翻译： 由计算设备执行的计算机程序的代码部分包括存储器障碍指令。 在代码部分满足阈值的情况下，通过将代码部分包围在使用计算设备的硬件事务存储器的事务中，并从代码部分移除存储器障碍指令来修改代码部分。 可以监视执行代码部分的内容，以便产生监视结果。 如果监视结果满足对应于已经包含在交易内的代码段的执行的过度中止所对应的中止阈值，则代码部分被分割为代码子部分，并且每个代码子部分包含在单独的交易中， 采用硬件事务内存。 拆分代码段部分并在单独的事务中包围每个代码子部分可以减少代码段在执行期间中止的发生。
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公开(公告)号：US20110296148A1
公开(公告)日：2011-12-01
申请号：US12788351
申请日：2010-05-27
申请人： Harold W. Cain, III , Bradly G. Frey , Benjamin Herrenschmidt , Hung Q. Le , Cathy May , Maged M. Michael , Jose E. Moreira , Priya A. Nagpurkar , Naresh Nayar , Randal C. Swanberg
发明人： Harold W. Cain, III , Bradly G. Frey , Benjamin Herrenschmidt , Hung Q. Le , Cathy May , Maged M. Michael , Jose E. Moreira , Priya A. Nagpurkar , Naresh Nayar , Randal C. Swanberg
IPC分类号： G06F9/312
CPC分类号： G06F9/30087 , G06F9/3004 , G06F9/30189 , G06F9/3834 , G06F9/3842 , G06F9/3859 , G06F9/3863 , G06F9/3865 , G06F9/467
摘要： Mechanisms are provided, in a data processing system having a processor and a transactional memory, for executing a transaction in the data processing system. These mechanisms execute a transaction comprising one or more instructions that modify at least a portion of the transactional memory. The transaction is suspended in response to a transaction suspend instruction being executed by the processor. A suspended block of code is executed in a non-transactional manner while the transaction is suspended. A determination is made as to whether an interrupt occurs while the transaction is suspended. In response to an interrupt occurring while the transaction is suspended, a transaction abort operation is delayed until after the transaction suspension is discontinued.
摘要翻译： 在具有处理器和事务存储器的数据处理系统中提供用于在数据处理系统中执行事务的机制。 这些机制执行包括修改事务存储器的至少一部分的一个或多个指令的事务。 响应于由处理器执行的事务挂起指令，事务被暂停。 当事务被暂停时，暂停的代码块以非事务方式执行。 确定在事务中止时是否发生中断。 响应于在事务中止时发生的中断，事务中止操作被延迟，直到事务中止停止为止。
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5.发明授权Systems and methods for implementing key-based transactional memory conflict detection 有权用于实现基于键的事务内存冲突检测的系统和方法公开(公告)号：US07899997B2
公开(公告)日：2011-03-01
申请号：US12046764
申请日：2008-03-12
申请人： Maged M. Michael
发明人： Maged M. Michael
IPC分类号： G06F9/46
摘要： Transactional memory systems and methods are provided which employ key-based transactional memory conflict detection mechanisms for enabling low-overhead conflict detection at variable granularities using customizable conflict sets that are designated using key values.
摘要翻译： 提供了事务性存储器系统和方法，其使用基于密钥的事务存储器冲突检测机制，以使用使用键值指定的可定制的冲突集来实现可变粒度的低开销冲突检测。
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6.发明授权公开(公告)号：US07290085B2
公开(公告)日：2007-10-30
申请号：US10989751
申请日：2004-11-16
申请人： Maged M. Michael
发明人： Maged M. Michael
IPC分类号： G06F12/00
CPC分类号： H04L12/2854 , G06F12/0817
摘要： A method for accessing a protocol table includes providing a content addressable protocol table comprising a plurality of entries, wherein each entry includes a key field and an output field, constructing a key value from a protocol input, associatively searching the table for an entry whose key field matches the key value constructed from the input, and returning the output field of an entry whose key field matches that of the key value. The table optionally includes a mask field, and searching the table includes seeking the entry whose key field matches a bitwise AND of its mask field with the key value. An error is generated if no matching entry is found on the table.
摘要翻译： 用于访问协议表的方法包括提供包括多个条目的内容可寻址协议表，其中每个条目包括密钥字段和输出字段，从协议输入构建密钥值，在表中关联一个条目，关键字 字段匹配从输入构造的键值，并返回其键字段与键值的输入字段匹配的输入字段。 该表可选地包括掩码字段，并且搜索表包括寻找其密钥字段与其掩码字段的按位AND与键值匹配的条目。 如果在表上找不到匹配的条目，则会生成错误。
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公开(公告)号：US09626187B2
公开(公告)日：2017-04-18
申请号：US12788351
申请日：2010-05-27
申请人： Harold W. Cain, III , Bradly G. Frey , Benjamin Herrenschmidt , Hung Q. Le , Cathy May , Maged M. Michael , Jose E. Moreira , Priya A. Nagpurkar , Naresh Nayar , Randal C. Swanberg
发明人： Harold W. Cain, III , Bradly G. Frey , Benjamin Herrenschmidt , Hung Q. Le , Cathy May , Maged M. Michael , Jose E. Moreira , Priya A. Nagpurkar , Naresh Nayar , Randal C. Swanberg
CPC分类号： G06F9/30087 , G06F9/3004 , G06F9/30189 , G06F9/3834 , G06F9/3842 , G06F9/3859 , G06F9/3863 , G06F9/3865 , G06F9/467
摘要： Mechanisms are provided, in a data processing system having a processor and a transactional memory, for executing a transaction in the data processing system. These mechanisms execute a transaction comprising one or more instructions that modify at least a portion of the transactional memory. The transaction is suspended in response to a transaction suspend instruction being executed by the processor. A suspended block of code is executed in a non-transactional manner while the transaction is suspended. A determination is made as to whether an interrupt occurs while the transaction is suspended. In response to an interrupt occurring while the transaction is suspended, a transaction abort operation is delayed until after the transaction suspension is discontinued.
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8.发明授权公开(公告)号：US08539486B2
公开(公告)日：2013-09-17
申请号：US12504925
申请日：2009-07-17
CPC分类号： G06F9/528
摘要： Mechanisms are provided for handling conflicts in a transactional memory system. The mechanisms execute threads in a data processing system in a first conflict resolution mode of operation in which threads execute conflicting transactional blocks speculatively. The mechanisms determine, for a transactional block, if the first conflict resolution mode of operation is to be transitioned to a second conflict resolution mode of operation in which threads accessing conflicting transactional blocks are executed serially and non-speculatively. Moreover, the mechanisms execute a thread that accesses the transactional block using the second conflict resolution mode of operation in response to the determination indicating that the first conflict resolution mode of operation is to be transitioned to the second conflict resolution mode of operation.
摘要翻译： 提供了用于处理事务性存储系统中的冲突的机制。 这些机制在第一冲突解决操作模式下在数据处理系统中执行线程，其中线程以推测方式执行冲突的事务块。 这些机制为事务块确定是否将第一冲突解决方案的操作转变为第二冲突解决操作模式，其中访问冲突事务块的线程被串行和非推测地执行。 此外，机制响应于指示第一冲突解决方案操作被转换到第二冲突解决操作模式的确定，执行使用第二冲突解决操作模式访问事务块的线程。
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公开(公告)号：US20110138126A1
公开(公告)日：2011-06-09
申请号：US12633906
申请日：2009-12-09
CPC分类号： G06F9/3834 , G06F9/3004 , G06F9/30072 , G06F9/30087 , G06F9/30181 , G06F9/3842 , G06F9/3857 , G06F9/467
摘要： Mechanisms for performing predicated atomic commits based on consistency of watches is provided. These mechanisms include executing, by a thread executing on a processor of the data processing system, an atomic release instruction. A determination is made as to whether a speculative store has been lost, due to an eviction of a memory block to which the speculative store is performed, since a previous atomic release instruction was processed. In response to the speculative store having been lost, invalidating, by the processor, speculative stores that have been performed since the previous atomic release instruction was processed. In addition, the method comprises, in response to the speculative store not having been lost, committing, by the processor, speculative stores that have been performed since the previous atomic release instruction was processed.
摘要翻译： 提供了基于手表一致性执行预定原子提交的机制。 这些机制包括通过在数据处理系统的处理器上执行的线程执行原子释放指令。 自从先前的原子释放指令被处理以来，确定推测存储是否由于执行了推测性存储的存储块的驱逐而丢失。 响应于投机存储已经丢失，由处理器使得自从先前的原子释放指令被处理以来已经执行的推测存储器无效。 此外，该方法响应于推测存储没有丢失，由处理器提交自从先前的原子释放指令被处理以来已经执行的推测存储。
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10.发明授权公开(公告)号：US06721858B1
公开(公告)日：2004-04-13
申请号：US09644988
申请日：2000-08-24
IPC分类号： G06F1200
CPC分类号： G06F12/0817
摘要： A method and system for the parallel implementation of protocol engines based on memory partitioning. The method comprises the steps of partitioning a shared memory space into multiple mon-overlapping regions; and for each of the regions, using a respective one protocol engine to handle references to the region, independently of the other protocol engines. Preferably, the memory is partitioned into the non-overlapping regions either by using address interleaving or by using address range registers to identify address ranges for said regions. Also, preferably the protocol engines operate independent of each other and handle accesses to the memory regions in parallel.
摘要翻译： 一种基于内存分区并行实现协议引擎的方法和系统。 该方法包括以下步骤：将共享存储器空间划分成多个单重叠区域; 并且对于每个区域，使用相应的一个协议引擎来独立于其他协议引擎来处理对该区域的引用。 优选地，通过使用地址交织或通过使用地址范围寄存器来识别所述区域的地址范围来将存储器划分为非重叠区域。 此外，优选地，协议引擎彼此独立地操作并且并行地处理对存储器区域的访问。
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