公开(公告)号：US07049703B2

公开(公告)日：2006-05-23

申请号：US10832229

申请日：2004-04-27

Applicant: Makiko Nakamura

Inventor： Makiko Nakamura

IPC: H01L23/48

CPC classification number: H01L23/53223 ,  H01L21/32136 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76837 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a fine interconnection structure with low resistance at a through hole. A first interconnection is formed on a surface of a first layer insulating film. The first interconnection is tapered. An insulating layer is formed on the first interconnection and the first insulating film, and has a through hole that exposes an upper surface and a portion of a side surface of the first interconnection. The insulating layer covers a conductive portion of the first interconnection within the through hole. A second interconnection is provided over the insulating layer, and is electrically connected to the first interconnection through the through hole.

Abstract translation: 半导体器件包括在通孔处具有低电阻的精细互连结构。 在第一层绝缘膜的表面上形成第一互连。 第一个互连是锥形的。 在第一互连和第一绝缘膜上形成绝缘层，并且具有暴露第一互连的侧表面的上表面和一部分的通孔。 绝缘层覆盖通孔内的第一互连的导电部分。 第二互连设置在绝缘层之上，并且通过通孔与第一互连电连接。

公开(公告)号：US20050161831A1

公开(公告)日：2005-07-28

申请号：US11083311

申请日：2005-03-18

Applicant: Makiko Nakamura

Inventor： Makiko Nakamura

IPC: C23C14/34 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L27/10

CPC classification number: H01L23/5226 ,  H01L23/53223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An adhesion layer for causing a plug for electrically connecting a lower wiring and an upper wiring opposite to each other with an interlayer insulating film interposed therebetween to adhere to the interlayer insulating film is formed within a through hole for forming the plug, based on a predetermined aspect ratio represented by a ratio of a depth dimension of the through hole to a diameter dimension of the through hole.

Abstract translation: 在用于形成插塞的通孔内，基于预定的粘合层形成用于使用于使下布线和彼此相对的上布线的插塞之间插入层间绝缘膜以粘附到层间绝缘膜的粘合层， 纵横比由通孔的深度尺寸与通孔的直径尺寸的比率表示。

公开(公告)号：US08355191B2

公开(公告)日：2013-01-15

申请号：US11852107

申请日：2007-09-07

Applicant: Yasushi Mizoguchi ,  Mitsuhiro Yoda ,  Makiko Nakamura

Inventor： Yasushi Mizoguchi ,  Mitsuhiro Yoda ,  Makiko Nakamura

IPC: G02B26/08

CPC classification number: G02B26/10 ,  G02B26/0858 ,  H01L41/09

Abstract: An actuator includes a mass section; a support section; a coupling section for coupling the mass section rotatably to the support section so as to support the mass section with cantilever structure; and a pair of driving sources including a piezoelectric element for rotating the mass section, wherein the pair of driving sources are provided separately from each other with respect to a central axis of rotation of the mass section, each of the driving sources is provided slidably with respect to the coupling section or the support section, and the actuator is structured such that it causes the pair of piezoelectric elements to expand and contract in phases opposite to each other, so as to rotate at least a part of the coupling section while torsionally deforming the mass section.

Abstract translation: 致动器包括质量部分; 支持部分 耦合部分，用于将质量部分可旋转地联接到支撑部分，以便以悬臂结构支撑质量部分; 以及一对驱动源，其包括用于旋转所述质量部的压电元件，其中，所述一对驱动源相对于所述质量部的中心轴线彼此分开设置，每个所述驱动源可滑动地设置 相对于联接部或支撑部，并且致动器被构造成使得它们使得该对压电元件彼此相对地膨胀和收缩，以便使扭转变形的联接部的至少一部分旋转 质量部分。

公开(公告)号：US08331003B2

公开(公告)日：2012-12-11

申请号：US12403832

申请日：2009-03-13

Applicant: Makiko Nakamura ,  Yasushi Mizoguchi

Inventor： Makiko Nakamura ,  Yasushi Mizoguchi

IPC: G02B26/08

CPC classification number: B44C1/227 ,  G02B26/085

Abstract: An optical deflector has: a movable plate having a reflecting surface and a side surface; and a support portion that supports the movable plate in such a manner that the movable plate is able to rotate around a predetermined axis, in which the side surface of the movable plate is recessed toward the axis.

Abstract translation: 光学偏转器具有：具有反射面和侧面的可动板; 以及支撑部分，其以可移动板能够围绕可动板的侧表面朝向轴线凹陷的预定轴线旋转的方式支撑可动板。

公开(公告)号：US06329719B1

公开(公告)日：2001-12-11

申请号：US09651280

申请日：2000-08-30

Applicant: Makiko Nakamura

Inventor： Makiko Nakamura

IPC: H01L2940

CPC classification number: H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device is comprised of a first wire that has a plurality of via holes formed in the vicinity of an end thereof and that is connected to a conductor of a different layer through the via holes, and a plurality of slits that are provided parallel to the direction in which the first wire extends and that split the first wire into a plurality of second wires over a predetermined distance from the end thereof. Another semiconductor device is comprised of a first wire, a second wire that is on a layer different from that of the first wire and that extends in a direction at right angles to the first wire, a connection area where a portion in the vicinity of an end of the first wire intersects with a portion in the vicinity of an end of the second wire, a plurality of first slits that are provided parallel to the direction in which the first wire extends and that divide the first wire into a plurality of third wires over only a predetermined distance from an end of the first wire, and a plurality of second slits that are provided parallel to the direction in which the second wire extends and that divide the second wire into a plurality of fourth wires over only a predetermined distance from an end of the second wire, and a plurality of via holes that are formed in the connection area and that connect the plurality of third wires and the plurality of fourth wires.

Abstract translation: 一种半导体器件由具有形成于其一端附近的多个通孔构成的第一导线构成，并且通过该贯通孔与不同层的导体连接，多个狭缝平行于 第一线延伸的方向，并且将第一线分解成多个第二线从其端部预定的距离。 另一个半导体器件包括第一线，第二线，其在不同于第一线的层上，并且在与第一线成直角的方向上延伸的第二线，连接区域，其中， 第一线的端部与第二线的端部附近的部分相交，多个第一狭缝，其与第一线延伸的方向平行设置，并且将第一线分成多个第三线 并且与第二线延伸的方向平行的多个第二狭缝，并且将第二线分成多条第四线，距离第一线的端部只有预定距离 第二线的端部，以及形成在连接区域中并连接多个第三线和多条第四线的多个通孔。

公开(公告)号：US07829365B2

公开(公告)日：2010-11-09

申请号：US11976678

申请日：2007-10-26

Applicant: Makiko Nakamura

Inventor： Makiko Nakamura

IPC: H01L21/00

CPC classification number: B81C1/00944 ,  B81B2201/0271 ,  B81B2203/0118 ,  B81B2203/04 ,  B81C2201/112 ,  H01L28/40 ,  H03H3/0077 ,  H03H9/2457 ,  H03H2009/02496

Abstract: A micro electro-mechanical system, which can be stably formed so as to prevent sticking of a movable part and which has a narrow gap, and a method of manufacturing the same are provided. The micro electro-mechanical system includes at least one fixed electrode formed above a principal surface of a semiconductor substrate and at least one movable electrode formed on the principal surface. The at least one movable electrode includes the movable part separated from the principal surface and the at least one fixed electrode. The movable part is movable with respect to the principal surface and the at least one fixed electrode. The method of manufacturing the micro electro-mechanical system includes a sacrifical film formation step for forming a sacrifical film above the principal surface, an electrode layer formation step for forming an electrode layer above the principal surface so as to cover over the sacrifical film, an etching step for partially etching the electrode layer via a pattern so as to form the at least one electrode and the at least one fixed electrode, a sacrifical film removal step for removing the sacrifical film, and a conducting film formation step for forming a conducting film on surfaces of the at least one electrode and the at least one fixed electrode.

Abstract translation: 提供一种可以稳定地形成以防止可动部分的粘附并且具有窄间隙的微机电系统及其制造方法。 微电子机械系统包括形成在半导体衬底的主表面上的至少一个固定电极和形成在主表面上的至少一个可移动电极。 所述至少一个可移动电极包括从所述主表面和所述至少一个固定电极分离的可移动部件。 可移动部分可相对于主表面和至少一个固定电极移动。 微机电系统的制造方法包括在主表面上形成牺牲膜的牺牲膜形成工序，在主表面上形成覆盖牺牲膜的电极层的电极层形成工序， 用于通过图案部分地蚀刻电极层以形成至少一个电极和至少一个固定电极的蚀刻步骤，用于去除牺牲膜的牺牲膜去除步骤以及用于形成导电膜的导电膜形成步骤 在所述至少一个电极和所述至少一个固定电极的表面上。

公开(公告)号：US20090075415A1

公开(公告)日：2009-03-19

申请号：US12232051

申请日：2008-09-10

Applicant: Makiko Nakamura

Inventor： Makiko Nakamura

IPC: H01L21/00

CPC classification number: B81C1/00333 ,  B81B2201/0271 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: The present invention provides a method for manufacturing a semiconductor device which has an integrated circuit provided on a semiconductor substrate and a movable part which is movable relative to the substrate. This manufacturing method includes: a step of covering the movable part with a sacrificial film; a step of covering the sacrificial film with a first sealing layer which is formed of a material having a tensile stress; a step of forming a through-hole in the first sealing layer; a step of removing the sacrificial film through the through-hole to form a void around the movable part; and a step of film-forming a second sealing layer on the first sealing layer to close the through-hole.

Abstract translation: 本发明提供一种制造半导体器件的方法，该半导体器件具有设置在半导体衬底上的集成电路和可相对于衬底移动的可移动部件。 该制造方法包括：利用牺牲膜覆盖可动部的工序; 用由具有拉伸应力的材料形成的第一密封层覆盖牺牲膜的步骤; 在第一密封层中形成通孔的步骤; 通过所述通孔去除所述牺牲膜以在所述可动部分周围形成空隙的步骤; 以及在第一密封层上成膜第二密封层以闭合通孔的步骤。

公开(公告)号：US20080224319A1

公开(公告)日：2008-09-18

申请号：US11976678

申请日：2007-10-26

Applicant: Makiko Nakamura

Inventor： Makiko Nakamura

IPC: H01L23/48 ,  H01L21/02 ,  H01L21/44

CPC classification number: B81C1/00944 ,  B81B2201/0271 ,  B81B2203/0118 ,  B81B2203/04 ,  B81C2201/112 ,  H01L28/40 ,  H03H3/0077 ,  H03H9/2457 ,  H03H2009/02496

Abstract: A micro electro-mechanical system, which can be stably formed so as to prevent sticking of a movable part and which has a narrow gap, and a method of manufacturing the same are provided. The micro electro-mechanical system includes at least one fixed electrode formed above a principal surface of a semiconductor substrate and at least one movable electrode formed on the principal surface. The at least one movable electrode includes the movable part separated from the principal surface and the at least one fixed electrode. The movable part is movable with respect to the principal surface and the at least one fixed electrode. The method of manufacturing the micro electromechanical system includes a sacrifical film formation step for forming a sacrifical film above the principal surface, an electrode layer formation step for forming an electrode layer above the principal surface so as to cover over the sacrifical film, an etching step for partially etching the electrode layer via a pattern so as to form the at least one electrode and the at least one fixed electrode, a sacrifical film removal step for removing the sacrifical film, and a conducting film formation step for forming a conducting film on surfaces of the at least one electrode and the at least one fixed electrode.

Abstract translation: 提供一种可以稳定地形成以防止可动部分的粘附并且具有窄间隙的微机电系统及其制造方法。 微电子机械系统包括形成在半导体衬底的主表面上的至少一个固定电极和形成在主表面上的至少一个可移动电极。 所述至少一个可移动电极包括从所述主表面和所述至少一个固定电极分离的可移动部件。 可移动部分可相对于主表面和至少一个固定电极移动。 微机电系统的制造方法包括在主表面上形成牺牲膜的牺牲膜形成工序，在主表面上形成电极层以覆盖牺牲膜的电极层形成工序，蚀刻工序 用于通过图案部分地蚀刻电极层，以形成至少一个电极和至少一个固定电极，用于去除牺牲膜的牺牲膜去除步骤，以及用于在表面上形成导电膜的导电膜形成步骤 的至少一个电极和至少一个固定电极。

公开(公告)号：US06900131B2

公开(公告)日：2005-05-31

申请号：US10425875

申请日：2003-04-30

Applicant: Makiko Nakamura

Inventor： Makiko Nakamura

IPC: H01L21/285 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/425 ,  H01L21/22 ,  H01L21/44 ,  H01L21/4763

CPC classification number: H01L21/7685 ,  H01L21/2855 ,  H01L21/76864 ,  H01L21/76886 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention provides a method of manufacturing a semiconductor device, which is capable of reducing variations in the rate of occurrence of failures at individual connecting portions in the semiconductor device. According to the semiconductor device manufacturing method, a Cu-containing TiN layer, which serves as a cap layer (130 (310)), is formed using a Cu-containing Ti target. Cu contained in the Cu-containing TiN layer is diffused into an Al—Cu wiring (120 (320)) located in a portion electrically connected to an interlayer wiring (200) by heat treatment.

Abstract translation: 本发明提供一种制造半导体器件的方法，其能够减少半导体器件中各个连接部分处的故障发生率的变化。 根据半导体器件的制造方法，使用含Cu的Ti靶来形成作为覆盖层（130（310））的含Cu的TiN层。 包含在含Cu TiN层中的Cu通过热处理扩散到位于与层间布线（200）电连接的部分中的Al-Cu布线（120（320））中。

公开(公告)号：US06893960B2

公开(公告)日：2005-05-17

申请号：US10123426

申请日：2002-04-17

Applicant: Makiko Nakamura

Inventor： Makiko Nakamura

IPC: H01L21/3205 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/52 ,  H01L21/4763

CPC classification number: H01L23/53223 ,  H01L21/32136 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76837 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for manufacturing a semiconductor device capable of forming a fine interconnection structure without making the resistance at the through hole high is provided. More specifically, a semiconductor device having a first interconnection formed on the surface of a first layer insulating film is provided, and a second interconnection is also provided on the upper part of the first interconnection and is electrically connected to the first interconnection, and wherein the first interconnection is formed so that the width of the lower part is narrower than that of the upper part.

Abstract translation: 提供一种制造能够形成精细互连结构而不使通孔处的电阻高的半导体器件的方法。 更具体地说，提供了在第一层绝缘膜的表面上形成有第一互连的半导体器件，并且第二互连还设置在第一互连的上部，并且电连接到第一互连，并且其中 形成第一互连，使得下部的宽度比上部的宽度窄。