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公开(公告)号：US4442748A
公开(公告)日：1984-04-17
申请号：US390830
申请日：1982-06-22
申请人： Makoto Kaneko , Takatoshi Okumura
发明人： Makoto Kaneko , Takatoshi Okumura
摘要： A frequency divider which divides clock pulses to obtain the clock frequency of a desired dividing ratio comprises a binary counter, cycle data forming circuit and inhibit circuit to which the dividing ratio is fed in the form of the dividing ratio data.The counter counts the clock pulses, and the cycle data forming circuit converts the count value of the binary counter to a cycle data in which a certain single bit only becomes a logical state "1" and the rest of the bits are a state "0". The bit which becomes "1" in the cycle data is uniquely determined by the count value. Further, each bit of the cycle data becomes "1" in proportion to the weight of the each bit. With the cycle data being thus formed, the dividing ratio data is simplified.The inhibit circuit receives the cycle data and the dividing ratio data to suspend the counting operation of the binary count if the bit of the dividing ratio data corresponding to the bit of the cycle data whose state is "1" is also "1". This suspension enables the binary counter to perform a nonbinary counting operation, whereby the frequency-dividing based on the desired dividing ratio in the binary counter is implemented. By relating the diving ratio data to the pitch of a note, the frequency divider may be applicable to an electronic musical instrument.
摘要翻译： 划分时钟脉冲以获得期望分频比的时钟频率的分频器包括以分频比数据的形式馈送分频比的二进制计数器，周期数据形成电路和禁止电路。 计数器对时钟脉冲进行计数，周期数据形成电路将二进制计数器的计数值转换为某个单个位仅为逻辑状态“1”的周期数据，其余位为状态“0” “。 循环数据中变为“1”的位由计数值唯一确定。 此外，周期数据的每个比特与每个比特的权重成比例地变为“1”。 随着周期数据的形成，分割比数据被简化。 如果与状态为“1”的循环数据的位对应的分频比数据的位也为“1”，则禁止电路接收周期数据和分频比数据以暂停二进制计数的计数操作。 该暂停使得二进制计数器能够执行非二进制计数操作，由此实现基于二进制计数器中的期望分频比的分频。 通过将潜水比数据与笔记的间距相关联，分频器可以应用于电子乐器。
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公开(公告)号：US4864289A
公开(公告)日：1989-09-05
申请号：US9095
申请日：1987-01-23
摘要： A video display control system displays a multicolor animation pattern on a screen of a video display unit. The video display control system is mainly constructed by a video RAM (VRAM) and a video display processor (VDP). The VRAM stores animation pattern data, display position data and at least two color data. The VDP reads these data and makes an animation pattern image displayed in at least two colors at a display position on the screen. The animation pattern image, two colors and display position are determined by the animation pattern data, two color data and display position data. In another video display control system, the VRAM stores at least two sets of animation pattern data, display position data and color data. When displaying two animation patterns, the VDP effects a logical operation on the two color data with respect to the overlapping portion of the two patterns and makes the overlapping portion displayed in a new color corresponding to the operation result. When the animation patterns overlaps, the VDP can also deliver a collision signal in place of the logical operation, thereby enabling a CPU to recognize the position of the overlapping portion.
摘要翻译： 视频显示控制系统在视频显示单元的屏幕上显示多色动画图案。 视频显示控制系统主要由视频RAM（VRAM）和视频显示处理器（VDP）构成。 VRAM存储动画图案数据，显示位置数据和至少两个颜色数据。 VDP读取这些数据，并使屏幕上的显示位置以至少两种颜色显示动画图案图像。 动画图案图像，两种颜色和显示位置由动画图案数据，两种颜色数据和显示位置数据确定。 在另一个视频显示控制系统中，VRAM存储至少两组动画图案数据，显示位置数据和颜色数据。 当显示两个动画图案时，VDP相对于两个图案的重叠部分对两个颜色数据进行逻辑运算，并使得重叠部分以对应于操作结果的新颜色显示。 当动画图案重叠时，VDP也可以传递碰撞信号代替逻辑操作，从而使CPU能够识别重叠部分的位置。
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公开(公告)号：US4292873A
公开(公告)日：1981-10-06
申请号：US101904
申请日：1979-12-10
申请人： Takatoshi Okumura , Seiya Hamada , Akio Imamura
发明人： Takatoshi Okumura , Seiya Hamada , Akio Imamura
摘要： An electronic musical instrument comprises a key on-off memory for storing the on-off state of the respective keys, and at a time counter for counting the lapse of time after release of the respective keys. The time counter inhibits generation of the musical tone signal corresponding to the key when the conditions that predetermined time is elapsed after the key release and that the key-off state is stored in the memory are satisfied. This inhibition is separately conducted with respect to the keys. Thus, it can remarkably prevent noise when the tone should not be produced.
摘要翻译： 电子乐器包括用于存储各个键的开 - 关状态的键开关存储器，以及用于计数各个键释放之后的时间流逝的时间计数器。 当在键释放之后经过预定时间的条件并且关闭状态被存储在存储器中时，时间计数器抑制对应于该键的乐音信号的产生。 这种抑制分别针对键进行。 因此，当不应该产生音调时，可以显着地防止噪音。
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公开(公告)号：US4235142A
公开(公告)日：1980-11-25
申请号：US904
申请日：1979-01-04
申请人： Akira Nakada , Eiichiro Aoki , Akiyoshi Oya , Takatoshi Okumura , Yasuji Uchiyama , Eiichi Yamaga
发明人： Akira Nakada , Eiichiro Aoki , Akiyoshi Oya , Takatoshi Okumura , Yasuji Uchiyama , Eiichi Yamaga
CPC分类号： G10H1/28 , G10H1/182 , G10H1/36 , G10H2210/221
摘要： An electronic musical instrument is of a time-shared digital processing type and capable of producing musical tones for a special performance. There are provided, at suitable time intervals, time periods in which no key code of a depressed key is produced by a key coder. During these time periods, a signal designating a special performance is generated. In a channel assignment circuit which assigns key codes of depressed keys to plural tone production channels there is provided a channel for an exclusive use for the special performance. A circuit for assigning data for the special performance transmits the data to the channel assignment circuit in response to the special performance designation signal from the key coder so that the data selected from among the key data already assigned to the tone production channels for ordinary performance are sequentially assigned to the channel allotted exclusively for the special performance. As an example of the special performance, description is made with respect to an automatic arpeggio performance in which tones are produced at designated orders of location from the lowest tone among the tones of the depressed keys.
摘要翻译： 电子乐器具有时间共享的数字处理类型，能够产生用于特殊表演的乐音。 以合适的时间间隔提供了一个键控编码器不产生按下的键的键码的时间段。 在这些时间段内，产生指定特殊性能的信号。 在向多个音调产生频道分配按下的键的键码的频道分配电路中，提供专用于特殊演奏的频道。 用于分配用于特殊性能的数据的电路响应于来自密钥编码器的特殊性能指定信号将数据发送到信道分配电路，使得从已经分配给用于普通性能的音调产生信道的密钥数据中选择的数据是 顺序分配给专门用于特殊演出的频道。 作为特殊性能的一个例子，对于自动琶音性能进行描述，其中在按下的按键的音调之间的最低音调的指定指定的位置产生音调。
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公开(公告)号：US4109208A
公开(公告)日：1978-08-22
申请号：US556951
申请日：1975-03-10
CPC分类号： G10H7/04 , G10H1/0575
摘要： In a waveform producing system for use in, for example, an electronic musical instrument, a tone generator circuit and/or a tone control circuit including tone keyer circuits, each or either one of said tone generator circuit and said tone control circuit comprises: pulse generators associated with key-actuated switches, respectively; waveform memorizing means having at least one row of voltage dividers of which the division ratios are preset in characteristics corresponding to either the tone waveforms, the tone envelopes or the depression speeds of the key operated by the player of the instrument; sequential memory read-out means connected to the respective voltage dividers; and pulse generators thereby providing an enabling signal sequentially to the individual dividers every time a pulse is inputted from the pulse generators to read-out the memorized waveform in the form of a modified audio signal at the output side of the circuit. The memorized waveforms can arbitrarily be sampled (scanned) out by using a sampling circuit in the read-out means, thereby providing variations in the modified audio signal. The tone control circuit enables the tone level control in conformity to the depression speed of the key and tone envelope control without the need to employ the conventional charge-discharge circuit requiring a relatively large capacitance capacitor, and makes it easy to carry out circuit integration.
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公开(公告)号：US08409101B2
公开(公告)日：2013-04-02
申请号：US12815825
申请日：2010-06-15
申请人： Hironobu Hongou , Takatoshi Okumura , Kazuhito Nakata , Kenichi Unayama , Takeshi Fukasawa , Takayuki Shiina , Fumio Mochizuki
发明人： Hironobu Hongou , Takatoshi Okumura , Kazuhito Nakata , Kenichi Unayama , Takeshi Fukasawa , Takayuki Shiina , Fumio Mochizuki
IPC分类号： A61B8/14
CPC分类号： A61B8/14 , A61B8/546 , G10K11/004
摘要： According to one embodiment, an ultrasonic probe includes a probe unit and cooling unit. The probe unit is obtained by arranging, in a housing, a transducer unit which transmits and receives ultrasonic waves with an object to be examined, an electronic circuit unit which is connected to the transducer unit and performs electrical signal processing, and a heat transfer member which is made of a material having a heat transfer coefficient higher than that of the electronic circuit unit, and transfers heat of the electronic circuit unit to a housing surface. The cooling unit is detachably mounted on the housing of the probe unit, and cools the heat transfer member by passing a coolant in a channel formed inside the cooling unit.
摘要翻译： 根据一个实施例，超声波探头包括探针单元和冷却单元。 探针单元通过在外壳中布置与被检查物体发送和接收超声波的换能器单元，连接到换能器单元并进行电信号处理的电子电路单元，以及传热构件 其由具有高于电子电路单元的传热系数的材料制成，并且将电子电路单元的热量传递到壳体表面。 冷却单元可拆卸地安装在探针单元的壳体上，并且通过在冷却单元内形成的通道中使冷却剂通过来冷却传热构件。
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公开(公告)号：US4737772A
公开(公告)日：1988-04-12
申请号：US739036
申请日：1985-05-29
摘要： A video display processor (VDP) produces a video signal by which a black and white image of an increased gradation can be displayed on a video display unit. The VDP reads from a video RAM (VRAM) either color codes each representative of a color of each display element, or amplitude data representative of amplitudes of a video signal to be reproduced. When displaying an image based on the color codes, the color codes are converted by a color palette circuit into color data each composed of three primary color data, and then supplied to a digital color encoder. The digital color encoder multiplies each of the three color data by predetermined coefficients at proper phase timings to output data representative of three chrominance signals. This output data is summed by an adder circuit and then converted into an analog signal to be supplied to the video display unit as the video signal. When displaying an image based on the amplitude data, the color palette circuit converts the amplitude data into gradation data. The digital color encoder multiplies the gradation data by other proper coefficients so that data proportional in value to the gradation data are obtained at the output of the adder circuit. This data is converted into an analog signal to thereby reproduce the video signal.
摘要翻译： 视频显示处理器（VDP）产生视频信号，通过该视频信号可以在视频显示单元上显示增加灰度的黑白图像。 VDP从视频RAM（VRAM）读取每个代表每个显示元件的颜色的颜色代码，或表示要再现的视频信号的幅度的幅度数据。 当基于颜色代码显示图像时，颜色代码由调色板电路转换成每个由三个基色数据组成的颜色数据，然后提供给数字颜色编码器。 数字彩色编码器以适当的相位定时将三个颜色数据中的每一个乘以预定系数，以输出表示三个色度信号的数据。 该输出数据由加法器电路求和，然后转换为模拟信号，以供应给视频显示单元作为视频信号。 当基于幅度数据显示图像时，调色板电路将振幅数据转换为灰度数据。 数字彩色编码器将灰度数据乘以其他适当的系数，使得在加法器电路的输出处获得与灰度数据成比例的数据。 该数据被转换成模拟信号从而再现视频信号。
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公开(公告)号：US4628467A
公开(公告)日：1986-12-09
申请号：US735370
申请日：1985-05-17
申请人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
发明人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
摘要： A video display control system comprises a video display processor (VDP) which is capable of accessing to a video RAM (VRAM) at an extremely high-speed. The VRAM used in this system comprises first and second dynamic RAMs each having an address input terminal to which row address data and column address data are supplied, a row address strobe input terminal, a column address strobe input terminal, and a data input/output terminal. The row address data is latched at the leading edge of a row address strobe signal applied to the row address strobe input terminal, while the column address data is latched at the leading edge of a column address strobe signal applied to the column address strobe input terminal. An access to an address of each dynamic RAM is established when both of the row and column address data are latched. The VDP comprises a VRAM interface for controlling an access to the first and second dynamic RAMs which is connected to the RAMs through a common address bus. The VRAM interface first outputs row address data together with a row address strobe signal RAS and then outputs column address data together with two column address strobe signals CAS0 and CAS1 which are rendered active in sequence and supplied to the first and second dynamic RAMs, respectively.
摘要翻译： 视频显示控制系统包括能够以极高速度访问视频RAM（VRAM）的视频显示处理器（VDP）。 该系统中使用的VRAM包括第一和第二动态RAM，每个具有地址输入端，行地址数据和列地址数据被提供给地址输入端，行地址选通输入端，列地址选通输入端和数据输入/输出 终奌站。 行地址数据被锁存在施加到行地址选通输入端的行地址选通信号的前沿，而列地址数据被锁存在施加到列地址选通输入端的列地址选通信号的前沿 。 当锁存行和列地址数据时，建立对每个动态RAM的地址的访问。 VDP包括用于控制通过公共地址总线连接到RAM的第一和第二动态RAM的访问的VRAM接口。 VRAM接口首先将行地址数据与行地址选通信号和上拉和下拉一起输出，然后将列地址数据与两个列地址选通信号和上拉和C和＆amp;上拉和C依次输出并提供给第一和第二动态RAM ， 分别。
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公开(公告)号：US4437379A
公开(公告)日：1984-03-20
申请号：US315110
申请日：1981-10-26
申请人： Takatoshi Okumura
发明人： Takatoshi Okumura
CPC分类号： G10H7/06
摘要： Keys of a keyboard are divided into a plurality of tone ranges and a plurality of musical tone waveforms regarding specific ones of the divided tone ranges are stored in a waveform memory device. A number of the plurality of musical tone waveforms is smaller than the number of the divided tone ranges. An address signal generator is provided which generates an address signal having a repetition period corresponding to a tone pitch of a depressed key and supplies the address signal to the waveform memory device, and an arithmetic operating circuit is provided which selects ones from among the plurality of musical tone waveforms and mixes the selected ones of a mixing ratio, thereby forming a new musical tone waveform. The selected ones and the mixing ratio are predetermined corresponding to each of the tone ranges. Different tone colors of a number which is more than the number of the waveforms are realized for the respective tone ranges just like in a natural musical instrument.
摘要翻译： 键盘的键被分成多个音调范围，并且关于特定的分频乐音范围的多个音乐波形被存储在波形存储装置中。 多个乐音波形的数量小于分频乐谱的数量。 提供一种地址信号发生器，其生成具有与被按压的键的音调相对应的重复周期的地址信号，并将该地址信号提供给波形存储装置，并且提供算术运算电路，其从多个 乐音波形并混合所选择的混合比，从而形成新的乐音波形。 所选择的和混合比是对应于每个音调范围预定的。 与自然乐器一样，对于各个音调范围实现多于波形数量的数字的不同音色。
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公开(公告)号：US09649088B2
公开(公告)日：2017-05-16
申请号：US12552626
申请日：2009-09-02
申请人： Katsuya Hirakui , Hideo Onodera , Takatoshi Okumura , Kazuhito Nakata , Hironobu Hongou , Hiroyuki Shibanuma , Takayuki Shiina
发明人： Katsuya Hirakui , Hideo Onodera , Takatoshi Okumura , Kazuhito Nakata , Hironobu Hongou , Hiroyuki Shibanuma , Takayuki Shiina
IPC分类号： A61B8/00
CPC分类号： A61B8/00 , A61B8/4405 , A61B8/4411 , A61B8/4427 , A61B2560/0456
摘要： After an ultrasonic diagnosis apparatus is temporally placed on the receptacle of a docking cart to relieve a weight load, the portable ultrasonic diagnosis apparatus is placed at a predetermined position by sliding the apparatus while guiding it along the shapes of the edges of the receptacle. After the portable ultrasonic diagnosis apparatus is slid on the receptacle and rear foot portions come into contact with the stoppers of the receptacle, the front side of the portable ultrasonic diagnosis apparatus is placed on the receptacle. With this operation, front foot portions are fitted in fitting portions, and the portable ultrasonic diagnosis apparatus is placed at an accurate position on the receptacle. In addition, when an operator places the portable ultrasonic diagnosis apparatus on the receptacle or lifts the portable ultrasonic diagnosis apparatus from the receptacle, the fingers which grasp the apparatus are placed in the recessed portions of the receptacle.
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