COATED BASE FABRIC FOR AIR BAGS
    1.
    发明申请
    COATED BASE FABRIC FOR AIR BAGS 有权
    用于空气袋的涂层基布

    公开(公告)号:US20130189887A1

    公开(公告)日:2013-07-25

    申请号:US13878725

    申请日:2011-10-19

    IPC分类号: D06M15/643

    摘要: The present invention provides a coated base fabric for an air bag which can ensure sufficient air permeability even when the coating amount of the resin is 20 g/m2 or less. A coated base fabric for an air bag wherein silicone resin is coated at least on one side of the woven fabric constituted from synthetic fiber filaments which is characterized in that the coating amount of the silicone resin is 20 g/m2 or less, film strength and film elongation of the resin are 3 MPa or more and 300% or more, respectively and air permeability of the coated base fabric under the pressure difference of 100 kPa is 0.02 L/cm2/min or less.

    摘要翻译: 本发明提供一种用于气囊的涂布基布,即使当树脂的涂布量为20g / m 2以下时,也能够确保充分的透气性。 一种用于气囊的涂布底布,其中由合成纤维丝构成的机织织物的至少一面上涂覆有硅树脂,其特征在于,硅树脂的涂布量为20g / m 2以下,膜强度和 树脂的薄膜伸长率分别为3MPa以上且300%以上,压力差为100kPa时的涂布基布的透气度为0.02L / cm 2 /分钟以下。

    Audio reproducing device and method, audio amplifier, and integrated circuit for audio amplifier
    2.
    发明授权
    Audio reproducing device and method, audio amplifier, and integrated circuit for audio amplifier 失效
    音频再现装置和方法,音频放大器和用于音频放大器的集成电路

    公开(公告)号:US07102426B2

    公开(公告)日:2006-09-05

    申请号:US10740526

    申请日:2003-12-22

    申请人: Mamoru Kitamura

    发明人: Mamoru Kitamura

    IPC分类号: H03F3/38

    摘要: A digital ΔΣ modulated signal produced by a quantizer (1c) in a ΔΣ modulation processing unit (1) is put in to a feedback loop before inputted to a power switch (2) and converted into an analog signal by a D/A converter (1d). This analog signal is fed back to the input stage (a differentiator (1a)) of the ΔΣ processing unit (1) to prevent the switching distortion of the power switch (2) itself from being introduced into the feedback loop thereby to suppress the influence of the switching distortion.

    摘要翻译: 在DeltaSigma调制处理单元(1)中由量化器(1c)产生的数字DeltaSigma调制信号在输入到功率开关(2)之前被置入反馈回路中,并通过D / A转换器转换成模拟信号 (1 d)。 该模拟信号被反馈到DeltaSigma处理单元(1)的输入级(微分器(1a)),以防止功率开关(2)自身的开关失真被引入反馈回路,从而抑制 影响切换失真。

    Audio amplifier
    3.
    发明授权
    Audio amplifier 有权
    音频放大器

    公开(公告)号:US06937092B2

    公开(公告)日:2005-08-30

    申请号:US10711382

    申请日:2004-09-15

    申请人: Mamoru Kitamura

    发明人: Mamoru Kitamura

    IPC分类号: H03F3/185 H03F3/217 H03F3/38

    摘要: A transformer 11, which converts input current into voltage output, is arranged between a power switch 1, which amplifies and outputs audio signals based on the power source voltage VDD supplied to MOS transistors Q1 to Q4, and a speaker 3. Through appropriately determining the turns ratio (Ns/Np), without causing the power source voltage VDD of the power switch 1 to be large, large voltage Vs is made to occur at both ends of the speaker 3 from such small power source voltage VDD. Through this, large output power can be obtained.

    摘要翻译: 将输入电流转换为电压输出的变压器11配置在功率开关1之间,放大并输出基于提供给MOS晶体管Q 1〜Q 4的电源电压VDD的音频信号和扬声器3。 通过适当地确定匝数比(Ns / Np),在不使电源开关1的电源电压VDD大的情况下,由于这种小的电源电压VDD,扬声器3的两端发生大的电压Vs。 由此可以获得大的输出功率。

    Power reducing circuit for synchronous semiconductor device
    4.
    发明授权
    Power reducing circuit for synchronous semiconductor device 失效
    同步半导体器件功率降低电路

    公开(公告)号:US5696729A

    公开(公告)日:1997-12-09

    申请号:US356725

    申请日:1994-12-15

    申请人: Mamoru Kitamura

    发明人: Mamoru Kitamura

    CPC分类号: G05F3/262

    摘要: A power conserving circuit configuration is presented which reduces the power supplied to the input/output pins in the initial input circuit in a synchronous semiconductor device. The circuit reduces the power to the input/output pins in the initial input circuit during the standby mode and/or readout mode, and restores the power to the initial input circuit, when an input signal is entered in an external disabling pin which generates an output disabling signal, which makes the output signal from the input/output pin to be nullified and causes the power to be restored in the synchronous semiconductor device.

    摘要翻译: 提出了一种省电电路配置,其减少了提供给同步半导体器件中的初始输入电路中的输入/输出引脚的功率。 该电路在待机模式和/或读出模式期间降低了初始输入电路中的输入/输出引脚的功率,并且当输入信号输入到外部禁止引脚中时,恢复初始输入电路的电源, 输出禁止信号,使得来自输入/输出引脚的输出信号无效,并使同步半导体器件中的电源恢复。

    BASE FABRIC FOR AIR BAG
    6.
    发明申请
    BASE FABRIC FOR AIR BAG 有权
    空气袋基布

    公开(公告)号:US20130295810A1

    公开(公告)日:2013-11-07

    申请号:US13979435

    申请日:2012-01-12

    IPC分类号: D03D1/02 B60R21/235

    摘要: The present invention provides a base fabric for an air bag where color shading after application of water drops hardly happens even when a water-dispersed polymer solution mixed with a pigment being dispersed in water is applied to a woven/knitted fabric in small amount.A base fabric for an air bag obtained by applying a reactive compound, a water-dispersed resin composition and a water-dispersible pigment to a woven/knitted fabric made of synthetic fiber and then subjecting the resulted coated fabric to a thermal treatment.

    摘要翻译: 本发明提供了一种用于气囊的底布,其中即使在与分散在水中的颜料混合的水分散聚合物溶液以少量施加到机织/针织物上时也难以发生施加水滴后的色调。 通过将由反应性化合物,水分散性树脂组合物和水分散性颜料施加到由合成纤维制成的机织/针织织物上,然后对所得到的涂布织物进行热处理而获得的用于气囊的基底织物。

    Synchronized semiconductor memory
    7.
    发明授权
    Synchronized semiconductor memory 失效
    同步半导体存储器

    公开(公告)号:US5581512A

    公开(公告)日:1996-12-03

    申请号:US537461

    申请日:1995-10-02

    申请人: Mamoru Kitamura

    发明人: Mamoru Kitamura

    CPC分类号: G11C7/1072

    摘要: A synchronized semiconductor memory device comprising a memory cell array, an address input circuit, an address set circuit, a command input circuit, a data reading/writing control circuit, a data output circuit, a data input circuit, a clock input circuit, an internal clock generating circuit, an internal clock timing control circuit. The clock input circuit comprises first and second clock input circuits, and the internal clock generating circuit comprises a first internal clock generating circuit receiving a clock information from the first clock input circuit, for generating a fist reference internal clock signal controlling the address input circuit, the address set circuit, the command input circuit, the data reading/writing control circuit, the data output circuit and the data input circuit, and a second internal clock generating circuit receiving a clock information from the second clock input circuit, for generating a second reference internal clock signal controlling only the data output circuit.

    摘要翻译: 一种同步半导体存储器件,包括存储单元阵列,地址输入电路,地址设置电路,命令输入电路,数据读/写控制电路,数据输出电路,数据输入电路,时钟输入电路 内部时钟发生电路,内部时钟定时控制电路。 时钟输入电路包括第一和第二时钟输入电路,内部时钟发生电路包括第一内部时钟发生电路,接收来自第一时钟输入电路的时钟信息,用于产生控制地址输入电路的第一参考内部时钟信号, 地址设定电路,命令输入电路,数据读/写控制电路,数据输出电路和数据输入电路;以及第二内部时钟发生电路,接收来自第二时钟输入电路的时钟信息,用于产生第二 参考内部时钟信号仅控制数据输出电路。

    Synchronized semiconductor memory
    8.
    发明授权
    Synchronized semiconductor memory 失效
    同步半导体存储器

    公开(公告)号:US5566108A

    公开(公告)日:1996-10-15

    申请号:US537478

    申请日:1995-10-02

    申请人: Mamoru Kitamura

    发明人: Mamoru Kitamura

    CPC分类号: G11C7/222 G11C7/1072

    摘要: A synchronized semiconductor memory device comprises a memory cell array, an address input circuit, an address set circuit, a command input circuit, a data reading/writing control circuit, a data output circuit, a data input circuit, a clock input circuit, an internal clock generating circuit, and an internal clock timing control circuit. The internal clock timing control circuit includes a delay circuit to receive a reference internal clock generated in the internal clock generating circuit, a plurality of level signals set in accordance with a given mode register set cycle, and a plurality of row address enable signals, and for generating at least an internal clock signal for timing-controlling the data reading/writing circuit. The internal clock timing control circuit also includes a logic circuit to receive the reference internal clock generated in the internal clock generating circuit and the plurality of row address enable signals, and for generating another internal clock signal for timing-controlling the data input circuit.

    摘要翻译: 同步半导体存储器件包括存储单元阵列,地址输入电路,地址设置电路,命令输入电路,数据读/写控制电路,数据输出电路,数据输入电路,时钟输入电路 内部时钟发生电路和内部时钟定时控制电路。 内部时钟定时控制电路包括:延迟电路,用于接收在内部时钟发生电路中产生的参考内部时钟;根据给定模式寄存器设置周期设置的多个电平信号;以及多个行地址使能信号;以及 用于至少产生用于对数据读/写电路进行定时控制的内部时钟信号。 内部时钟定时控制电路还包括一个逻辑电路,用于接收在内部时钟产生电路和多个行地址使能信号中产生的参考内部时钟,并产生用于定时控制数据输入电路的另一个内部时钟信号。

    Uncoated air bag fabric
    10.
    发明授权
    Uncoated air bag fabric 有权
    无涂层气囊布

    公开(公告)号:US06892767B2

    公开(公告)日:2005-05-17

    申请号:US10369788

    申请日:2003-02-20

    摘要: A compact, economical air bag fabric of low air permeability and light mass is realized by a thermoplastic fiber fabric having a distribution of pores formed by the fibers constructing the fabric, that is, the pore distribution of 2.0 or smaller and air permeability of 2.5 L/cm2/min or lower. By setting a permeating deformation index PI of the thermoplastic fiber to 0.1 to 0.6 and the air permeability of the fabric at the differential pressure of 20 kPa to 1.0 (L/cm2/min) or lower, an economical uncoated air bag fabric of which air permeability is low but increases under the high differential pressure condition in the latter period of development is obtained.

    摘要翻译: 通过具有由构成织物的纤维形成的孔分布的热塑性纤维织物,即2.0或更小的孔分布和2.5L的透气度,可以实现低透气性和轻质量的紧凑经济的气囊织物 / cm 2 / min以下。 通过将热塑性纤维的渗透变形指数PI设定为0.1〜0.6,在20kPa的差压下的织物的透气度为1.0(L / cm 2 / min / min)以下, 获得了经济的未涂布气囊织物,其透气性低,但在后期的高压差条件下增加。