公开(公告)号：US06687629B1

公开(公告)日：2004-02-03

申请号：US09408280

申请日：1999-09-29

申请人： Takahiro Yamaguchi ,  Mani Soma ,  Masahiro Ishida ,  Yasuo Furukawa ,  Toshifumi Watanabe

发明人： Takahiro Yamaguchi ,  Mani Soma ,  Masahiro Ishida ,  Yasuo Furukawa ,  Toshifumi Watanabe

IPC分类号： G01R2926

CPC分类号： G01R29/26

摘要： A clock waveform XC(t) is transformed into a complex analytic signal using a Hilbert transformer and an instantaneous phase of this analytic signal is estimated. A linear phase is subtracted from the instantaneous phase to obtain a varying term &Dgr;&phgr;(t). A difference between the maximum value and the minimum value of the varying term &Dgr;&phgr;(t) is obtained as a peak-to-peak jitter, and a root-mean-square of the varying term &Dgr;&phgr;(t) is calculated to obtain an RMS jitter.

摘要翻译： 使用希尔伯特变换器将时钟波形XC（t）变换为复数分析信号，并估计该分析信号的瞬时相位。 从瞬时相位减去线性相位以获得变化项Deltaphi（t）。 获得变化项Deltaphi（t）的最大值和最小值之间的差作为峰 - 峰抖动，并且计算变化项Deltaphi（t）的均方根以获得RMS 抖动。

公开(公告)号：US06795496B1

公开(公告)日：2004-09-21

申请号：US09647908

申请日：2000-10-05

申请人： Mani Soma ,  Takahiro Yamaguchi ,  Masahiro Ishida ,  Yasuo Furukawa ,  Toshifumi Watanabe

发明人： Mani Soma ,  Takahiro Yamaguchi ,  Masahiro Ishida ,  Yasuo Furukawa ,  Toshifumi Watanabe

IPC分类号： H04B346

CPC分类号： G01R29/26

摘要： A signal under measurement is transformed into a complex analytic signal using a Hilbert transformer and an instantaneous phase of this analytic signal is estimated. A linear phase is subtracted from the instantaneous phase to obtain a phase noise waveform. The phase noise waveform is sampled in the proximity of a zero crossing point of a real part of the analytic signal. A differential waveform of the sample phase noise waveform is calculated to obtain a differential phase noise waveform. An RMS jitter is obtained from the phase noise waveform, and a peak-to-peak jitter is obtained from the phase noise waveform.

摘要翻译： 使用希尔伯特变换器将测量信号转换为复杂的分析信号，并估计该分析信号的瞬时相位。 从瞬时相位减去线性相位以获得相位噪声波形。 相位噪声波形在分析信号的实部的零交叉点附近被采样。 计算采样相位噪声波形的差分波形以获得差分相位噪声波形。 从相位噪声波形获得RMS抖动，从相位噪声波形获得峰 - 峰抖动。

公开(公告)号：US08536887B2

公开(公告)日：2013-09-17

申请号：US12830938

申请日：2010-07-06

申请人： Yasuo Furukawa

发明人： Yasuo Furukawa

IPC分类号： G01R31/3187

CPC分类号： G01R31/31922

摘要： A probe circuit is provided in an electronic device that includes a circuit which is under test and outputs a response signal corresponding to an input signal in synchronization with an operation clock. The probe circuit includes a sampling clock supplying section that outputs a sampling clock having a predetermined frequency, and a sampling section that outputs, outside the electronic device, a probe output signal of which frequency is lower than a frequency of the response signal and which corresponds to a sampling result obtained by sampling the response signal using the sampling clock. The response signal has a prescribed signal pattern repeated with a predetermined recurrence period, and the sampling clock supplying section outputs the sampling clock of which relative phase with respect to the signal pattern sequentially changes in each recurrence period.

摘要翻译： 探针电路设置在电子设备中，该电子设备包括被测试的电路，并且与操作时钟同步地输出与输入信号相对应的响应信号。 探针电路包括：采样时钟提供部，其输出具有预定频率的采样时钟;以及采样部，其在电子设备外部输出频率低于所述响应信号的频率的探测输出信号，并且对应于 通过使用采样时钟对响应信号进行采样而获得的采样结果。 响应信号具有以预定的重复周期重复的规定信号图案，并且采样时钟提供部分输出相对于信号模式的相对相位在每个复现周期中顺序变化的采样时钟。

公开(公告)号：US08525714B2

公开(公告)日：2013-09-03

申请号：US13414611

申请日：2012-03-07

申请人： Koji Asami ,  Yasuo Furukawa

发明人： Koji Asami ,  Yasuo Furukawa

IPC分类号： H03M1/06

CPC分类号： H03M1/109 ,  H03M1/12

摘要： A test apparatus configured to test an N-bit (N represents an integer) A/D converter is provided. A voltage generating unit outputs a 2N-valued analog voltage to the A/D converter. A capture unit captures an output code of the A/D converter for each level. A signal processing unit compares the output code captured for each level with the corresponding expected value code, corrects the value of the analog voltage for each level based upon the comparison result, and outputs the corrected analog voltage to the voltage generating unit.

摘要翻译： 提供了一种被配置为测试N位（N表示整数）A / D转换器的测试装置。 电压产生单元向A / D转换器输出2N值的模拟电压。 捕获单元捕获每个级别的A / D转换器的输出代码。 信号处理单元将每个级别捕获的输出代码与相应的预期值代码进行比较，根据比较结果对每个级别的模拟电压值进行校正，并将校正的模拟电压输出到电压产生单元。

公开(公告)号：US20120229314A1

公开(公告)日：2012-09-13

申请号：US13414611

申请日：2012-03-07

申请人： Koji Asami ,  Yasuo Furukawa

发明人： Koji Asami ,  Yasuo Furukawa

IPC分类号： H03M1/06

CPC分类号： H03M1/109 ,  H03M1/12

摘要： A test apparatus configured to test an N-bit (N represents an integer) A/D converter is provided. A voltage generating unit outputs a 2N-valued analog voltage to the A/D converter. A capture unit captures an output code of the A/D converter for each level. A signal processing unit compares the output code captured for each level with the corresponding expected value code, corrects the value of the analog voltage for each level based upon the comparison result, and outputs the corrected analog voltage to the voltage generating unit.

摘要翻译： 提供了一种被配置为测试N位（N表示整数）A / D转换器的测试装置。 电压产生单元向A / D转换器输出2N值的模拟电压。 捕获单元捕获每个级别的A / D转换器的输出代码。 信号处理单元将每个级别捕获的输出代码与相应的预期值代码进行比较，根据比较结果对每个级别的模拟电压值进行校正，并将校正的模拟电压输出到电压产生单元。

公开(公告)号：US07859288B2

公开(公告)日：2010-12-28

申请号：US12209213

申请日：2008-09-12

申请人： Yasuo Furukawa

发明人： Yasuo Furukawa

IPC分类号： G01R31/26

CPC分类号： G01R31/31924 ,  G01R31/3004

摘要： Provided is A test apparatus that tests a device under test, including a power supply section that supplies power to a power supply terminal of the device under test; a power supply control section that controls the power supply section to output the power at a plurality of voltage levels; a current measuring section that measures, at each voltage level, a current value of a quiescent current of the device under test, the quiescent current being supplied to the power supply terminal of the device under test by the power supply section; and an analyzing section that analyzes whether a defect is present in the device under test by using at least three current values from among the current values measured by the current measuring section at the plurality of voltage levels.

摘要翻译： 提供了一种测试被测设备的测试设备，包括向被测设备的电源端子供电的电源部分; 电源控制部分，其控制所述电源部分以多个电压电平输出电力; 电流测量部分，在每个电压电平下测量被测器件的静态电流的当前值，所述静态电流由所述电源部分提供给被测器件的电源端子; 以及分析部，其通过使用在所述多个电压电平下由所述电流测量部测量的所述电流值中的至少三个电流值来分析所述被测器件中是否存在缺陷。

公开(公告)号：US20080157804A1

公开(公告)日：2008-07-03

申请号：US12048952

申请日：2008-03-14

申请人： Eric B. KUSHNICK ,  Yasuo Furukawa ,  Lawrence Kraus ,  James Getchell

发明人： Eric B. KUSHNICK ,  Yasuo Furukawa ,  Lawrence Kraus ,  James Getchell

IPC分类号： G01R1/20

CPC分类号： G01R31/31907

摘要： A carrier module that is able to adapt non-standard instrument cards to the architecture of a test system is disclosed. Instrument cards based on non-standard architectures may be combined on a single carrier module. The carrier module is then plugged into the test head of the test system. The carrier module provides circuitry, contained on a plug-in sub-module called an Application Interface Adapter (AIA), to interface between the instrument cards and the test head interface connector. Additionally, the AIA may also provide access from the instrument cards to ATE system calibration circuitry. The carrier module uses the standard data bus of the test system for housekeeping and control functions. A second bus provides the bus for the non-standard instrument cards. Software drivers provided with the instrument cards are encapsulated with an appropriate wrapper so that the cards run seamlessly in the software environment of the test system.

摘要翻译： 公开了能够将非标准仪表卡适配到测试系统架构的载体模块。 基于非标准架构的仪表卡可以组合在单个载体模块上。 载体模块然后插入测试系统的测试头。 载体模块提供包含在称为应用接口适配器（AIA）的插件子模块上的电路，用于在仪表卡和测试头接口连接器之间进行接口。 此外，AIA还可以提供从仪表卡到ATE系统校准电路的访问。 运营商模块使用测试系统的标准数据总线进行管理和控制功能。 第二辆公交车为非标准仪表卡提供总线。 仪器卡随附的软件驱动程序用适当的包装纸封装，以便卡片在测试系统的软件环境中无缝运行。

公开(公告)号：US07242197B2

公开(公告)日：2007-07-10

申请号：US11385247

申请日：2006-03-21

申请人： Mitsunori Satou ,  Yasuo Furukawa

发明人： Mitsunori Satou ,  Yasuo Furukawa

IPC分类号： G01R31/08 ,  G01R27/08

CPC分类号： G01R15/183 ,  G01R1/18 ,  G01R15/185

摘要： There is provided a current measuring apparatus for measuring current-under-measurement flowing between a first measuring terminal and a second measuring terminal, having a plurality of primary coils whose one end is electrically connected with the first measuring terminal and another end thereof is electrically connected with the second measuring terminal, a secondary coil that generates voltage representing the current-under-measurement corresponding to the current-under-measurement flowing through the plurality of primary coils and coaxial cables, each corresponding to the plurality of primary coils and having a signal line that connects one end of the primary coil with the first measuring terminal and a shield, and the coaxial cable has the signal line, an insulating layer for coating the signal line, first one of the shield having a tape-like conductor wound around the insulating layer and second one of the shield made of a conductor provided around the first shield.

摘要翻译： 提供了一种用于测量在第一测量端子和第二测量端子之间流动的电流测量装置，具有多个初级线圈，其一端与第一测量端子电连接，另一端电连接 第二测量端子产生次级线圈，该次级线圈产生代表流过多个初级线圈和同轴电缆的电流下测量相应的电流下测量的电压，每个初级线圈和同轴电缆对应于多个初级线圈并且具有信号 将一次线圈的一端与第一测量端子和屏蔽连接的线路，并且同轴电缆具有信号线，用于涂覆信号线的绝缘层，屏蔽体中的第一个具有卷绕在其上的带状导体 绝缘层和由设置在第一屏蔽件周围的导体制成的第二屏蔽层。

公开(公告)号：US07126367B2

公开(公告)日：2006-10-24

申请号：US11006868

申请日：2004-12-08

申请人： Yasuo Furukawa

发明人： Yasuo Furukawa

IPC分类号： G01R31/26 ,  G01R31/28

CPC分类号： G01R31/3008

摘要： A test apparatus for testing an electronic device provided with a field effect transistor, which operates in response to a given test pattern, is provided, wherein the test apparatus includes a power supply for providing electric power which drives the electronic device, a pattern generating unit for generating a plurality of test patterns sequentially and providing the electronic device with the test patterns, a leak current detecting unit for detecting a leak current of the field effect transistor, a voltage control unit for controlling a substrate voltage applied to a substrate on which the field effect transistor is provided, in order to maintain the leak current detected by the leak current detecting unit at a predetermined value, and a power supply current measuring unit for measuring a power supply current input to the electronic device at every time when each of the test patterns is applied and deciding acceptability of the electronic device on the basis of the measured power supply currents.

摘要翻译： 本发明提供了一种用于测试具有响应于给定测试图案操作的场效应晶体管的电子设备的测试设备，其中测试设备包括用于提供驱动电子设备的电力的电源，模式产生单元 用于顺序地产生多个测试图案并为电子设备提供测试图案;漏电流检测单元，用于检测场效应晶体管的漏电流;电压控制单元，用于控制施加到基板上的基板电压， 提供场效应晶体管，以便将由漏电流检测单元检测到的漏电流保持在预定值;以及电源电流测量单元，用于在每次的每个时刻测量输入到电子设备的电源电流 应用测试模式，并根据测量的功率决定电子设备的可接受性 充足的电流。

公开(公告)号：US20060114015A1

公开(公告)日：2006-06-01

申请号：US11331815

申请日：2006-01-13

申请人： Yasuo Furukawa

发明人： Yasuo Furukawa

IPC分类号： G01R31/26

CPC分类号： G01R31/31928

摘要： A test apparatus for testing switching speed of a circuit, which includes a pre-stage logic element outputting a first or second level voltage and a post-stage logic element to which the output signal of the pre-stage logic element is input, is provided, wherein the post-stage logic element includes the post-stage FET, a gate terminal of which the output signal is input to, for outputting a different level of voltage according to the case that the output signal voltage is higher or lower than a predetermined threshold voltage, and the test apparatus includes a threshold voltage setting unit for setting a threshold voltage of a post-stage field effect transistor (FET) to be different from that in a normal operation by setting a substrate voltage of the post-stage FET to have a value different from that in the normal operation of the circuit; a delay time measuring unit for measuring a delay time of the circuit to which the threshold voltage different from that in the normal operation is set; and an error detecting unit for detecting an error in switching speed of the circuit based on the delay time.

摘要翻译： 提供一种用于测试电路的切换速度的测试装置，其包括输出第一或第二电平电压的前级逻辑元件和输入前级逻辑元件的输出信号的后级逻辑元件 ，其中后级逻辑元件包括后级FET，其输出信号被输入的栅极端子，用于根据输出信号电压高于或低于预定值的情况输出不同电平电平 阈值电压，并且测试装置包括阈值电压设置单元，用于通过将后级FET的衬底电压设置为与正常操作中的阈值电压不同的阈值电压来设置 具有与电路的正常工作不同的值; 用于测量与正常操作不同的阈值电压的电路的延迟时间的延迟时间测量单元; 以及误差检测单元，用于基于延迟时间检测电路的切换速度的误差。