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27 条记录 (耗时 0.016 秒)

    Single point modulator having a PLL circuit
    3.
    发明申请
    Single point modulator having a PLL circuit 有权
    具有PLL电路的单点调制器

    公开(公告)号：US20050025276A1

    公开(公告)日：2005-02-03

    申请号：US10917101

    申请日：2004-08-12

    申请人： Markus Hammes ,  Giuseppe Puma ,  Stefan Waasen

    发明人： Markus Hammes ,  Giuseppe Puma ,  Stefan Waasen

    IPC分类号： H03C3/09 ,  H03L7/197 ,  H03M7/00

    CPC分类号： H03C3/0933 ,  H03C3/0925 ,  H03L7/1976

    摘要： A single-point modulator (1) has a PLL circuit (2) and a programmable frequency divider (7) whose control connection is connected to a circuit branch for injecting a digital modulation signal (15) which is arranged in the feedback path of the PLL circuit (2). The circuit branch contains a sigma-delta modulator (9) which, in turn, has a digital filter (24) having a transfer function H(z). The noise transfer function NTF(z) of the sigma-delta modulator (9) is given by the function NTF(z)=1−H(z).

    摘要翻译： 单点调制器（1）具有PLL电路（2）和可编程分频器（7），其控制连接连接到电路支路，用于注入数字调制信号（15），该数字调制信号（15）被布置在 PLL电路（2）。 电路分支包含一个Σ-Δ调制器（9），它又具有一个具有传递函数H（z）的数字滤波器（24）。 Σ-Δ调制器（9）的噪声传递函数NTF（z）由函数NTF（z）= 1-H（z）给出。

    Radio receiver for the reception of data bursts which are modulated with two modulation types
    4.
    发明申请
    Radio receiver for the reception of data bursts which are modulated with two modulation types 有权

    公开(公告)号：US20060116091A1

    公开(公告)日：2006-06-01

    申请号：US11261008

    申请日：2005-10-28

    申请人： Markus Hammes ,  Giuseppe Puma

    发明人： Markus Hammes ,  Giuseppe Puma

    IPC分类号： H04B7/08 ,  H04B1/16

    CPC分类号： H04L12/16

    摘要： The invention relates to a radio receiver for the reception of a data burst which is transmitted by a transmitter, in which case the data burst includes a first section which has been modulated using a first modulation method at the transmitter end, and a second section which is transmitted after the first section and has been modulated using a second modulation method at the transmitter end. The radio receiver has a first reception path for processing of the first section and a second reception path for processing of the second section.

    Circuit arrangement provided with a phase-locked loop and transmitter-receiver with said circuit arrangement
    5.
    发明申请
    Circuit arrangement provided with a phase-locked loop and transmitter-receiver with said circuit arrangement 有权
    具有锁相环的电路装置和具有所述电路装置的发射器 - 接收器

    公开(公告)号：US20050185749A1

    公开(公告)日：2005-08-25

    申请号：US11018379

    申请日：2004-12-21

    申请人： Thomas Convent ,  Markus Hammes ,  Andre Hanke ,  Giuseppe Puma ,  Walter Mevissen

    发明人： Thomas Convent ,  Markus Hammes ,  Andre Hanke ,  Giuseppe Puma ,  Walter Mevissen

    IPC分类号： H03C3/09 ,  H03D3/24 ,  H04B1/40

    CPC分类号： H03C3/095 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H04B1/403

    摘要： The invention specifies a circuit arrangement with a phase locked loop (1), which can be used as a mobile radio transmitter, in particular. The reference frequency for the PLL (1), which is provided by means of the source (3), is multiplied by a multiplier (10) and is down-converted to an intermediate-frequency level in a down-conversion mixer (9) using the output signal from the PLL, and is evaluated such that a modulator (13) connected to the input of the oscillator (6) can be trimmed. The inventive principle is used to advantage in two-point modulators and allows inexpensive, integratable mobile radio transmitters with good noise characteristics.

    摘要翻译： 本发明特别规定了具有锁相环（1）的电路装置，其特别可用作移动无线电发射机。 通过源（3）提供的PLL（1）的参考频率乘以乘法器（10），并在下变频混频器（9）中下变频至中频电平， 使用来自PLL的输出信号，并进行评估，使得连接到振荡器（6）的输入端的调制器（13）可被修整。 本发明的原理用于两点调制器中的优点，并且允许具有良好噪声特性的便宜且可集成的移动无线电发射机。

    Method for trimming a two-point modulator, and a two-point modulator having a trimming apparatus
    6.
    发明申请
    Method for trimming a two-point modulator, and a two-point modulator having a trimming apparatus 失效
    用于修整两点调制器的方法和具有修剪装置的两点调制器

    公开(公告)号：US20050084034A1

    公开(公告)日：2005-04-21

    申请号：US10923351

    申请日：2004-08-20

    申请人： Markus Hammes ,  Giuseppe Puma ,  Stefan Waasen

    发明人： Markus Hammes ,  Giuseppe Puma ,  Stefan Waasen

    IPC分类号： H03C3/09 ,  H04L27/04

    CPC分类号： H03C3/095 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941

    摘要： A PLL circuit (1) is regulated by means of a digital modulation signal (28) at a first frequency, and is then regulated at a second frequency, by deactivation of the digital modulation signal (28). A difference signal (32), which is characteristic of the voltage change in a control signal (22) for the VCO (7) which is produced by deactivation of the digital modulation signal (28) is compared with an analog modulation signal (34). The analog modulation signal (34) is changed so as to correct any discrepancy determined during the comparison.

    摘要翻译： PLL电路（1）借助于第一频率的数字调制信号（28）进行调节，然后通过停止数字调制信号（28）以第二频率调节。 将通过停止数字调制信号（28）产生的用于VCO（7）的控制信号（22）中的电压变化的特征的差分信号（32）与模拟调制信号（34）进行比较， 。 改变模拟调制信号（34）以便校正在比较期间确定的任何差异。

    Polar modulator and a use thereof
    7.
    发明申请
    Polar modulator and a use thereof 失效
    极性调节剂及其用途

    公开(公告)号：US20060135089A1

    公开(公告)日：2006-06-22

    申请号：US11284514

    申请日：2005-11-22

    申请人： Giuseppe Puma

    发明人： Giuseppe Puma

    IPC分类号： H04B1/02

    CPC分类号： H04L27/361 ,  H03C5/00 ,  H03F3/24 ,  H03L7/06

    摘要： A polar modulator has a low AM-AM and AM-PM distortion comprises a phase locked loop. The phase locked loop is designed for outputting a high-frequency signal with a frequency derived from a phase modulation signal at an actuating input of the phase locked loop. A filter device, for suppressing a DC signal component, is coupled to an output of the phase locked loop. Furthermore, provision is made of a controllable voltage source with a control input suitable for feeding in an amplitude modulation signal. A push-pull amplifier is connected by an input to the filter device. It comprises two feedback amplifier transistors connected in series, which are connected to a voltage output of the controllable voltage source for supply purposes. Control terminals of the amplifier transistors are connected to the input and, via a load, to an output of the push-pull amplifier.

    摘要翻译： 极性调制器具有低AM-AM和AM-PM失真包括锁相环。 锁相环被设计用于在锁相环的致动输入处输出具有从相位调制信号导出的频率的高频信号。 用于抑制DC信号分量的滤波器装置耦合到锁相环的输出端。 此外，提供具有适于馈送幅度调制信号的控制输入的可控电压源。 推挽放大器通过输入连接到滤波器装置。 它包括串联连接的两个反馈放大器晶体管，它们连接到可控电压源的电压输出端用于供电目的。 放大器晶体管的控制端子连接到输入端并通过负载连接到推挽放大器的输出端。

    Oscillator circuit, in particular for mobile radio
    9.
    发明申请
    Oscillator circuit, in particular for mobile radio 有权
    振荡电路，特别适用于移动无线电

    公开(公告)号：US20060226918A1

    公开(公告)日：2006-10-12

    申请号：US11394013

    申请日：2006-03-30

    申请人： Alexander Belitzer ,  Stefan Herzinger ,  Giuseppe Puma

    发明人： Alexander Belitzer ,  Stefan Herzinger ,  Giuseppe Puma

    IPC分类号： H03L7/00

    CPC分类号： H03L7/00 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/124

    摘要： An oscillator is disclosed that is tunable to discrete values, and includes a tuning element which can be connected via a switching device. A rectifier circuit is connected to the output of the oscillator and forms a clock signal from the oscillator signal. The oscillator circuit contains a phase delay circuit having a switching input, a clock signal input which is coupled to the output of the rectifier circuit, and a switching output coupled to the switching device. The phase delay circuit has a comparison circuit for comparison of a phase of the clock signal that is applied to the signal input with a reference phase. This phase delay circuit is designed to emit a switching signal after application of an activation signal to the switching input and after the phase of the clock signal which is applied to the signal input matches the reference phase. In consequence, the switching process is delayed until the step-function response of the output signal of the oscillator does not cause a sudden phase change in the clock signal.

    摘要翻译： 公开了可调谐到离散值的振荡器，并且包括可经由开关装置连接的调谐元件。 整流电路连接到振荡器的输出端并形成来自振荡器信号的时钟信号。 振荡器电路包括具有开关输入的相位延迟电路，耦合到整流器电路的输出的时钟信号输入和耦合到开关器件的开关输出。 相位延迟电路具有用于比较施加到具有参考相位的信号输入的时钟信号的相位的比较电路。 该相位延迟电路被设计成在施加到开关输入的激活信号之后并且在施加到信号输入的时钟信号的相位与参考相位匹配之后发出切换信号。 因此，切换过程被延迟，直到振荡器的输出信号的阶跃函数响应不会引起时钟信号的突然相位变化。

    Detecting usable frequency channels by exploiting complex polyphase filter operation
    10.
    发明申请
    Detecting usable frequency channels by exploiting complex polyphase filter operation 有权
    通过利用复杂的多相滤波器操作来检测可用的频道

    公开(公告)号：US20050009487A1

    公开(公告)日：2005-01-13

    申请号：US10829665

    申请日：2004-04-22

    申请人： Giuseppe Puma

    发明人： Giuseppe Puma

    IPC分类号： H04B1/30 ,  H04B1/16 ,  H04B1/26 ,  H04B15/00

    CPC分类号： H04B1/30

    摘要： A circuit arrangement for detecting a usable frequency channel includes first and second devices for performing frequency conversion. The first and second frequency conversion devices have respective local oscillator inputs to which respective local oscillator signals are applied. The local oscillator signals are at a common frequency and have a phase difference of precisely 90°. A complex polyphase filter has first and second filter inputs connected to respective outputs of the first and second frequency conversion devices. A detection arrangement is connected to outputs of the complex polyphase filter in order to detect a signal level. A further arrangement can vary the phase angle of a signal output from at least one of the frequency conversion devices.

    摘要翻译： 用于检测可用频道的电路装置包括用于执行频率转换的第一和第二装置。 第一和第二变频装置具有各自的本地振荡器输入，各个本地振荡器信号被施加到其上。 本地振荡器信号处于公共频率，并具有精确的90°的相位差。 复合多相滤波器具有连接到第一和第二频率转换装置的相应输出的第一和第二滤波器输入。 检测装置连接到复数多相滤波器的输出端，以检测信号电平。 另外的布置可以改变从至少一个频率转换装置输出的信号的相位角。