摘要:
This invention discloses a monostable multivibrator which is useful for an FM detector circuit of a pulse count system. The monostable multivibrator has a time constant circuit which includes a capacitor, an amplifier circuit which receives an output of the time constant circuit, a positive feedback circuit which is connected between an output end of the amplifier circuit and an input end of the time constant circuit, and a trigger terminal which is disposed in a circuit loop constructed of the time constant circuit, the amplifier circuit and the positive feedback circuit; and is characterized in that the amplifier circuit is a differential amplifier which is made up of a pair of transistors connected in the differential form, the transistors being connected in common through emitter resistances connected in series with respective emitters thereof. Thus, the monostable multivibrator can provide pulse signals of a fixed pulse width without being influenced by noise.
摘要:
This invention relates to a monostable multivibrator which is operated in the non-saturated state. The monostable multivibrator circuit includes a time constant circuit which has a capacitor, an amplifier circuit which receives an output signal of the time constant circuit, a positive feedback circuit which is connected between an output end of the amplifier circuit and an input end of the time constant circuit, and a trigger terminal which is disposed in a circuit loop constructed of the time constant circuit, the amplifier circuit and the positive feedback circuit; and it is characterized in that the positive feedback circuit comprises a signal amplifying transistor which has a base receiving an output of the amplifier circuit and a collector supplying a signal to the time constant circuit, and a level clamp circuit which is coupled to the collector of the transistor in order to hold a collector output potential of the transistor higher than a base input potential thereof.
摘要:
A monostable multivibrator circuit including a time constant circuit which includes a capacitor, an amplifier circuit which receives an output signal of the time constant circuit, and a positive feedback circuit which is connected between an output end of the amplifier circuit and an input end of the time constant circuit, characterized in that a trigger circuit is incorporated in a part of a circuit loop which is constructed of the time constant circuit, the amplifier circuit and the positive feedback circuit, the trigger circuit comprising an emitter-follower transistor which receives a feedback signal, another emitter-follower transistor which receives a trigger signal and whose emitter is connected to an emitter of the first-mentioned emitter-follower transistor in common, and a constant-current circuit which supplies a constant current to the emitters connected in common. Thus, the monostable multivibrator circuit can provide a predetermined pulse signal without any interference attributable to a trigger input circuit.
摘要:
A trigger pulse forming circuit for converting a pulse signal into a trigger signal waveform is disclosed. It is characterized in that a time constant circuit is comprised in a collector output circuit of one of a pair of transistors for differential amplification and that a clamp circuit which employs a diode of the base-emitter path of a transistor is inserted between collector output circuits of the transistors for differential amplification. The input pulse signal to be subjected to the waveform conversion is impressed across the bases of the transistors for differential amplification, and the trigger pulse output signal is derived from the collector of the other of the transistors for differential amplification.
摘要:
A first intermediate frequency amplifier stage which executes the amplitude limiting operation of a double-converting FM tuner employing the integrated circuit technology is constructed in the form of an integrated circuit. An output signal of the first intermediate frequency amplifier stage is put into a square pulse waveform on the basis of the amplitude limiting operation, and therefore has higher harmonic components of high frequencies. When the higher harmonic components are injected into a second mixer circuit in a second frequency converter circuit, various higher harmonic components which have frequencies higher than a second intermediate frequency appear at the output of the second mixer conduit. When the higher harmonic components at the output of the second mixer circuit are injected into an FM demodulator circuit, beat trouble is induced. The second frequency converter circuit is also constructed in the form of an integrated circuit, and filter means to pass the fundamental waves of a first intermediate frequency signal and to reject the higher harmonic frequency components thereof is connected between the output of the first intermediate frequency amlifier stage executing the amplitude limiting operation and the input of the second mixer circuit, whereby the beat trouble can be prevented.
摘要:
In an intermittently operative phase-locked loop, in order to prevent the oscillator frequency from significantly changing at the time of turning on of an electric power source, a point in time at which a phase difference between clock signals respectively fed to a reference frequency divider and to a frequency divider for dividing the output frequency of a voltage-controlled oscillator becomes substantially zero is detected, and the two frequency dividers are initialized when the above-mentioned point in time is detected after turning on of the electric power source.
摘要:
In a receiver comprising a radio frequency amplifier stage, a frequency converter stage, an intermediate frequency amplifier stage and a detector, so that the gains of the radio frequency amplifier stage and the intermediate frequency amplifier stage are automatically controlled by an AGC voltage derived from the detector, the improvement further comprising a voltage comparator which compares a signal amplitude value of the radio frequency amplifier stage and a predetermined reference value and which provides a detection output signal when the former value becomes greater than the latter value, the gain of the radio frequency amplifier stage being reduced by the detection output signal so as to prevent the output clipping of the radio frequency amplifier stage.
摘要:
This invention relates to a phase coincidence detector for examining whether or not two input digital signals are coincident by utilizing a delay signal and an advance signal of a digital phase comparator which examines the phase difference between the two input digital signals and outputs the delay signal representing the delay of one of the input signals to the other and the advance signal representing the advance of one of the input signals to the other. Particularly, the output signals of the phase comparator, that is, the delay signal and the advance signal, are periodic pulse signals, and residual pulses having a small pulse width occur periodically even at the time of coincidence. The phase coincidence detector of this invention changes the delay and advance signals by a pulse width discrimination circuit for discriminating whether or not the phase difference between the two input signals is below a certain constant value, and samples the changed signals to output the in-phase and out-of-phase state as signals having different levels.
摘要:
An FM detector is constructed of a phase shift network and an analog multiplier. The analog multiplier includes a differential amplifier circuit and a phase detector circuit. The differential amplifier circuit includes differential pair transistors which are driven by FM intermediate frequency signals. One of the differential pair transistors has another transistor connected thereto which is also driven by the FM intermediate frequency signal. A collector signal of either one of the differential pair transistors is applied to the phase detector circuit through the phase shift network, while a collector signal of the other transistor is directly applied to the phase detector circuit. An emitter of the one transistor and an emitter of the other transistor are connected through resistors, whereby the signal-to-noise ratio of the FM detector is improved.
摘要:
In a multiplex decoder circuit comprising two pairs of transistor differential circuits driven by switching signals of a 38 kHz subcarrier signal, for separating a stereo composite signal into left and right channel signals, a differential amplifier formed of a pair of transistors connected to the respective differential circuits for amplifying and injecting the composite signal, and a constant current source, at least one of the pair of differential transistor amplifiers being supplied with the composite signal is formed of a negative feedback amplifier to suppress the output distortion of the transistor amplifier due to variations in the emitter resistance of the transistor amplifier with respect to the variations of the input stereo composite signal. As a result, the waveform distortion of the separated left and right channel signals is reduced.