公开(公告)号：US08421067B2

公开(公告)日：2013-04-16

申请号：US12846572

申请日：2010-07-29

申请人： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba ,  Junichiro Sakata

发明人： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba ,  Junichiro Sakata

IPC分类号： H01L29/12

CPC分类号： H01L29/78696 ,  H01L27/1225 ,  H01L29/7869

摘要： A semiconductor device having a structure which enables sufficient reduction in parasitic capacitance is provided. In addition, the operation speed of thin film transistors in a driver circuit is improved. In a bottom-gate thin film transistor in which an oxide insulating layer is in contact with a channel formation region in an oxide semiconductor layer, a source electrode layer and a drain electrode layer are formed in such a manner that they do not overlap with a gate electrode layer. Thus, the distance between the gate electrode layer and the source electrode layer and between the gate electrode layer and the drain electrode layer are increased; accordingly, parasitic capacitance can be reduced.

摘要翻译： 提供具有能够充分降低寄生电容的结构的半导体器件。 此外，提高了驱动电路中薄膜晶体管的操作速度。 在其中氧化物绝缘层与氧化物半导体层中的沟道形成区域接触的底栅薄膜晶体管中，以与它们不重叠的方式形成源电极层和漏电极层 栅电极层。 因此，栅极电极层与源电极层之间以及栅极电极层和漏极电极层之间的距离增加; 因此，可以减小寄生电容。

公开(公告)号：US08383470B2

公开(公告)日：2013-02-26

申请号：US12634084

申请日：2009-12-09

申请人： Kengo Akimoto ,  Masashi Tsubuku

发明人： Kengo Akimoto ,  Masashi Tsubuku

IPC分类号： H01L21/84 ,  H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036

CPC分类号： H01L33/0041 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： One of factors that increase the contact resistance at the interface between a first semiconductor layer where a channel is formed and source and drain electrode layers is a film with high electric resistance formed by dust or impurity contamination of a surface of a metal material serving as the source and drain electrode layers. As a solution, a first protective layer and a second protective layer including a second semiconductor having a conductivity that is less than or equal to that of the first semiconductor layer is stacked successively over source and drain electrode layers without exposed to air, the stack of films is used for the source and drain electrode layers.

摘要翻译： 增加在形成沟道的第一半导体层与源电极层与漏极电极层之间的界面处的接触电阻的因素之一是具有高电阻的膜，其由作为金属材料的金属材料的表面的灰尘或杂质污染形成 源极和漏极电极层。 作为解决方案，包括导电率小于或等于第一半导体层的导电率的第二半导体的第一保护层和第二保护层在不暴露于空气的情况下在源极和漏极电极层上依次层叠， 膜用于源电极层和漏电极层。

公开(公告)号：US20110057918A1

公开(公告)日：2011-03-10

申请号：US12872861

申请日：2010-08-31

申请人： Hajime Kimura ,  Kengo Akimoto ,  Masashi Tsubuku ,  Toshinari Sasaki

发明人： Hajime Kimura ,  Kengo Akimoto ,  Masashi Tsubuku ,  Toshinari Sasaki

IPC分类号： G09G5/00

CPC分类号： H01L29/78693 ,  G09G3/3648 ,  G09G2300/0842 ,  H01L27/1225 ,  H01L29/78618

摘要： A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

摘要翻译： 一种显示装置，包括具有存储器的像素。 像素至少包括显示元件，电容器，反相器和开关。 开关由保持在电容器中的信号和从逆变器输出的信号控制，使得电压被提供给显示元件。 逆变器和开关可以由具有相同极性的晶体管构成。 可以使用透光材料形成包括在像素中的半导体层。 此外，可以使用透光导电层来形成栅电极，漏电极和电容器电极。 以这种方式使用透光材料形成像素，由此显示装置可以是包括具有存储器的像素的透射显示装置。

公开(公告)号：US09087744B2

公开(公告)日：2015-07-21

申请号：US13282505

申请日：2011-10-27

申请人： Masashi Tsubuku ,  Kengo Akimoto

发明人： Masashi Tsubuku ,  Kengo Akimoto

IPC分类号： G06F3/038 ,  H01L27/12 ,  G09F9/30 ,  G02F1/1368 ,  G09G3/36

CPC分类号： H01L27/1225 ,  G02F1/1368 ,  G06F3/038 ,  G09F9/30 ,  G09G3/3648 ,  G09G2360/142

摘要： When a positive bias voltage is applied to a gate electrode of a transistor including an oxide semiconductor for longer than or equal to 10 msec, electric characteristics of the transistor, which have varied due to the light irradiation, can be brought to the state which is substantially the same as the state before the light irradiation. Note that a positive bias voltage is applied to the gate electrode of the transistor at an appropriate timing with reference to the amount of incident light received by the transistor. Accordingly, a display device in which a reduction in display quality is suppressed even when light irradiation is performed can be realized.

摘要翻译： 当正偏压被施加到包括氧化物半导体的晶体管的栅电极长于或等于10毫秒时，由于光照射而变化的晶体管的电特性可以变为 基本上与光照射前的状态相同。 注意，在相应于由晶体管接收的入射光量的适当时刻，正偏置电压施加到晶体管的栅电极。 因此，即使在进行光照射时也能够抑制显示品质的降低的显示装置。

公开(公告)号：US08871565B2

公开(公告)日：2014-10-28

申请号：US13222513

申请日：2011-08-31

申请人： Shunpei Yamazaki ,  Yusuke Nonaka ,  Takayuki Inoue ,  Masashi Tsubuku ,  Kengo Akimoto ,  Akiharu Miyanaga

发明人： Shunpei Yamazaki ,  Yusuke Nonaka ,  Takayuki Inoue ,  Masashi Tsubuku ,  Kengo Akimoto ,  Akiharu Miyanaga

IPC分类号： H01L21/44 ,  H01L29/786

CPC分类号： H01L29/78606 ,  H01L23/552 ,  H01L23/564 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.

摘要翻译： 本发明的目的是制造具有稳定的电特性和高可靠性的氧化物半导体膜的半导体装置。 通过利用包含在氧化物半导体靶中的多种原子的原子量的差异，形成结晶氧化物半导体膜，而不进行多个步骤，优选将低原子量的锌沉积在氧化物绝缘膜上 形成包含锌的晶种; 并且具有高原子量的锡，铟等沉积在晶种上同时引起晶体生长。 此外，通过使用具有包含锌作为核的六方晶系结构的晶种进行晶体生长来形成结晶氧化物半导体膜，从而形成单晶氧化物半导体膜或大致单晶氧化物半导体膜。

公开(公告)号：US08841661B2

公开(公告)日：2014-09-23

申请号：US12700758

申请日：2010-02-05

申请人： Kengo Akimoto ,  Masashi Tsubuku

发明人： Kengo Akimoto ,  Masashi Tsubuku

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L21/02

CPC分类号： H01L27/1214 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248

摘要： A method for forming a thin film transistor includes steps of forming a first wiring layer over a first electrode layer and forming a second wiring layer over a second electrode layer, wherein the first electrode layer extends beyond an end portion of the first wiring layer, the second electrode layer extends beyond an end portion of the second wiring layer, and a semiconductor layer is formed so as to be electrically connected to a side face and a top face of the first electrode layer and a side face and a top face of the second electrode layer.

摘要翻译： 一种形成薄膜晶体管的方法包括以下步骤：在第一电极层之上形成第一布线层，并在第二电极层上形成第二布线层，其中第一电极层延伸超出第一布线层的端部， 第二电极层延伸超过第二布线层的端部，并且形成半导体层以与第一电极层的侧面和顶面电连接，第二电极层的侧面和第二面的顶面 电极层。

公开(公告)号：US08421083B2

公开(公告)日：2013-04-16

申请号：US12846556

申请日：2010-07-29

申请人： Shunpei Yamazaki ,  Kengo Akimoto ,  Masashi Tsubuku ,  Toshinari Sasaki ,  Hideaki Kuwabara

发明人： Shunpei Yamazaki ,  Kengo Akimoto ,  Masashi Tsubuku ,  Toshinari Sasaki ,  Hideaki Kuwabara

IPC分类号： H01L29/04 ,  H01L21/00 ,  G02F1/135

CPC分类号： H01L33/0041 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a bottom-gate thin film transistor using the stack of the first oxide semiconductor layer and the second oxide semiconductor layer, an oxide insulating layer serving as a channel protective layer is formed over and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the insulating layer, an oxide insulating layer covering a peripheral portion (including a side surface) of the stack of the oxide semiconductor layers is formed.

摘要翻译： 在使用第一氧化物半导体层和第二氧化物半导体层的堆叠的底栅极薄膜晶体管中，形成作为沟道保护层的氧化物绝缘层，与氧化物半导体层的与 栅电极层。 在与绝缘层的形成相同的步骤中，形成覆盖氧化物半导体层的叠层的周边部分（包括侧面）的氧化物绝缘层。

公开(公告)号：US08378344B2

公开(公告)日：2013-02-19

申请号：US12869327

申请日：2010-08-26

申请人： Masayuki Sakakura ,  Yoshiaki Oikawa ,  Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba

发明人： Masayuki Sakakura ,  Yoshiaki Oikawa ,  Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba

IPC分类号： H01L29/10

CPC分类号： H01L27/1225 ,  H01L27/322 ,  H01L27/3262

摘要： It is an object to provide a light-emitting device in which plural kinds of circuits are formed over one substrate and plural kinds of thin film transistors corresponding to characteristics of the plural kinds of circuits are provided. An inverted coplanar thin film transistor in which an oxide semiconductor layer overlaps with a source electrode layer and a drain electrode layer is used for a pixel, and a channel-etched thin film transistor is used for a driver circuit. A color filter layer is provided between the pixel thin film transistor and a light-emitting element which is electrically connected to the pixel thin film transistor so as to overlap with the light-emitting element.

摘要翻译： 本发明的目的是提供一种在一个衬底上形成多种电路的发光器件，并且提供与多种电路的特性对应的多种薄膜晶体管。 将其中与源电极层和漏电极层重叠的氧化物半导体层用于像素的反转共面薄膜晶体管，并且将沟道蚀刻薄膜晶体管用于驱动器电路。 像素薄膜晶体管和与像素薄膜晶体管电连接以与发光元件重叠的发光元件设置滤色器层。

公开(公告)号：US08115883B2

公开(公告)日：2012-02-14

申请号：US12861190

申请日：2010-08-23

申请人： Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba ,  Masayuki Sakakura ,  Yoshiaki Oikawa

发明人： Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba ,  Masayuki Sakakura ,  Yoshiaki Oikawa

IPC分类号： G02F1/136

CPC分类号： H01L21/477 ,  G02F1/133345 ,  G02F1/1368 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

摘要： An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

摘要翻译： 本发明的目的是提供具有优异显示特性的显示装置，其中使用具有对应于各个电路的特性的不同结构的晶体管形成设置在一个基板上的像素电路和驱动电路。 驱动器电路部分包括驱动电路晶体管，其中使用金属膜形成栅电极层，源电极层和漏电极层，并且使用氧化物半导体形成沟道层。 像素部分包括其中使用氧化物导体形成栅电极层，源电极层和漏电极层的像素晶体管，并且使用氧化物半导体形成半导体层。 像素晶体管使用透光材料形成，因此可以制造具有较高开口率的显示装置。

公开(公告)号：US08021917B2

公开(公告)日：2011-09-20

申请号：US12612006

申请日：2009-11-04

申请人： Kengo Akimoto ,  Masashi Tsubuku

发明人： Kengo Akimoto ,  Masashi Tsubuku

IPC分类号： H01L21/84

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/41733

摘要： An object is to suppress deterioration of element characteristics even when an oxide semiconductor is formed after a gate insulating layer, a source electrode layer, and a drain electrode layer are formed. A gate electrode layer is formed over a substrate. A gate insulating layer is formed over the gate electrode layer. A source electrode layer and a drain electrode layer are formed over the gate insulating layer. Surface treatment is performed on surfaces of the gate insulating layer, the source electrode layer, and the drain electrode layer which are formed over the substrate. After the surface treatment is performed, an oxide semiconductor layer is formed over the gate insulating layer, the source electrode layer, and the drain electrode layer.

摘要翻译： 即使在形成了栅极绝缘层，源极电极层和漏极电极层之后形成氧化物半导体，也是要抑制元件特性的劣化。 在基板上形成栅极电极层。 在栅电极层上形成栅极绝缘层。 源极电极层和漏电极层形成在栅绝缘层上。 在形成在基板上的栅极绝缘层，源极电极层和漏极电极层的表面上进行表面处理。 在进行表面处理之后，在栅极绝缘层，源极电极层和漏极电极层上形成氧化物半导体层。