公开(公告)号：US08421067B2

公开(公告)日：2013-04-16

申请号：US12846572

申请日：2010-07-29

申请人： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba ,  Junichiro Sakata

发明人： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba ,  Junichiro Sakata

IPC分类号： H01L29/12

CPC分类号： H01L29/78696 ,  H01L27/1225 ,  H01L29/7869

摘要： A semiconductor device having a structure which enables sufficient reduction in parasitic capacitance is provided. In addition, the operation speed of thin film transistors in a driver circuit is improved. In a bottom-gate thin film transistor in which an oxide insulating layer is in contact with a channel formation region in an oxide semiconductor layer, a source electrode layer and a drain electrode layer are formed in such a manner that they do not overlap with a gate electrode layer. Thus, the distance between the gate electrode layer and the source electrode layer and between the gate electrode layer and the drain electrode layer are increased; accordingly, parasitic capacitance can be reduced.

摘要翻译： 提供具有能够充分降低寄生电容的结构的半导体器件。 此外，提高了驱动电路中薄膜晶体管的操作速度。 在其中氧化物绝缘层与氧化物半导体层中的沟道形成区域接触的底栅薄膜晶体管中，以与它们不重叠的方式形成源电极层和漏电极层 栅电极层。 因此，栅极电极层与源电极层之间以及栅极电极层和漏极电极层之间的距离增加; 因此，可以减小寄生电容。

公开(公告)号：US08383470B2

公开(公告)日：2013-02-26

申请号：US12634084

申请日：2009-12-09

申请人： Kengo Akimoto ,  Masashi Tsubuku

发明人： Kengo Akimoto ,  Masashi Tsubuku

IPC分类号： H01L21/84 ,  H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036

CPC分类号： H01L33/0041 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： One of factors that increase the contact resistance at the interface between a first semiconductor layer where a channel is formed and source and drain electrode layers is a film with high electric resistance formed by dust or impurity contamination of a surface of a metal material serving as the source and drain electrode layers. As a solution, a first protective layer and a second protective layer including a second semiconductor having a conductivity that is less than or equal to that of the first semiconductor layer is stacked successively over source and drain electrode layers without exposed to air, the stack of films is used for the source and drain electrode layers.

摘要翻译： 增加在形成沟道的第一半导体层与源电极层与漏极电极层之间的界面处的接触电阻的因素之一是具有高电阻的膜，其由作为金属材料的金属材料的表面的灰尘或杂质污染形成 源极和漏极电极层。 作为解决方案，包括导电率小于或等于第一半导体层的导电率的第二半导体的第一保护层和第二保护层在不暴露于空气的情况下在源极和漏极电极层上依次层叠， 膜用于源电极层和漏电极层。

公开(公告)号：US20110057918A1

公开(公告)日：2011-03-10

申请号：US12872861

申请日：2010-08-31

申请人： Hajime Kimura ,  Kengo Akimoto ,  Masashi Tsubuku ,  Toshinari Sasaki

发明人： Hajime Kimura ,  Kengo Akimoto ,  Masashi Tsubuku ,  Toshinari Sasaki

IPC分类号： G09G5/00

CPC分类号： H01L29/78693 ,  G09G3/3648 ,  G09G2300/0842 ,  H01L27/1225 ,  H01L29/78618

摘要： A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

摘要翻译： 一种显示装置，包括具有存储器的像素。 像素至少包括显示元件，电容器，反相器和开关。 开关由保持在电容器中的信号和从逆变器输出的信号控制，使得电压被提供给显示元件。 逆变器和开关可以由具有相同极性的晶体管构成。 可以使用透光材料形成包括在像素中的半导体层。 此外，可以使用透光导电层来形成栅电极，漏电极和电容器电极。 以这种方式使用透光材料形成像素，由此显示装置可以是包括具有存储器的像素的透射显示装置。

公开(公告)号：US08901552B2

公开(公告)日：2014-12-02

申请号：US13226713

申请日：2011-09-07

申请人： Shunpei Yamazaki ,  Yusuke Nonaka ,  Takayuki Inoue ,  Masashi Tsubuku ,  Kengo Akimoto ,  Akiharu Miyanaga

发明人： Shunpei Yamazaki ,  Yusuke Nonaka ,  Takayuki Inoue ,  Masashi Tsubuku ,  Kengo Akimoto ,  Akiharu Miyanaga

IPC分类号： H01L29/12 ,  H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/01 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786

CPC分类号： H01L29/7869 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02565 ,  H01L29/04 ,  H01L29/24 ,  H01L29/78603

摘要： An object is to provide a semiconductor device including an oxide semiconductor film, which has stable electrical characteristics and high reliability. A stack of first and second material films is formed by forming the first material film (a film having a hexagonal crystal structure) having a thickness of 1 nm to 10 nm over an insulating surface and forming the second material film having a hexagonal crystal structure (a crystalline oxide semiconductor film) using the first material film as a nucleus. As the first material film, a material film having a wurtzite crystal structure (e.g., gallium nitride or aluminum nitride) or a material film having a corundum crystal structure (α-Al2O3, α-Ga2O3, In2O3, Ti2O3, V2O3, Cr2O3, or α-Fe2O3) is used.

摘要翻译： 本发明的目的是提供一种具有稳定的电气特性和高可靠性的氧化物半导体膜的半导体装置。 通过在绝缘表面上形成厚度为1nm至10nm的第一材料膜（具有六方晶体结构的膜）形成第一和第二材料膜的叠层，并形成具有六方晶系结构的第二材料膜（ 使用第一材料膜作为核的结晶氧化物半导体膜）。 作为第一材料膜，具有纤锌矿晶体结构的材料膜（例如氮化镓或氮化铝）或具有刚玉晶体结构的材料膜（α-Al 2 O 3，α-Ga 2 O 3，In 2 O 3，Ti 2 O 3，V 2 O 3，Cr 2 O 3，或 α-Fe 2 O 3）。

公开(公告)号：US08890166B2

公开(公告)日：2014-11-18

申请号：US12871184

申请日：2010-08-30

申请人： Masayuki Sakakura ,  Yoshiaki Oikawa ,  Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba

发明人： Masayuki Sakakura ,  Yoshiaki Oikawa ,  Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba

IPC分类号： H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L27/32 ,  H01L27/12

CPC分类号： H01L27/1251 ,  H01L27/1225 ,  H01L27/322 ,  H01L27/3262

摘要： An object of the present invention is to provide a light-emitting device in which plural kinds of circuits are formed over the same substrate, and plural kinds of thin film transistors are provided in accordance with characteristics of the plural kinds of circuits. An inverted-coplanar thin film transistor, an oxide semiconductor layer of which overlaps with a source and drain electrode layers, and a channel-etched thin film transistor are used as a thin film transistor for a pixel and a thin film transistor for a driver circuit, respectively. Between the thin film transistor for a pixel and a light-emitting element, a color filter layer is provided so as to overlap with the light-emitting element which is electrically connected to the thin film transistor for a pixel.

摘要翻译： 本发明的目的是提供一种在同一基板上形成多种电路的发光器件，并且根据多种电路的特性提供多种薄膜晶体管。 作为用于像素的薄膜晶体管和用于驱动电路的薄膜晶体管，使用反向共面薄膜晶体管，其与源极和漏极层重叠的氧化物半导体层和沟道蚀刻薄膜晶体管 ， 分别。 在用于像素的薄膜晶体管和发光元件之间，设置滤色器层，以与与像素的薄膜晶体管电连接的发光元件重叠。

公开(公告)号：US08669556B2

公开(公告)日：2014-03-11

申请号：US13307398

申请日：2011-11-30

申请人： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Hiroki Ohara ,  Tatsuya Honda ,  Takatsugu Omata ,  Yusuke Nonaka ,  Masahiro Takahashi ,  Akiharu Miyanaga

发明人： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Hiroki Ohara ,  Tatsuya Honda ,  Takatsugu Omata ,  Yusuke Nonaka ,  Masahiro Takahashi ,  Akiharu Miyanaga

IPC分类号： H01L29/04

CPC分类号： H01L29/78696 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

摘要： An oxide semiconductor film which has more stable electric conductivity is provided. Further, a semiconductor device which has stable electric characteristics and high reliability is provided by using the oxide semiconductor film. An oxide semiconductor film includes a crystalline region, and the crystalline region includes a crystal in which an a-b plane is substantially parallel with a surface of the film and a c-axis is substantially perpendicular to the surface of the film; the oxide semiconductor film has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like. By using such an oxide semiconductor film for a transistor, a highly reliable semiconductor device having stable electric characteristics can be provided.

摘要翻译： 提供了具有更稳定的导电性的氧化物半导体膜。 此外，通过使用氧化物半导体膜提供具有稳定的电特性和高可靠性的半导体器件。 氧化物半导体膜包括结晶区域，并且结晶区域包括其中a-b平面基本上平行于膜的表面并且c轴基本上垂直于膜的表面的晶体; 氧化物半导体膜具有稳定的导电性，并且相对于可见光，紫外线等的照射而言更加电稳定。 通过使用这种用于晶体管的氧化物半导体膜，可以提供具有稳定电特性的高可靠性半导体器件。

公开(公告)号：US08440502B2

公开(公告)日：2013-05-14

申请号：US13228486

申请日：2011-09-09

申请人： Kengo Akimoto ,  Masashi Tsubuku

发明人： Kengo Akimoto ,  Masashi Tsubuku

IPC分类号： H01L21/84

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/41733

摘要： An object is to suppress deterioration of element characteristics even when an oxide semiconductor is formed after a gate insulating layer, a source electrode layer, and a drain electrode layer are formed. A gate electrode layer is formed over a substrate. A gate insulating layer is formed over the gate electrode layer. A source electrode layer and a drain electrode layer are formed over the gate insulating layer. Surface treatment is performed on surfaces of the gate insulating layer, the source electrode layer, and the drain electrode layer which are formed over the substrate. After the surface treatment is performed, an oxide semiconductor layer is formed over the gate insulating layer, the source electrode layer, and the drain electrode layer.

摘要翻译： 即使在形成了栅极绝缘层，源极电极层和漏极电极层之后形成氧化物半导体，也是要抑制元件特性的劣化。 在基板上形成栅极电极层。 在栅电极层上形成栅极绝缘层。 源极电极层和漏电极层形成在栅绝缘层上。 在形成在基板上的栅极绝缘层，源极电极层和漏极电极层的表面上进行表面处理。 在进行表面处理之后，在栅极绝缘层，源极电极层和漏极电极层上形成氧化物半导体层。

公开(公告)号：US08373443B2

公开(公告)日：2013-02-12

申请号：US13116372

申请日：2011-05-26

申请人： Jun Koyama ,  Kengo Akimoto ,  Masashi Tsubuku

发明人： Jun Koyama ,  Kengo Akimoto ,  Masashi Tsubuku

IPC分类号： H03K19/20 ,  H03K19/094

CPC分类号： H03K19/094 ,  H01L27/0883 ,  H01L27/1225 ,  H03K19/09407 ,  H03K19/09421 ,  H03K19/096

摘要： An object is to apply a transistor using an oxide semiconductor to a logic circuit including an enhancement transistor. The logic circuit includes a depletion transistor 101 and an enhancement transistor 102. The transistors 101 and 102 each include a gate electrode, a gate insulating layer, a first oxide semiconductor layer, a second oxide semiconductor layer, a source electrode, and a drain electrode. The transistor 102 includes a reduction prevention layer provided over a region in the first oxide semiconductor layer between the source electrode and the drain electrode.

公开(公告)号：US07952392B2

公开(公告)日：2011-05-31

申请号：US12605607

申请日：2009-10-26

申请人： Jun Koyama ,  Kengo Akimoto ,  Masashi Tsubuku

发明人： Jun Koyama ,  Kengo Akimoto ,  Masashi Tsubuku

IPC分类号： H03K19/20 ,  H03K19/094

CPC分类号： H03K19/094 ,  H01L27/0883 ,  H01L27/1225 ,  H03K19/09407 ,  H03K19/09421 ,  H03K19/096

摘要： An object is to apply a transistor using an oxide semiconductor to a logic circuit including an enhancement transistor. The logic circuit includes a depletion transistor 101 and an enhancement transistor 102. The transistors 101 and 102 each include a gate electrode, a gate insulating layer, a first oxide semiconductor layer, a second oxide semiconductor layer, a source electrode, and a drain electrode. The transistor 102 includes a reduction prevention layer provided over a region in the first oxide semiconductor layer between the source electrode and the drain electrode.

摘要翻译： 目的是将使用氧化物半导体的晶体管施加到包括增强晶体管的逻辑电路。 逻辑电路包括耗尽晶体管101和增强晶体管102.晶体管101和102各自包括栅电极，栅极绝缘层，第一氧化物半导体层，第二氧化物半导体层，源电极和漏电极 。 晶体管102包括在源电极和漏极之间的第一氧化物半导体层中的区域上设置的还原防止层。

公开(公告)号：US08809115B2

公开(公告)日：2014-08-19

申请号：US13207449

申请日：2011-08-11

申请人： Kengo Akimoto ,  Masashi Tsubuku

发明人： Kengo Akimoto ,  Masashi Tsubuku

IPC分类号： H01L21/00 ,  H01L29/786 ,  H01L21/324 ,  H01L21/447 ,  H01L21/02 ,  H01L27/12

CPC分类号： H01L29/66742 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/324 ,  H01L21/447 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/7869

摘要： To provide a method for manufacturing a thin film transistor in which contact resistance between an oxide semiconductor layer and source and drain electrode layers is small, the surfaces of the source and drain electrode layers are subjected to sputtering treatment with plasma and an oxide semiconductor layer containing In, Ga, and Zn is formed successively over the source and drain electrode layers without exposure of the source and drain electrode layers to air.

摘要翻译： 为了提供一种制造薄膜晶体管的方法，其中氧化物半导体层和源极和漏极电极层之间的接触电阻很小，源极和漏极电极层的表面用等离子体和含有氧化物半导体层的氧化物半导体层进行溅射处理 In，Ga和Zn依次形成在源极和漏极电极层上，而不会将源极和漏极电极层暴露于空气。