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    METHOD FOR RECOVERING POLYOXOANION COMPOUND
    2.
    发明申请
    METHOD FOR RECOVERING POLYOXOANION COMPOUND 审中-公开
    回收多环化合物的方法

    公开(公告)号：US20120237427A1

    公开(公告)日：2012-09-20

    申请号：US13510489

    申请日：2010-11-19

    申请人： Masayoshi Murakami ,  Junichi Nishimoto

    发明人： Masayoshi Murakami ,  Junichi Nishimoto

    IPC分类号： C01B25/16

    CPC分类号： B01J27/188 ,  B01J27/199 ,  C01B25/00 ,  C01B25/45

    摘要： A method for recovering a polyoxoanion compound from an aqueous solution containing the polyoxoanion compound which comprises the following steps: Step (1): a step of mixing an organic solvent capable of forming a complex with the above-mentioned polyoxoanion compound with the above-mentioned aqueous solution followed by separating to a first phase containing the above-mentioned polyoxoanion compound and the above-mentioned organic solvent, and a second phase, Step (2): a step of mixing a hydrophobic organic solvent with the above-mentioned first phase followed by separating to an organic phase containing the above-mentioned organic solvent and the above-mentioned hydrophobic organic solvent, and an aqueous phase containing the above-mentioned polyoxoanion compound.

    摘要翻译： 一种从含有聚氧阴离子化合物的水溶液中回收多氧阴离子化合物的方法，包括以下步骤：步骤（1）：将能与上述多氧阴离子化合物形成络合物的有机溶剂与上述 水溶液，然后分离成包含上述多氧阴离子化合物和上述有机溶剂的第一相和第二相，步骤（2）：将疏水性有机溶剂与上述第一相混合的步骤遵循 通过分离成含有上述有机溶剂和上述疏水性有机溶剂的有机相以及含有上述多氧阴离子化合物的水相。

    Process for production of carbonyl compound
    5.
    发明授权
    Process for production of carbonyl compound 失效
    羰基化合物的制备方法

    公开(公告)号：US08258348B2

    公开(公告)日：2012-09-04

    申请号：US12933074

    申请日：2009-03-18

    申请人： Junichi Nishimoto ,  Masayoshi Murakami

    发明人： Junichi Nishimoto ,  Masayoshi Murakami

    IPC分类号： C07C45/33

    CPC分类号： C07C45/34 ,  B01J23/002 ,  B01J27/188 ,  B01J27/199 ,  B01J2523/00 ,  C07C49/403 ,  B01J2523/51 ,  B01J2523/55 ,  B01J2523/68 ,  B01J2523/824 ,  B01J2523/842

    摘要： A process for producing a carbonyl compound corresponding to an olefin, the process comprising reacting the olefin with molecular oxygen in a water-containing liquid phase comprising a palladium catalyst, a vanadium compound, and a heteropoly acid having a heteropoly anion represented by the Formula: [XaMbM′cOd]n− wherein X is any of elements selected from P, Si, and S; a represents an integer of 1 or 2; M and M′ represent any of elements selected from Mo, W, V, Ta, and Nb; b and c represent an integer of 0 or more; d represents an integer of 1 or more; and n represents an integer of 1 or more.

    摘要翻译： 一种制备对应于烯烃的羰基化合物的方法，该方法包括在包含钯催化剂，钒化合物和具有由下式表示的杂多阴离子的杂多酸的含水液相中使烯烃与分子氧反应： [XaMbM'cOd] n-其中X是选自P，Si和S中的任何一种元素; a表示1或2的整数; M和M'表示选自Mo，W，V，Ta和Nb中的任何一种元素; b和c表示0以上的整数， d表示1以上的整数， n表示1以上的整数。

    PROCESS FOR PRODUCTION OF CARBONYL COMPOUND
    6.
    发明申请
    PROCESS FOR PRODUCTION OF CARBONYL COMPOUND 失效
    生产碳化合物的方法

    公开(公告)号：US20110015444A1

    公开(公告)日：2011-01-20

    申请号：US12933074

    申请日：2009-03-18

    申请人： Junichi Nishimoto ,  Masayoshi Murakami

    发明人： Junichi Nishimoto ,  Masayoshi Murakami

    IPC分类号： C07C45/33

    CPC分类号： C07C45/34 ,  B01J23/002 ,  B01J27/188 ,  B01J27/199 ,  B01J2523/00 ,  C07C49/403 ,  B01J2523/51 ,  B01J2523/55 ,  B01J2523/68 ,  B01J2523/824 ,  B01J2523/842

    摘要： A process for producing a carbonyl compound corresponding to an olefin, the process comprising reacting the olefin with molecular oxygen in a water-containing liquid phase comprising a palladium catalyst, a vanadium compound, and a heteropoly acid having a heteropoly anion represented by the Formula: [XaMbM′cOd]n− wherein X is any of elements selected from P, Si, and S; a represents an integer of 1 or 2; M and M′ represent any of elements selected from Mo, W, V, Ta, and Nb; b and c represent an integer of 0 or more; d represents an integer of 1 or more; and n represents an integer of 1 or more.

    摘要翻译： 一种制备对应于烯烃的羰基化合物的方法，该方法包括在包含钯催化剂，钒化合物和具有由下式表示的杂多阴离子的杂多酸的含水液相中使烯烃与分子氧反应： [XaMbM'cOd] n-其中X是选自P，Si和S中的任何一种元素; a表示1或2的整数; M和M'表示选自Mo，W，V，Ta和Nb中的任何一种元素; b和c表示0以上的整数， d表示1以上的整数， n表示1以上的整数。

    Data processing system and data processor
    7.
    发明授权
    Data processing system and data processor 有权
    数据处理系统和数据处理器

    公开(公告)号：US07975077B2

    公开(公告)日：2011-07-05

    申请号：US12470988

    申请日：2009-05-22

    申请人： Junichi Nishimoto ,  Takuichiro Nakazawa ,  Koji Yamada ,  Toshihiro Hattori

    发明人： Junichi Nishimoto ,  Takuichiro Nakazawa ,  Koji Yamada ,  Toshihiro Hattori

    IPC分类号： G06F13/38

    CPC分类号： G06F1/32 ,  G06F1/325 ,  G06F1/3265 ,  G06F9/4403 ,  G06F9/4416 ,  G06F13/24 ,  G06F13/4022 ,  G06F13/4027 ,  G06F13/4045 ,  G06F13/4068 ,  Y02D10/14 ,  Y02D10/151

    摘要： One data processor is provided with an interface for realizing connection with the other data processor. This interface is provided with a function for connecting the other data processor as a bus master to an internal bus of the one data processor, and the relevant other data processor is capable of directly operating peripheral functions that are memory mapped to the internal bus from an external side via the interface. Accordingly, the data processor can utilize the peripheral functions of the other data processor without interruption of the program being executed. In short, one data processor can use in common the peripheral resources of the other data processor.

    摘要翻译： 一个数据处理器设置有用于实现与其他数据处理器的连接的接口。 该接口具有将作为总线主机的其他数据处理器连接到一个数据处理器的内部总线的功能，并且相关的其他数据处理器能够直接从存储器映射到内部总线的外围功能 外部通过接口。 因此，数据处理器可以利用其他数据处理器的外围功能，而不中断执行的程序。 简而言之，一个数据处理器可以共同使用其他数据处理器的外围资源。

    Data processing system and data processor
    8.
    发明授权
    Data processing system and data processor 有权
    数据处理系统和数据处理器

    公开(公告)号：US07725616B2

    公开(公告)日：2010-05-25

    申请号：US12155412

    申请日：2008-06-04

    申请人： Junichi Nishimoto ,  Takuichiro Nakazawa ,  Koji Yamada ,  Toshihiro Hattori

    发明人： Junichi Nishimoto ,  Takuichiro Nakazawa ,  Koji Yamada ,  Toshihiro Hattori

    IPC分类号： G06F13/38

    CPC分类号： G06F1/32 ,  G06F1/325 ,  G06F1/3265 ,  G06F9/4403 ,  G06F9/4416 ,  G06F13/24 ,  G06F13/4022 ,  G06F13/4027 ,  G06F13/4045 ,  G06F13/4068 ,  Y02D10/14 ,  Y02D10/151

    摘要： One data processor is provided with an interface for realizing connection with the other data processor. This interface is provided with a function for connecting the other data processor as a bus master to an internal bus of the one data processor, and the relevant other data processor is capable of directly operating peripheral functions that are memory mapped to the internal bus from an external side via the interface. Accordingly, the data processor can utilize the peripheral functions of the other data processor without interruption of the program being executed. In short, one data processor can use in common the peripheral resources of the other data processor.

    摘要翻译： 一个数据处理器设置有用于实现与其他数据处理器的连接的接口。 该接口具有将作为总线主机的其他数据处理器连接到一个数据处理器的内部总线的功能，并且相关的其他数据处理器能够直接从存储器映射到内部总线的外围功能 外部通过接口。 因此，数据处理器可以利用其他数据处理器的外围功能，而不中断执行的程序。 简而言之，一个数据处理器可以共同使用其他数据处理器的外围资源。

    Multiple circuit blocks with interblock control and power conservation
    9.
    发明授权
    Multiple circuit blocks with interblock control and power conservation 有权
    具有互阻控制和省电的多电路块

    公开(公告)号：US07479823B2

    公开(公告)日：2009-01-20

    申请号：US11340488

    申请日：2006-01-27

    申请人： Tadashi Hoshi ,  Kenji Hirose ,  Hideaki Abe ,  Junichi Nishimoto ,  Midori Nagayama

    发明人： Tadashi Hoshi ,  Kenji Hirose ,  Hideaki Abe ,  Junichi Nishimoto ,  Midori Nagayama

    IPC分类号： G11C5/14

    CPC分类号： G06F1/3287 ,  G06F1/32 ,  G06F1/3203 ,  H01L2924/0002 ,  Y02D10/171 ,  Y02D50/20 ,  H01L2924/00

    摘要： A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.

    摘要翻译： 提供一种半导体集成电路，其包括多个电路块，并且适于切断对任何一个电路块的电源电压的供应。 集成电路包括设置在选通的电路块和信号路径分支到不同分支路径的分支点之间的信号路径上的块间接口电路，以便连接到其他电路块。 所述帧间接口电路包括用于防止从所选择的电路块到其他电路块的信号传输的信号门，并且包括用于在电源切断之前存储信号的存储单元。

    BUS SYSTEM AND SEMICONDUCTOR INTEGRATED CIRCUIT
    10.
    发明申请
    BUS SYSTEM AND SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
    总线系统和半导体集成电路

    公开(公告)号：US20070255872A1

    公开(公告)日：2007-11-01

    申请号：US11780031

    申请日：2007-07-19

    申请人： Yasuhiro TAWARA ,  Junichi Nishimoto

    发明人： Yasuhiro TAWARA ,  Junichi Nishimoto

    IPC分类号： G06F13/00

    CPC分类号： G06F13/404

    摘要： A technology for allowing easy handling of a change in the address range of the subject of access or any of bus masters is provided. There is provided an address monitor unit including a table which is shared among a plurality of bus masters and stores therein access right information that has been preset in correspondence to the subject of access and to address information corresponding thereto and capable of determining, by referencing the table, the presence or absence of an access right for each of the bus masters based on the subject-of-access information of each of the bus masters and on address information outputted from the bus master. Since the table is shared among the plurality of bus masters, when the address range of the subject of access or any of the bus masters is changed, the table may be rewritten appropriately. This allows, when a plurality of bus masters are connected to a common bus, easy handling of a change in the address range of the subject of access or any of the bus masters.

    摘要翻译： 提供了一种允许容易地处理访问主体的地址范围或任何总线主机的改变的技术。 提供了一种地址监视器单元，包括在多个总线主机之间共享的表，其中存储对应于访问对象预先设置的访问权限信息和与其对应的地址信息，并且能够通过参考 基于每个总线主机的访问主体信息以及从总线主机输出的地址信息，每个总线主机的访问权限的存在或不存在。 由于在多个总线主机之间共享表，当访问对象的地址范围或任何总线主机的地址范围改变时，可以适当地重写表。 这允许当多个总线主机连接到公共总线时，容易地处理访问对象的地址范围的变化或任何总线主控器。