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    RECORDING/REPRODUCTION APPARATUS
    1.
    发明申请
    RECORDING/REPRODUCTION APPARATUS 审中-公开
    记录/复制装置

    公开(公告)号：US20090109810A1

    公开(公告)日：2009-04-30

    申请号：US12203418

    申请日：2008-09-03

    申请人： Masayuki Fukuyama ,  Eiji Miyagoshi ,  Akihiro Watabe ,  Akihiko Otani ,  Noboru Mizuguchi ,  Yuichiro Aihara

    发明人： Masayuki Fukuyama ,  Eiji Miyagoshi ,  Akihiro Watabe ,  Akihiko Otani ,  Noboru Mizuguchi ,  Yuichiro Aihara

    IPC分类号： G11B7/00

    CPC分类号： G11B20/10527 ,  G11B2020/10537 ,  G11B2020/10759 ,  G11B2020/10768 ,  G11B2020/10944 ,  G11B2020/10972 ,  G11B2220/2516 ,  G11B2220/61 ,  G11B2220/65

    摘要： A recording/reproduction apparatus includes a first recording medium (a flash memory) having a first time that is required for the first recording medium to go from a low-power consumption state to a state in which recorded video data can be read out, and a second recording medium (an HDD or a DVD drive) having a second time that is required for the second recording medium to go from a low-power consumption state to a state in which recorded video data can be read out, where the second time is longer than the first time. When a video content is reproduced from the second recording medium in the low-power consumption state, the first recording medium is caused to go to a readable state while the second recording medium is not in a readable state, and a leading portion of the content is reproduced from the first recording medium. Thereby, a start-up time of the second recording medium that is required until reproduction is permitted is concealed from the user, and the user's reproduction request is immediately responded.

    摘要翻译： 记录/再现装置包括：第一记录介质（闪速存储器），其具有第一记录介质从低功耗状态到能够读出记录的视频数据的状态所需的第一记录介质;以及 第二记录介质（HDD或DVD驱动器），其具有第二记录介质从低功耗状态所需的第二时间到可以读出记录的视频数据的状态，其中第二次 比第一次更长。 当在低功耗状态下从第二记录介质再现视频内容时，使第一记录介质变为可读状态，而第二记录介质不是可读状态，并且内容的前导部分 从第一记录介质再现。 因此，从用户隐藏直到再现被允许的第二记录介质的启动时间，并且立即响应用户的再现请求。

    Code conversion method and device thereof
    3.
    发明申请
    Code conversion method and device thereof 有权
    代码转换方法及其装置

    公开(公告)号：US20060153290A1

    公开(公告)日：2006-07-13

    申请号：US10541221

    申请日：2004-02-02

    申请人： Akihiro Watabe ,  Noboru Mizuguchi ,  Eiji Miyagoshi ,  Takayuki Morishige

    发明人： Akihiro Watabe ,  Noboru Mizuguchi ,  Eiji Miyagoshi ,  Takayuki Morishige

    IPC分类号： H04N11/04 ,  H04N11/02 ,  H04N7/12 ,  H04B1/66

    CPC分类号： H04N21/23406 ,  H04N21/44004

    摘要： In order to cope with format conversion of user data, the bit rate value and VBV (Video Buffering Verifier) buffer size value in a sequence header of an input code and the VBV delay value in a picture header of the input code are modified to obtain an intermediate code (305 to 309), and additional information (300) is generated for distinguishing GOP (Group of Pictures) user data (307) from the other main data. A VBV buffer simulation is performed using this additional information (300) to multiplex the GOP user data in a picture user data region to a data amount such that the operation does not fail, whereby an output code is generated.

    摘要翻译： 为了应对用户数据的格式转换，对输入代码的序列标题中的比特率值和VBV（视频缓冲验证器）缓冲器大小值以及输入代码的图像头中的VBV延迟值进行修改以获得 生成中间代码（305〜309）和附加信息（300），用于区分GOP（图片组）用户数据（307）与其他主数据。 使用该附加信息（300）执行VBV缓冲器模拟，以将图像用户数据区域中的GOP用户数据复用到数据量，使得该操作不失败，由此产生输出代码。

    Code conversion method and device thereof
    4.
    发明授权
    Code conversion method and device thereof 有权
    代码转换方法及其装置

    公开(公告)号：US07940799B2

    公开(公告)日：2011-05-10

    申请号：US10541221

    申请日：2004-02-02

    申请人： Akihiro Watabe ,  Noboru Mizuguchi ,  Eiji Miyagoshi ,  Takayuki Morishige

    发明人： Akihiro Watabe ,  Noboru Mizuguchi ,  Eiji Miyagoshi ,  Takayuki Morishige

    IPC分类号： H04J3/24

    CPC分类号： H04N21/23406 ,  H04N21/44004

    摘要： In order to cope with format conversion of user data, the bit rate value and VBV (Video Buffering Verifier) buffer size value in a sequence header of an input code and the VBV delay value in a picture header of the input code are modified to obtain an intermediate code (305 to 309), and additional information (300) is generated for distinguishing GOP (Group of Pictures) user data (307) from the other main data. A VBV buffer simulation is performed using this additional information (300) to multiplex the GOP user data in a picture user data region to a data amount such that the operation does not fail, whereby an output code is generated.

    摘要翻译： 为了应对用户数据的格式转换，对输入代码的序列标题中的比特率值和VBV（视频缓冲验证器）缓冲器大小值以及输入代码的图像头中的VBV延迟值进行修改以获得 生成中间代码（305〜309）和附加信息（300），用于区分GOP（图片组）用户数据（307）与其他主数据。 使用该附加信息（300）执行VBV缓冲器模拟，以将图像用户数据区域中的GOP用户数据复用到数据量，使得该操作不失败，由此产生输出代码。

    Video encoding apparatus and method
    5.
    发明授权
    Video encoding apparatus and method 失效
    视频编码装置及方法

    公开(公告)号：US6137838A

    公开(公告)日：2000-10-24

    申请号：US7069

    申请日：1998-01-14

    申请人： Eiji Miyagoshi ,  Akihiro Watabe

    发明人： Eiji Miyagoshi ,  Akihiro Watabe

    IPC分类号： H04N7/26 ,  H04N7/50

    CPC分类号： H04N19/423 ,  H04N19/124 ,  H04N19/152 ,  H04N19/176 ,  H04N19/61 ,  H04N19/91 ,  H04N19/149 ,  H04N19/15

    摘要： The present invention provides a video encoding apparatus including a video processor for performing video processing on input video data, a variable length encoder for performing variable length encoding on the processed (quantized) video data and for supplying the encoded data and a generated bit quantity, a DRAM for storing the encoded data that is output as a bitstream, a bitstream output circuit for computing, based on a value found by subtracting the generated bit quantity from a set bit quantity predetermined in advance, a period taken to read from the DRAM the bitstream and for outputting the bitstream as output video data in the computed period, and an arbiter for controlling the operations of the video processor, the variable length encoder, the DRAM, and the bitstream output circuit.

    摘要翻译： 本发明提供一种包括用于对输入视频数据执行视频处理的视频处理器的视频编码装置，用于对经处理的（量化的）视频数据执行可变长度编码并提供编码数据和生成的比特量的可变长度编码器， 用于存储作为比特流输出的编码数据的DRAM，用于基于从预先预定的设定比特量中减去所生成的比特量而得到的值，计算从DRAM读取的周期的比特流输出电路 并且用于在计算的周期中输出比特流作为输出视频数据，以及用于控制视频处理器，可变长度编码器，DRAM和比特流输出电路的操作的仲裁器。

    Variable-length encoder
    7.
    发明授权
    Variable-length encoder 失效
    可变长度编码器

    公开(公告)号：US06741651B1

    公开(公告)日：2004-05-25

    申请号：US09600573

    申请日：2000-07-19

    申请人： Akihiro Watabe ,  Eiji Miyagoshi

    发明人： Akihiro Watabe ,  Eiji Miyagoshi

    IPC分类号： H04N712

    CPC分类号： H03M7/40 ,  H04N19/13 ,  H04N19/132 ,  H04N19/15 ,  H04N19/577 ,  H04N19/587 ,  H04N19/61 ,  H04N19/91

    摘要： A variable length encoding apparatus such as an encoding apparatus using the MPEG standard, wherein without degrading the precision of quantization step, the generated code bit amount is limited. Encoding is performed at the quantization step of required picture quality by an encoding part 106, and a bit stream 141 is written in an external memory 101. The generated encoded bit amount is measured from the increment of a write pointer 121 increased because of the writing in the external memory 101 by a control unit 107. If the amount is larger than a preset value, the data is replaced with data leading to the same decoding result as those of the preceding or following reference picture by using a replacement pattern in accordance with the picture type and the position on a times series, and the data is written in the external memory 101, thus outputting the data as an output bit stream 111 controlled to the generated code amount within an upper limit value.

    摘要翻译： 诸如使用MPEG标准的编码装置的可变长度编码装置，其中在不降低量化步长的精度的情况下，限制了所生成的码位数量。 通过编码部分106在所需图像质量的量化步骤进行编码，并且将比特流141写入外部存储器101.所生成的编码比特量由写入指针121的增量而被增加，因为写入 通过控制单元107在外部存储器101中。如果该量大于预设值，则数据被替换为导致与先前或后续参考图片相同的解码结果的数据，通过使用根据 图像类型和时间序列上的位置，并且将数据写入外部存储器101，从而将控制为生成代码量的输出比特流111作为上限值输出。

    Image information decoder with a reduced capacity frame memory
    8.
    发明授权
    Image information decoder with a reduced capacity frame memory 失效
    具有减少容量帧存储器的图像信息解码器

    公开(公告)号：US6064803A

    公开(公告)日：2000-05-16

    申请号：US609020

    申请日：1996-02-29

    申请人： Akihiro Watabe ,  Eiji Miyagoshi ,  Yoshiyuki Goi ,  William Brent Wilson

    发明人： Akihiro Watabe ,  Eiji Miyagoshi ,  Yoshiyuki Goi ,  William Brent Wilson

    IPC分类号： G06T9/00 ,  G06F15/00 ,  G06K9/36

    CPC分类号： G06T9/007

    摘要： The present invention discloses an MPEG decoder for reproducing moving picture data. A first frame memory (FM0) and a second frame memory (FM1), each of which is composed of 2N slots, are provided. A third frame memory (FM2) is provided which is composed of N+4 slots. Each slot is provided with a memory capacity of eight lines. FM0 and FM1 each have a 1-frame memory capacity for storing reference frames for motion compensation. FM2, on the other hand, has a memory capacity of half a frame+32 lines for B-PICTURE interlace conversion. A slot control memory (SM) is further provided which is composed of 2N+6 words each of which stores a respective slot number of FM2. For an output section to read the slots of FM2 in the correct order, the contents of SM are updated by an control section at the time of the writing of FM2 by a decoding section.

    摘要翻译： 本发明公开了一种用于再现运动图像数据的MPEG解码器。 提供由2N个时隙构成的第一帧存储器（FM0）和第二帧存储器（FM1）。 提供由N + 4个时隙组成的第三帧存储器（FM2）。 每个插槽提供八行的存储容量。 FM0和FM1每个都具有1帧存储器容量，用于存储用于运动补偿的参考帧。 另一方面，FM2对于B-PICTURE隔行转换具有半帧+ 32行的存储容量。 还提供了一个时隙控制存储器（SM），其由2N + 6个字组成，每个字存储FM2的相应时隙号。 对于以正确的顺序读取FM2的时隙的输出部分，在由解码部分写入FM2时，由控制部分更新SM的内容。

    Method and device for ensuring storage time for digital broadcast
    9.
    发明授权
    Method and device for ensuring storage time for digital broadcast 失效
    确保数字广播存储时间的方法和设备

    公开(公告)号：US07359615B2

    公开(公告)日：2008-04-15

    申请号：US10692804

    申请日：2003-10-27

    申请人： Eiji Miyagoshi ,  Akihiro Watabe

    发明人： Eiji Miyagoshi ,  Akihiro Watabe

    IPC分类号： H04N5/91 ,  H04N5/00 ,  H04N9/74 ,  H04N7/173 ,  H04B1/38 ,  G06K9/36

    CPC分类号： H04N21/4424 ,  G11B20/00007 ,  G11B20/10 ,  G11B27/034 ,  G11B27/36 ,  G11B2020/00079 ,  G11B2220/216 ,  G11B2220/218 ,  G11B2220/2541 ,  G11B2220/2562 ,  G11B2220/2575 ,  H04N5/4401 ,  H04N5/76 ,  H04N5/781 ,  H04N5/85 ,  H04N9/8042 ,  H04N19/132 ,  H04N19/146 ,  H04N19/15 ,  H04N19/46 ,  H04N19/587 ,  H04N19/59 ,  H04N19/61 ,  H04N21/234363

    摘要： When a digitized broadcast is recorded in a storage medium, a required capacity of the storage medium is firstly calculated on the basis of a bit-rate of digitized broadcast data and a recording time which is known in advance. If the remaining capacity of the storage medium is smaller than the required capacity of the storage medium, for example, a frame rate decimation and pixel reduction are performed upon a broadcast to be newly stored, a re-encoding processing is performed for the broadcast and then the resultant broadcast is stored in the storage medium. If the remaining storage capacity of the storage medium is larger than the required capacity of the storage medium and thus remains, a frame interpolation and pixel interpolation are performed for the broadcast to be stored and then a re-encoding processing is performed for the resultant broadcast in order to improve its image quality. As a result, recording of the broadcast data in the storage medium can be ensured.

    摘要翻译： 当数字广播被记录在存储介质中时，首先根据预先已知的数字化广播数据的比特率和记录时间来计算存储介质的所需容量。 如果存储介质的剩余容量小于存储介质的所需容量，例如，在新存储的广播上执行帧速率抽取和像素减少，则对广播执行重新编码处理，并且 则所得到的广播被存储在存储介质中。 如果存储介质的剩余存储容量大于存储介质的所需容量并因此保留，则对要存储的广播执行帧内插和像素插值，然后对所得到的广播进行重新编码处理 以提高其图像质量。 结果，可以确保在存储介质中记录广播数据。

    Image processor
    10.
    发明授权
    Image processor 失效
    图像处理器

    公开(公告)号：US06356317B1

    公开(公告)日：2002-03-12

    申请号：US08911919

    申请日：1997-08-15

    申请人： Akihiro Watabe ,  Eiji Miyagoshi

    发明人： Akihiro Watabe ,  Eiji Miyagoshi

    IPC分类号： H04N964

    CPC分类号： H04N19/427 ,  H04N19/423 ,  H04N19/61

    摘要： A frame memory is provided which has five fields each having N slots, and three additional slots. Each slot has a storage capacity to store eight image lines. Four fields of the five fields serve to store motion compensation reference frames. The remaining one field and the three additional slots are used for B-picture interlace conversion. Disposed in a control unit are a slot control memory, a write slot pointer, and a read slot pointer. For an image output unit to acquire information from the frame memory in a correct slot order, the contents of the slot control memory are updated at the time of performing write operation to enter information into the frame memory by a bit stream analysis unit.

    摘要翻译： 提供了一个帧存储器，其具有五个场，每个场具有N个时隙，以及三个附加时隙。 每个插槽具有存储8个图像行的存储容量。 五个场中的四个场用于存储运动补偿参考帧。 剩余的一个场和三个附加时隙用于B图像交错转换。 设置在控制单元中的是时隙控制存储器，写槽指针和读槽指针。 对于图像输出单元，以正确的时隙顺序从帧存储器获取信息，在执行写入操作时更新时隙控制存储器的内容，以便通过比特流分析单元将信息输入到帧存储器中。