公开(公告)号：US20050003619A1

公开(公告)日：2005-01-06

申请号：US10717719

申请日：2003-11-21

申请人： Masayuki Tanaka ,  Atsuhiro Sato ,  Hiroki Yamashita ,  Ichiro Mizushima ,  Yoshio Ozawa

发明人： Masayuki Tanaka ,  Atsuhiro Sato ,  Hiroki Yamashita ,  Ichiro Mizushima ,  Yoshio Ozawa

IPC分类号： H01L21/8247 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L27/11524

摘要： A semiconductor memory encompasses a memory cell matrix, which embraces device isolation films running along the column-direction, arranged alternatively between the cell columns; first conductive layers having top surfaces lower than the device isolation films; inter-electrode dielectrics arranged on the corresponding first conductive layers, the inter-electrode dielectric has a dielectric constant larger than that of silicon oxide; and second conductive layers running along the row-direction, each of the second conductive layers arranged on the inter-electrode dielectric and the device isolation films so that the second conductive layer can be shared by the memory cell transistors arranged along the row-direction belonging to different cell columns.

摘要翻译： 半导体存储器包括存储单元矩阵，其包括沿列方向延伸的器件隔离膜，交替地布置在单元列之间; 第一导电层的顶表面低于器件隔离膜; 布置在相应的第一导电层上的电极间电介质，所述电极间电介质的介电常数大于氧化硅的介电常数; 和沿着行方向延伸的第二导电层，每个第二导电层布置在电极间电介质和器件隔离膜上，使得第二导电层可以被沿着行方向归属布置的存储单元晶体管共享 到不同的细胞柱。

公开(公告)号：US06927139B2

公开(公告)日：2005-08-09

申请号：US10717719

申请日：2003-11-21

申请人： Masayuki Tanaka ,  Atsuhiro Sato ,  Hiroki Yamashita ,  Ichiro Mizushima ,  Yoshio Ozawa

发明人： Masayuki Tanaka ,  Atsuhiro Sato ,  Hiroki Yamashita ,  Ichiro Mizushima ,  Yoshio Ozawa

IPC分类号： H01L21/8247 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L27/11524

摘要： A semiconductor memory encompasses a memory cell matrix, which embraces device isolation films running along the column-direction, arranged alternatively between the cell columns; first conductive layers having top surfaces lower than the device isolation films; inter-electrode dielectrics arranged on the corresponding first conductive layers, the inter-electrode dielectric has a dielectric constant larger than that of silicon oxide; and second conductive layers running along the row-direction, each of the second conductive layers arranged on the inter-electrode dielectric and the device isolation films so that the second conductive layer can be shared by the memory cell transistors arranged along the row-direction belonging to different cell columns.

公开(公告)号：US07521263B2

公开(公告)日：2009-04-21

申请号：US11270536

申请日：2005-11-10

申请人： Ichiro Mizushima ,  Masayuki Tanaka ,  Katsuaki Natori ,  Yoshio Ozawa ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Tetsuya Kai

发明人： Ichiro Mizushima ,  Masayuki Tanaka ,  Katsuaki Natori ,  Yoshio Ozawa ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Tetsuya Kai

IPC分类号： H01L21/00

CPC分类号： H01L21/02236 ,  H01L21/022 ,  H01L21/28273 ,  H01L21/3142 ,  H01L21/31616 ,  H01L21/31645 ,  H01L29/513 ,  H01L29/7881

摘要： A method of forming an insulating film includes forming a base film comprising a material whose surface is oxidized by being exposed to an oxidant. A source gas containing a metal material and a first oxidant having a first oxidation force are alternately supplied to form a first insulating film on the base film. A source gas containing a metal material and a second oxidant having a second oxidation force stronger than the first oxidation force are alternately supplied to form a second insulating film on the first insulating film.

摘要翻译： 形成绝缘膜的方法包括形成包括通过暴露于氧化剂而使其表面被氧化的材料的基膜。 交替地供给含有金属材料的源气体和具有第一氧化力的第一氧化剂，以在基膜上形成第一绝缘膜。 交替地供给含有金属材料的源气体和具有比第一氧化力更强的第二氧化力的第二氧化剂，以在第一绝缘膜上形成第二绝缘膜。

公开(公告)号：US20070020957A1

公开(公告)日：2007-01-25

申请号：US11270536

申请日：2005-11-10

申请人： Ichiro Mizushima ,  Masayuki Tanaka ,  Katsuaki Natori ,  Yoshio Ozawa ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Tetsuya Kai

发明人： Ichiro Mizushima ,  Masayuki Tanaka ,  Katsuaki Natori ,  Yoshio Ozawa ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Tetsuya Kai

IPC分类号： B05D3/08 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L21/02236 ,  H01L21/022 ,  H01L21/28273 ,  H01L21/3142 ,  H01L21/31616 ,  H01L21/31645 ,  H01L29/513 ,  H01L29/7881

摘要： A method of forming an insulating film includes forming a base film comprising a material whose surface is oxidized by being exposed to an oxidant. A source gas containing a metal material and a first oxidant having a first oxidation force are alternately supplied to form a first insulating film on the base film. A source gas containing a metal material and a second oxidant having a second oxidation force stronger than the first oxidation force are alternately supplied to form a second insulating film on the first insulating film.

摘要翻译： 形成绝缘膜的方法包括形成包括通过暴露于氧化剂而使其表面被氧化的材料的基膜。 交替地供给含有金属材料的源气体和具有第一氧化力的第一氧化剂，以在基膜上形成第一绝缘膜。 交替地供给含有金属材料的源气体和具有比第一氧化力更强的第二氧化力的第二氧化剂，以在第一绝缘膜上形成第二绝缘膜。

公开(公告)号：US08455346B2

公开(公告)日：2013-06-04

申请号：US13075658

申请日：2011-03-30

申请人： Yasuhiro Nojiri ,  Hiroyuki Fukumizu ,  Shinichi Nakao ,  Kei Watanabe ,  Kazuhiko Yamamoto ,  Ichiro Mizushima ,  Yoshio Ozawa

发明人： Yasuhiro Nojiri ,  Hiroyuki Fukumizu ,  Shinichi Nakao ,  Kei Watanabe ,  Kazuhiko Yamamoto ,  Ichiro Mizushima ,  Yoshio Ozawa

IPC分类号： H01L21/4763 ,  G11C11/00

CPC分类号： H01L51/0591 ,  B82Y10/00 ,  B82Y40/00 ,  G11C13/0002 ,  G11C13/025 ,  G11C2213/71 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/149 ,  H01L45/1608

摘要： According to one embodiment, a method is disclosed for manufacturing a nonvolatile memory device. The nonvolatile memory device includes a memory cell connected to a first interconnect and a second interconnect. The method can include forming a first electrode film on the first interconnect. The method can include forming a layer including a plurality of carbon nanotubes dispersed inside an insulator on the first electrode film. At least one carbon nanotube of the plurality of carbon nanotubes is exposed from a surface of the insulator. The method can include forming a second electrode film on the layer. In addition, the method can include forming a second interconnect on the second electrode film.

摘要翻译： 根据一个实施例，公开了一种用于制造非易失性存储器件的方法。 非易失性存储器件包括连接到第一互连和第二互连的存储单元。 该方法可以包括在第一互连上形成第一电极膜。 该方法可以包括在第一电极膜上形成分散在绝缘体内的多个碳纳米管的层。 多个碳纳米管中的至少一个碳纳米管从绝缘体的表面露出。 该方法可以包括在该层上形成第二电极膜。 此外，该方法可以包括在第二电极膜上形成第二互连。

公开(公告)号：US20110108905A1

公开(公告)日：2011-05-12

申请号：US13007258

申请日：2011-01-14

申请人： Masayuki ICHIGE ,  Fumitaka Arai ,  Riichiro Shirota ,  Toshitake Yaegashi ,  Yoshio Ozawa ,  Akihito Yamamoto ,  Ichiro Mizushima ,  Yoshihiko Saito

发明人： Masayuki ICHIGE ,  Fumitaka Arai ,  Riichiro Shirota ,  Toshitake Yaegashi ,  Yoshio Ozawa ,  Akihito Yamamoto ,  Ichiro Mizushima ,  Yoshihiko Saito

IPC分类号： H01L29/788

CPC分类号： H01L29/42336 ,  H01L21/28273 ,  H01L27/0207 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.

摘要翻译： 非易失性半导体存储器包括具有浮动栅极和控制栅极的第一和第二存储单元。 第一和第二存储单元的浮动栅极包括第一部分和布置在第一部分上的第二部分，并且第二部分在控制栅极的延伸方向上的宽度比第一部分的宽度窄。 第一和第二存储单元的第一部分之间的第一空间填充有一种绝缘体。 控制栅极被布置在第一和第二存储单元的第二部分之间的第二空间处。

公开(公告)号：US20090004833A1

公开(公告)日：2009-01-01

申请号：US12146802

申请日：2008-06-26

申请人： Takashi Suzuki ,  Hirokazu Ishida ,  Ichiro Mizushima ,  Yoshio Ozawa ,  Fumiki Aiso ,  Katsuyuki Sekine ,  Takashi Nakao ,  Yoshihiko Saito

发明人： Takashi Suzuki ,  Hirokazu Ishida ,  Ichiro Mizushima ,  Yoshio Ozawa ,  Fumiki Aiso ,  Katsuyuki Sekine ,  Takashi Nakao ,  Yoshihiko Saito

IPC分类号： H01L21/20

CPC分类号： H01L27/115 ,  H01L21/76264 ,  H01L21/84 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/1203 ,  H01L29/66825

摘要： A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.

摘要翻译： 一种制造半导体存储装置的方法包括在形成在硅衬底上的绝缘膜中的多个位置提供开口部分，然后在其中形成开口部分的绝缘膜上形成非晶硅膜，并且在 开口部。 然后，形成沟槽，将相邻的开口部之间的中点附近的非晶硅膜分割成一个开口部侧的一部分和另一个开口部侧的一部分。 接着，对其中形成沟槽的非晶硅膜进行退火并进行固相结晶以形成具有用作晶种的开口部分的单晶，从而形成硅单晶层。 然后，在硅单晶层上形成存储单元阵列。

公开(公告)号：US20080012061A1

公开(公告)日：2008-01-17

申请号：US11687758

申请日：2007-03-19

申请人： Masayuki Ichige ,  Fumitaka Arai ,  Riichiro Shirota ,  Toshitake Yaegashi ,  Yoshio Ozawa ,  Akihito Yamamoto ,  Ichiro Mizushima ,  Yoshihiko Saito

发明人： Masayuki Ichige ,  Fumitaka Arai ,  Riichiro Shirota ,  Toshitake Yaegashi ,  Yoshio Ozawa ,  Akihito Yamamoto ,  Ichiro Mizushima ,  Yoshihiko Saito

IPC分类号： H01L29/788

CPC分类号： H01L29/42336 ,  H01L21/28273 ,  H01L27/0207 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.

摘要翻译： 非易失性半导体存储器包括具有浮动栅极和控制栅极的第一和第二存储单元。 第一和第二存储单元的浮置栅极包括第一部分和布置在第一部分上的第二部分，并且第二部分在控制栅极的延伸方向上的宽度比第一部分的宽度窄。 第一和第二存储单元的第一部分之间的第一空间填充有一种绝缘体。 控制栅极被布置在第一和第二存储单元的第二部分之间的第二空间处。

公开(公告)号：US20070254434A1

公开(公告)日：2007-11-01

申请号：US11819428

申请日：2007-06-27

申请人： Ichiro Mizushima ,  Yoshio Ozawa

发明人： Ichiro Mizushima ,  Yoshio Ozawa

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  G11C16/0483 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/66825 ,  H01L29/7881

摘要： A semiconductor device includes a semiconductor substrate including an active area (AA) surrounded by an isolation insulating film, and a nonvolatile memory cell on the AA, the nonvolatile memory cell including a tunnel insulating film on the AA, a FG electrode on the tunnel insulating film, a CG electrode above the FG electrode, and an interelectrode insulating film between the FG electrode and the CG electrode, relating to a cross section in a channel width direction of the nonvolatile memory cell, dimension in the channel width direction of a top surface of the AA is shorter than dimension in the channel width direction of a bottom surface of the tunnel insulating film, and an area of a portion opposing the AA of the tunnel insulating film is smaller than an area of a portion opposing a top surface of the FG electrode of the interelectrode insulating film.

摘要翻译： 一种半导体器件包括：半导体衬底，包括由隔离绝缘膜包围的有源区（AA）和在AA上的非易失性存储单元，非易失性存储单元包括AA上的隧道绝缘膜，隧道绝缘上的FG电极 薄膜，FG电极上方的CG电极以及FG电极和CG电极之间的电极间绝缘膜，涉及非易失性存储单元的沟道宽度方向上的横截面，顶表面的沟道宽度方向上的尺寸 的距离短于隧道绝缘膜的底面的沟道宽度方向上的尺寸，并且与隧道绝缘膜的AA相对的部分的面积小于与隧道绝缘膜的顶面相对的部分的面积 电极间绝缘膜的FG电极。

公开(公告)号：US20120119179A1

公开(公告)日：2012-05-17

申请号：US13354380

申请日：2012-01-20

申请人： Shinichi Nakao ,  Kei Watanabe ,  Kazuhiko Yamamoto ,  Ichiro Mizushima ,  Yoshio Ozawa

发明人： Shinichi Nakao ,  Kei Watanabe ,  Kazuhiko Yamamoto ,  Ichiro Mizushima ,  Yoshio Ozawa

IPC分类号： H01L47/00 ,  H01L21/02 ,  B82Y99/00 ,  B82Y40/00

CPC分类号： B82Y10/00 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/149 ,  H01L45/1608

摘要： According to one embodiment, a memory device includes a nanomaterial aggregate layer of a plurality of fine conductors aggregating via gaps and an insulating material disposed in the gaps.

摘要翻译： 根据一个实施例，存储器件包括通过间隙聚集的多个细小导体的纳米材料聚集体层和设置在间隙中的绝缘材料。