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公开(公告)号：US11227846B2
公开(公告)日：2022-01-18
申请号：US16742850
申请日：2020-01-14
Applicant: MEDIATEK INC.
Inventor： Chia-Hao Hsu , Tai-Yu Chen , Shiann-Tsong Tsai , Hsing-Chih Liu , Yao-Pang Hsu , Chi-Yuan Chen , Chung-Fa Lee
IPC: H01L27/14 , H01L23/66 , H01L23/367 , H01L23/373 , H01L23/498 , H01L23/00 , H01Q1/02 , H01Q1/22
Abstract: A semiconductor package includes a base having an upper surface and a lower surface opposite to the upper surface. An antenna array structure is embedded at the upper surface of the base. An IC die is mounted on the lower surface of the base in a flip-chip manner so that a backside of the IC die is available for heat dissipation. Solder ball pads are disposed on the lower surface of the base and arranged around the IC die. The semiconductor package further includes a metal thermal interface layer having a backside metal layer that is in direct contact with the backside of the IC die, and a solder paste conformally printed on the backside metal layer.
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2.发明申请公开(公告)号：US20200243462A1
公开(公告)日：2020-07-30
申请号：US16742850
申请日：2020-01-14
Applicant: MEDIATEK INC.
Inventor： Chia-Hao Hsu , Tai-Yu Chen , Shiann-Tsong Tsai , Hsing-Chih Liu , Yao-Pang Hsu , Chi-Yuan Chen , Chung-Fa Lee
IPC: H01L23/66 , H01L23/367 , H01L23/373 , H01L23/498 , H01L23/00 , H01Q1/22 , H01Q1/02
Abstract: A semiconductor package includes a base having an upper surface and a lower surface opposite to the upper surface. An antenna array structure is embedded at the upper surface of the base. An IC die is mounted on the lower surface of the base in a flip-chip manner so that a backside of the IC die is available for heat dissipation. Solder ball pads are disposed on the lower surface of the base and arranged around the IC die. The semiconductor package further includes a metal thermal interface layer having a backside metal layer that is in direct contact with the backside of the IC die, and a solder paste conformally printed on the backside metal layer.
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公开(公告)号：US20210217707A1
公开(公告)日：2021-07-15
申请号：US17111456
申请日：2020-12-03
Applicant: MEDIATEK INC.
Inventor： Yi-Lin Tsai , Shih-Chao Chiu , Wen-Sung Hsu , Sang-Mao Chiu , Chi-Yuan Chen , Yao-Pang Hsu
IPC: H01L23/00 , H01L23/498
Abstract: A semiconductor package includes a substrate component having a first surface, a second surface opposite to the first surface, and a sidewall surface extending between the first surface and the second surface; a re-distribution layer (RDL) structure disposed on the first surface and electrically connected to the first surface through first connecting elements comprising solder bumps or balls; a plurality of ball grid array (BGA) balls mounted on the second surface of the substrate component; and at least one integrated circuit die mounted on the RDL structure through second connecting elements.
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公开(公告)号：US20240429113A1
公开(公告)日：2024-12-26
申请号：US18822254
申请日：2024-09-01
Applicant: MEDIATEK INC.
Inventor： Shih-Chao Chiu , Chi-Yuan Chen , Wen-Sung Hsu , Ya-Jui Hsieh , Yao-Pang Hsu , Wen-Chun Huang
Abstract: A semiconductor package includes a substrate having a top surface and a bottom surface; a semiconductor die mounted on the top surface of the substrate; and a two-part lid mounted on a perimeter of the top surface of the substrate and housing the semiconductor die. The lid comprises an annular lid base and a cover plate removably installed on the annular lid base. The semiconductor package can be uncovered by removing the cover plate and a forced cooling module can be installed in place of the cover plate.
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公开(公告)号：US20220102297A1
公开(公告)日：2022-03-31
申请号：US17549901
申请日：2021-12-14
Applicant: MEDIATEK INC.
Inventor： Chia-Hao Hsu , Tai-Yu Chen , Shiann-Tsong Tsai , Hsing-Chih Liu , Yao-Pang Hsu , Chi-Yuan Chen , Chung-Fa Lee
IPC: H01L23/66 , H01L23/367 , H01L23/373 , H01L23/498 , H01L23/00 , H01Q1/02 , H01Q1/22
Abstract: A semiconductor package including a base comprising an upper surface and a lower surface that is opposite to the upper surface; a radio-frequency (RF) module embedded near the upper surface of the base; an integrated circuit (IC) die mounted on the lower surface of the base in a flip-chip manner so that a backside of the IC die is available for heat dissipation; a plurality of conductive structures disposed on the lower surface of the base and arranged around the IC die; and a metal thermal interface layer comprising a backside metal layer that is in contact with the backside of the IC die, and a solder paste conformally printed on the backside metal layer.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20200243464A1
公开(公告)日：2020-07-30
申请号：US16802576
申请日：2020-02-27
Applicant: MEDIATEK INC.
Inventor： Chia-Hao Hsu , Tai-Yu Chen , Shiann-Tsong Tsai , Hsing-Chih Liu , Yao-Pang Hsu , Chi-Yuan Chen , Chung-Fa Lee
IPC: H01L23/66 , H01Q1/02 , H01Q1/22 , H01L23/00 , H01L23/367 , H01L23/498 , H01L23/373
Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.
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公开(公告)号：US12080614B2
公开(公告)日：2024-09-03
申请号：US17493853
申请日：2021-10-05
Applicant: MEDIATEK INC.
Inventor： Shih-Chao Chiu , Chi-Yuan Chen , Wen-Sung Hsu , Ya-Jui Hsieh , Yao-Pang Hsu , Wen-Chun Huang
CPC classification number: H01L23/31 , H01L23/4006 , H01L23/473 , H05K5/0052 , H05K5/0221 , H05K5/03
Abstract: A semiconductor package includes a substrate having a top surface and a bottom surface; a semiconductor die mounted on the top surface of the substrate; and a two-part lid mounted on a perimeter of the top surface of the substrate and housing the semiconductor die. The lid comprises an annular lid base and a cover plate removably installed on the annular lid base. The semiconductor package can be uncovered by removing the cover plate and a forced cooling module can be installed in place of the cover plate.
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公开(公告)号：US11967570B2
公开(公告)日：2024-04-23
申请号：US17687350
申请日：2022-03-04
Applicant: MediaTek Inc.
Inventor： Chia-Hao Hsu , Tai-Yu Chen , Shiann-Tsong Tsai , Hsing-Chih Liu , Yao-Pang Hsu , Chi-Yuan Chen , Chung-Fa Lee
IPC: H01L23/66 , H01L23/00 , H01L23/367 , H01L23/373 , H01L23/498 , H01Q1/02 , H01Q1/22
CPC classification number: H01L23/66 , H01L23/3672 , H01L23/3733 , H01L23/49822 , H01L23/49838 , H01L24/16 , H01Q1/02 , H01Q1/2283 , H01L2223/6677 , H01L2224/16227 , H01L2924/01029 , H01L2924/0103 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01083 , H01L2924/014 , H01L2924/18161
Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.
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公开(公告)号：US20220285297A1
公开(公告)日：2022-09-08
申请号：US17687350
申请日：2022-03-04
Applicant: MediaTek Inc.
Inventor： Chia-Hao Hsu , Tai-Yu Chen , Shiann-Tsong Tsai , Hsing-Chih Liu , Yao-Pang Hsu , Chi-Yuan Chen , Chung-Fa Lee
IPC: H01L23/66 , H01L23/367 , H01L23/373 , H01L23/498 , H01L23/00 , H01Q1/02 , H01Q1/22
Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.
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公开(公告)号：US11302657B2
公开(公告)日：2022-04-12
申请号：US16802576
申请日：2020-02-27
Applicant: MEDIATEK INC.
Inventor： Chia-Hao Hsu , Tai-Yu Chen , Shiann-Tsong Tsai , Hsing-Chih Liu , Yao-Pang Hsu , Chi-Yuan Chen , Chung-Fa Lee
IPC: H01L27/14 , H01L23/66 , H01L23/367 , H01L23/373 , H01L23/498 , H01L23/00 , H01Q1/02 , H01Q1/22
Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.
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