公开(公告)号：US20060237785A1

公开(公告)日：2006-10-26

申请号：US11112820

申请日：2005-04-22

申请人： Meikei Ieong ,  Qiqing Ouyang ,  Kern Rim

发明人： Meikei Ieong ,  Qiqing Ouyang ,  Kern Rim

IPC分类号： H01L29/76

CPC分类号： H01L21/823807 ,  H01L27/0922 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

摘要： The present invention provides CMOS structures including at least one strained pFET that is located on a rotated semiconductor substrate to improve the device performance. Specifically, the present invention utilizes a Si-containing semiconductor substrate having a (100) crystal orientation in which the substrate is rotated by about 45° such that the CMOS device channels are located along the direction. Strain can be induced upon the CMOS structure including at least a pFET and optionally an nFET, particularly the channels, by forming a stressed liner about the FET, by forming embedded stressed wells in the substrate, or by utilizing a combination of embedded stressed wells and a stressed liner. The present invention also provides methods for fabricating the aforesaid semiconductor structures.

摘要翻译： 本发明提供CMOS结构，其包括位于旋转的半导体衬底上的至少一个应变pFET，以改善器件性能。 具体地，本发明利用具有（100）晶体取向的含Si半导体衬底，其中衬底旋转约45°，使得CMOS器件沟道沿<100>方向定位。 通过在衬底中形成嵌入的应力阱，或者通过利用嵌入的应力阱的组合，或者通过利用嵌入的应力阱的组合，可以在包括至少pFET和任选的nFET，特别是沟道的CMOS结构上诱导应变， 一个紧张的班轮。 本发明还提供了制造上述半导体结构的方法。

公开(公告)号：US07713807B2

公开(公告)日：2010-05-11

申请号：US11958877

申请日：2007-12-18

申请人： Bruce B. Doris ,  Kathryn W. Guarini ,  Meikei Ieong ,  Shreesh Narasimha ,  Kern Rim ,  Jeffrey W. Sleight ,  Min Yang

发明人： Bruce B. Doris ,  Kathryn W. Guarini ,  Meikei Ieong ,  Shreesh Narasimha ,  Kern Rim ,  Jeffrey W. Sleight ,  Min Yang

IPC分类号： H01L21/8238

CPC分类号： H01L21/76275 ,  H01L21/823807 ,  H01L21/84

摘要： An integrated semiconductor structure containing at least one device formed upon a first crystallographic surface that is optimal for that device, while another device is formed upon a second different crystallographic surface that is optimal for the other device is provided. The method of forming the integrated structure includes providing a bonded substrate including at least a first semiconductor layer of a first crystallographic orientation and a second semiconductor layer of a second different crystallographic orientation. A portion of the bonded substrate is protected to define a first device area, while another portion of the bonded substrate is unprotected. The unprotected portion of the bonded substrate is then etched to expose a surface of the second semiconductor layer and a semiconductor material is regrown on the exposed surface. Following planarization, a first semiconductor device is formed in the first device region and a second semiconductor device is formed on the regrown material.

摘要翻译： 提供包含至少一个器件的集成半导体结构，所述器件形成在对于该器件最佳的第一晶体表面上，而另一器件形成在对于另一器件最佳的第二不同晶体表面上。 形成集成结构的方法包括提供包括至少第一晶体取向的第一半导体层和第二不同晶体取向的第二半导体层的键合衬底。 键合衬底的一部分被保护以限定第一器件区域，而键合衬底的另一部分是未受保护的。 然后蚀刻键合衬底的未保护部分以暴露第二半导体层的表面，并将半导体材料重新生长在暴露表面上。 在平坦化之后，在第一器件区域中形成第一半导体器件，并且在再生长材料上形成第二半导体器件。

公开(公告)号：US20080096330A1

公开(公告)日：2008-04-24

申请号：US11958877

申请日：2007-12-18

申请人： Bruce Doris ,  Kathryn Guarini ,  Meikei Ieong ,  Shreesh Narasimha ,  Kern Rim ,  Jeffrey Sleight ,  Min Yang

发明人： Bruce Doris ,  Kathryn Guarini ,  Meikei Ieong ,  Shreesh Narasimha ,  Kern Rim ,  Jeffrey Sleight ,  Min Yang

IPC分类号： H01L21/84

CPC分类号： H01L21/76275 ,  H01L21/823807 ,  H01L21/84

摘要： An integrated semiconductor structure containing at least one device formed upon a first crystallographic surface that is optimal for that device, while another device is formed upon a second different crystallographic surface that is optimal for the other device is provided. The method of forming the integrated structure includes providing a bonded substrate including at least a first semiconductor layer of a first crystallographic orientation and a second semiconductor layer of a second different crystallographic orientation. A portion of the bonded substrate is protected to define a first device area, while another portion of the bonded substrate is unprotected. The unprotected portion of the bonded substrate is then etched to expose a surface of the second semiconductor layer and a semiconductor material is regrown on the exposed surface. Following planarization, a first semiconductor device is formed in the first device region and a second semiconductor device is formed on the regrown material.

摘要翻译： 提供包含至少一个器件的集成半导体结构，所述器件形成在对于该器件最佳的第一晶体表面上，而另一器件形成在对于另一器件最佳的第二不同晶体表面上。 形成集成结构的方法包括提供包括至少第一晶体取向的第一半导体层和第二不同晶体取向的第二半导体层的键合衬底。 键合衬底的一部分被保护以限定第一器件区域，而键合衬底的另一部分是未受保护的。 然后蚀刻键合衬底的未保护部分以暴露第二半导体层的表面，并将半导体材料重新生长在暴露表面上。 在平坦化之后，在第一器件区域中形成第一半导体器件，并且在再生长材料上形成第二半导体器件。

公开(公告)号：US20050236687A1

公开(公告)日：2005-10-27

申请号：US10830347

申请日：2004-04-22

申请人： Kevin Chan ,  Bruce Doris ,  Kathryn Guarini ,  Meikei Ieong ,  Shreesh Narasimha ,  Alexander Reznicek ,  Kern Rim ,  Devendra Sadana ,  Leathen Shi ,  Jeffrey Sleight ,  Min Yang

发明人： Kevin Chan ,  Bruce Doris ,  Kathryn Guarini ,  Meikei Ieong ,  Shreesh Narasimha ,  Alexander Reznicek ,  Kern Rim ,  Devendra Sadana ,  Leathen Shi ,  Jeffrey Sleight ,  Min Yang

IPC分类号： H01L27/08 ,  H01L21/02 ,  H01L21/20 ,  H01L21/336 ,  H01L21/762 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/092 ,  H01L27/12 ,  H01L29/04 ,  H01L29/76 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/7842 ,  H01L21/2022 ,  H01L21/76275 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/045 ,  H01L29/78687

摘要： Methods of forming a strained Si-containing hybrid substrate are provided as well as the strained Si-containing hybrid substrate formed by the methods. In the methods of the present invention, a strained Si layer is formed overlying a regrown semiconductor material, a second semiconducting layer, or both. In accordance with the present invention, the strained Si layer has the same crystallographic orientation as either the regrown semiconductor layer or the second semiconducting layer. The methods provide a hybrid substrate in which at least one of the device layers includes strained Si.

摘要翻译： 提供了形成应变含Si的杂化基板的方法以及通过这些方法形成的应变的含Si杂化基板。 在本发明的方法中，形成覆盖重新生长的半导体材料，第二半导体层或两者的应变Si层。 根据本发明，应变Si层具有与再生长半导体层或第二半导电层相同的晶体取向。 该方法提供混合基板，其中至少一个器件层包括应变Si。

公开(公告)号：US20080042215A1

公开(公告)日：2008-02-21

申请号：US11925088

申请日：2007-10-26

申请人： Meikei Ieong ,  Qiging Ouyang ,  Kern Rim

发明人： Meikei Ieong ,  Qiging Ouyang ,  Kern Rim

IPC分类号： H01L29/94

CPC分类号： H01L21/823807 ,  H01L27/0922 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

摘要： The present invention provides CMOS structures including at least one strained pFET that is located on a rotated semiconductor substrate to improve the device performance. Specifically, the present invention utilizes a Si-containing semiconductor substrate having a (100) crystal orientation in which the substrate is rotated by about 45° such that the CMOS device channels are located along the direction. Strain can be induced upon the CMOS structure including at least a pFET and optionally an nFET, particularly the channels, by forming a stressed liner about the FET, by forming embedded stressed wells in the substrate, or by utilizing a combination of embedded stressed wells and a stressed liner. The present invention also provides methods for fabricating the aforesaid semiconductor structures.

摘要翻译： 本发明提供CMOS结构，其包括位于旋转的半导体衬底上的至少一个应变pFET，以改善器件性能。 具体地，本发明利用具有（100）晶体取向的含Si半导体衬底，其中衬底旋转约45°，使得CMOS器件沟道沿<100>方向定位。 通过在衬底中形成嵌入的应力阱，或者通过利用嵌入的应力阱的组合，或者通过利用嵌入的应力阱的组合，可以在包括至少pFET和任选的nFET，特别是沟道的CMOS结构上诱导应变， 一个紧张的班轮。 本发明还提供了制造上述半导体结构的方法。

公开(公告)号：US07348611B2

公开(公告)日：2008-03-25

申请号：US11112820

申请日：2005-04-22

申请人： Meikei Ieong ,  Qiqing C. Ouyang ,  Kern Rim

发明人： Meikei Ieong ,  Qiqing C. Ouyang ,  Kern Rim

IPC分类号： H01L29/73

CPC分类号： H01L21/823807 ,  H01L27/0922 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

摘要： The present invention provides CMOS structures including at least one strained pFET that is located on a rotated semiconductor substrate to improve the device performance. Specifically, the present invention utilizes a Si-containing semiconductor substrate having a (100) crystal orientation in which the substrate is rotated by about 45° such that the CMOS device channels are located along the direction. Strain can be induced upon the CMOS structure including at least a pFET and optionally an nFET, particularly the channels, by forming a stressed liner about the FET, by forming embedded stressed wells in the substrate, or by utilizing a combination of embedded stressed wells and a stressed liner. The present invention also provides methods for fabricating the aforesaid semiconductor structures.

摘要翻译： 本发明提供CMOS结构，其包括位于旋转的半导体衬底上的至少一个应变pFET，以改善器件性能。 具体地，本发明利用具有（100）晶体取向的含Si半导体衬底，其中衬底旋转约45°，使得CMOS器件沟道沿<100>方向定位。 通过在衬底中形成嵌入的应力阱，或者通过利用嵌入的应力阱的组合，或者通过利用嵌入的应力阱的组合，可以在包括至少pFET和任选的nFET，特别是沟道的CMOS结构上诱导应变， 一个紧张的班轮。 本发明还提供了制造上述半导体结构的方法。

公开(公告)号：US07675055B2

公开(公告)日：2010-03-09

申请号：US11925088

申请日：2007-10-26

申请人： Meikei Ieong ,  Qiging C. Ouyang ,  Kern Rim

发明人： Meikei Ieong ,  Qiging C. Ouyang ,  Kern Rim

IPC分类号： H01L31/00

CPC分类号： H01L21/823807 ,  H01L27/0922 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

摘要： The present invention provides CMOS structures including at least one strained pFET that is located on a rotated semiconductor substrate to improve the device performance. Specifically, the present invention utilizes a Si-containing semiconductor substrate having a (100) crystal orientation in which the substrate is rotated by about 45° such that the CMOS device channels are located along the direction. Strain can be induced upon the CMOS structure including at least a pFET and optionally an nFET, particularly the channels, by forming a stressed liner about the FET, by forming embedded stressed wells in the substrate, or by utilizing a combination of embedded stressed wells and a stressed liner. The present invention also provides methods for fabricating the aforesaid semiconductor structures.

摘要翻译： 本发明提供CMOS结构，其包括位于旋转的半导体衬底上的至少一个应变pFET，以改善器件性能。 具体地，本发明利用具有（100）晶体取向的含Si半导体衬底，其中衬底旋转约45°，使得CMOS器件沟道沿<100>方向定位。 通过在衬底中形成嵌入的应力阱，或者通过利用嵌入的应力阱的组合，或者通过利用嵌入的应力阱的组合，可以在包括至少pFET和任选的nFET，特别是沟道的CMOS结构上诱导应变， 一个紧张的班轮。 本发明还提供了制造上述半导体结构的方法。

公开(公告)号：US07329923B2

公开(公告)日：2008-02-12

申请号：US10250241

申请日：2003-06-17

申请人： Bruce B. Doris ,  Kathryn W. Guarini ,  Meikei Ieong ,  Shreesh Narasimha ,  Kern Rim ,  Jeffrey W. Sleight ,  Min Yang

发明人： Bruce B. Doris ,  Kathryn W. Guarini ,  Meikei Ieong ,  Shreesh Narasimha ,  Kern Rim ,  Jeffrey W. Sleight ,  Min Yang

IPC分类号： H01L27/01

CPC分类号： H01L21/76275 ,  H01L21/823807 ,  H01L21/84

摘要： An integrated semiconductor structure containing at least one device formed upon a first crystallographic surface that is optimal for that device, while another device is formed upon a second different crystallographic surface that is optimal for the other device is provided. The method of forming the integrated structure includes providing a bonded substrate including at least a first semiconductor layer of a first crystallographic orientation and a second semiconductor layer of a second different crystallographic orientation. A portion of the bonded substrate is protected to define a first device area, while another portion of the bonded substrate is unprotected. The unprotected portion of the bonded substrate is then etched to expose a surface of the second semiconductor layer and a semiconductor material is regrown on the exposed surface. Following planarization, a first semiconductor device is formed in the first device region and a second semiconductor device is formed on the regrown material.

摘要翻译： 提供包含至少一个器件的集成半导体结构，所述器件形成在对于该器件最佳的第一晶体表面上，而另一器件形成在对于另一器件最佳的第二不同晶体表面上。 形成集成结构的方法包括提供包括至少第一晶体取向的第一半导体层和第二不同晶体取向的第二半导体层的键合衬底。 键合衬底的一部分被保护以限定第一器件区域，而键合衬底的另一部分是未受保护的。 然后蚀刻键合衬底的未保护部分以暴露第二半导体层的表面，并将半导体材料重新生长在暴露表面上。 在平坦化之后，在第一器件区域中形成第一半导体器件，并且在再生长材料上形成第二半导体器件。

公开(公告)号：US07227205B2

公开(公告)日：2007-06-05

申请号：US10930404

申请日：2004-08-31

申请人： Andres Bryant ,  Qiqing Ouyang ,  Kern Rim

发明人： Andres Bryant ,  Qiqing Ouyang ,  Kern Rim

IPC分类号： H01L29/76

CPC分类号： H01L29/165 ,  H01L29/1054 ,  H01L29/24 ,  H01L29/7842 ,  H01L29/7843

摘要： The present invention provides a semiconductor device and a method of forming thereof, in which a uniaxial strain is produced in the device channel of the semiconductor device. The uniaxial strain may be in tension or in compression and is in a direction parallel to the device channel. The uniaxial strain can be produced in a biaxially strained substrate surface by strain inducing liners, strain inducing wells or a combination thereof. The uniaxial strain may be produced in a relaxed substrate by the combination of strain inducing wells and a strain inducing liner. The present invention also provides a means for increasing biaxial strain with strain inducing isolation regions. The present invention further provides CMOS devices in which the device regions of the CMOS substrate may be independently processed to provide uniaxially strained semiconducting surfaces in compression or tension.

摘要翻译： 本发明提供半导体器件及其形成方法，其中在半导体器件的器件沟道中产生单轴应变。 单轴应变可以处于张力或压缩状态，并且在平行于装置通道的方向上。 单轴应变可以通过应变诱导衬片，应变诱导孔或其组合在双轴应变衬底表面中产生。 单轴应变可以通过应变诱导孔和应变诱导衬垫的组合在松弛的衬底中产生。 本发明还提供了用应变诱导隔离区增加双轴应变的方法。 本发明还提供了CMOS器件，其中可以独立地处理CMOS衬底的器件区域以提供压缩或张力的单轴应变半导体表面。

公开(公告)号：US20050285187A1

公开(公告)日：2005-12-29

申请号：US10930404

申请日：2004-08-31

申请人： Andres Bryant ,  Qiqing Ouyang ,  Kern Rim

发明人： Andres Bryant ,  Qiqing Ouyang ,  Kern Rim

IPC分类号： H01L29/10 ,  H01L29/165 ,  H01L29/24 ,  H01L29/76

CPC分类号： H01L29/165 ,  H01L29/1054 ,  H01L29/24 ,  H01L29/7842 ,  H01L29/7843

摘要： The present invention provides a semiconductor device and a method of forming thereof, in which a uniaxial strain is produced in the device channel of the semiconductor device. The uniaxial strain may be in tension or in compression and is in a direction parallel to the device channel. The uniaxial strain can be produced in a biaxially strained substrate surface by strain inducing liners, strain inducing wells or a combination thereof. The uniaxial strain may be produced in a relaxed substrate by the combination of strain inducing wells and a strain inducing liner. The present invention also provides a means for increasing biaxial strain with strain inducing isolation regions. The present invention further provides CMOS devices in which the device regions of the CMOS substrate may be independently processed to provide uniaxially strained semiconducting surfaces in compression or tension.

摘要翻译： 本发明提供半导体器件及其形成方法，其中在半导体器件的器件沟道中产生单轴应变。 单轴应变可以处于张力或压缩状态，并且在平行于装置通道的方向上。 单轴应变可以通过应变诱导衬片，应变诱导孔或其组合在双轴应变衬底表面中产生。 单轴应变可以通过应变诱导孔和应变诱导衬垫的组合在松弛的衬底中产生。 本发明还提供了用应变诱导隔离区增加双轴应变的方法。 本发明还提供了CMOS器件，其中可以独立地处理CMOS衬底的器件区域以提供压缩或张力的单轴应变半导体表面。