Current generator stage used with integrated analog circuits
    1.
    发明授权
    Current generator stage used with integrated analog circuits 失效
    电流发生器级与集成模拟电路一起使用

    公开(公告)号:US5805015A

    公开(公告)日:1998-09-08

    申请号:US629320

    申请日:1996-04-08

    CPC分类号: G05F3/265 G05F3/222

    摘要: A current generator stage for integrated analog circuits includes a current source connected between a supply voltage and a ground terminal. A current mirror is operationally connected to the current source to generate an output current. A bias circuit is operationally connected to the current source to perform switching of the current source from a first operating mode to a second operating mode. The bias circuit includes an energy storage circuit which, in a first circuit configuration, supplies to the current source a first predetermined voltage when the current source is in the first operating mode. The energy storage circuit in a second circuit configuration is a combination of first and second reactances to supply to the current source a second predetermined voltage when the current source is in the second operating mode.

    摘要翻译: 用于集成模拟电路的电流发生器级包括连接在电源电压和接地端子之间的电流源。 电流镜可操作地连接到电流源以产生输出电流。 偏置电路可操作地连接到电流源,以将电流源从第一操作模式切换到第二操作模式。 偏置电路包括能量存储电路,其在第一电路配置中,当电流源处于第一操作模式时,向电流源提供第一预定电压。 第二电路配置中的能量存储电路是第一和第二电抗的组合,以在电流源处于第二操作模式时向电流源提供第二预定电压。

    Differential charge pump using surtchingly controlled current generators
    2.
    发明授权
    Differential charge pump using surtchingly controlled current generators 失效
    差动电荷泵采用交流电流发生器

    公开(公告)号:US5736880A

    公开(公告)日:1998-04-07

    申请号:US576882

    申请日:1995-12-21

    IPC分类号: H03L7/093 H03L7/089 H03L7/06

    CPC分类号: H03L7/0896

    摘要: A differential charge pump circuit employing a lowpass filter network which is chargeable and dischargeable by switchingly controlled current generators. The differential charge pump employs two identical current generators for injecting the same current I in a substantially continuous manner, on the two significant nodes of the lowpass filter. The differential charge pump also employs two pairs of identical, switchingly controlled current generators connected to the two significant nodes, respectively, each capable of pulling a current I. The two generators forming each of the two pairs of switchingly controlled current generators are controlled by one of a pair of control signals (UP, DOWN) and by the inverted signal of the other of the pair of control signals, respectively. All four switchingly controlled generators may be of the same type (N-type), thus ensuring high speed and precision. The two identical (P-type) current generators employed for continuously injecting the same current I on the two nodes of the lowpass filter may be controlled through a common mode feedback loop for enhanced precision.

    摘要翻译: 采用低通滤波器网络的差分电荷泵电路,该低通滤波器网络可由切换控制的电流发生器进行充电和放电。 差分电荷泵采用两个相同的电流发生器,以基本上连续的方式在低通滤波器的两个重要节点上注入相同的电流I。 差分电荷泵还采用两对相同的交换控制电流发生器,分别连接到两个有效节点,每个有效节点能够拉电流I.形成两对开关控制电流发生器中的每一对的两个发电机由一个 一对控制信号(UP,DOWN)和另一对控制信号的反相信号。 所有四个交流控制发电机可以是相同类型(N型),从而确保高速度和精度。 用于在低通滤波器的两个节点上连续注入相同电流I的两个相同(P型)电流发生器可以通过共模反馈回路来控制,以提高精度。

    Low consumption analog multiplier
    6.
    发明授权
    Low consumption analog multiplier 失效
    低功耗模拟乘法器

    公开(公告)号:US5714903A

    公开(公告)日:1998-02-03

    申请号:US575872

    申请日:1995-12-21

    IPC分类号: G06G7/16 G06G7/163 G06F7/44

    CPC分类号: G06G7/163

    摘要: An analog multiplier includes at least a differential output stage formed by a pair of emitter-coupled bipolar transistors. Each transistor of the pair of emitter-coupled bipolar transistors is driven by a predistortion stage having a reciprocal of a hyperbolic tangent transfer function that is attributable to the base currents of the bipolar transistors used in the predistortion stage. The error in the output signal produced by the analog multiplier is compensated by generating replicas of the base currents of the bipolar transistors of the differential output stage and forcing those replica currents on the output node of a respective predistortion stage. Various embodiments that consume different amounts of power are described.

    摘要翻译: 模拟乘法器至少包括由一对发射极耦合双极晶体管形成的差分输出级。 一对发射极耦合双极晶体管中的每个晶体管由具有双曲正切传递函数的倒数的预失真级驱动,该双曲正切转移函数归因于在预失真级中使用的双极型晶体管的基极电流。 由模拟乘法器产生的输出信号中的误差通过产生差分输出级的双极晶体管的基极电流的副本并且迫使在相应的预失真级的输出节点上的那些复制电流来补偿。 描述消耗不同功率量的各种实施例。

    Integrated circuit waith automatic compensation for deviations of the
capacitances from nominal values
    7.
    发明授权
    Integrated circuit waith automatic compensation for deviations of the capacitances from nominal values 失效
    集成电路,具有自动补偿电容与标称值的偏差

    公开(公告)号:US5821829A

    公开(公告)日:1998-10-13

    申请号:US810032

    申请日:1997-03-04

    IPC分类号: H03L7/099 H03K3/281 H03L7/00

    CPC分类号: H03L7/0805 H03L7/099

    摘要: The system includes various circuit units each having a capacitor and a charging circuit for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop which uses one of the circuit units as an adjustable oscillator, and current transducer means which regulates the charging currents of the capacitors of the circuit units in dependence on the regulated charging current of the capacitor of the oscillator, or the error current of the PLL loop.

    摘要翻译: 该系统包括各自具有电容器的电路单元和用于根据充电电流和电容器的电容之间的比率(I / C)定义量的充电电路。 为了自动补偿由于集成电路制造过程的参数波动引起的实际电容与标称电容的偏差,系统具有使用电路单元之一作为可调谐振荡器的锁相环,以及 电流传感器装置,其根据振荡器的电容器的调节的充电电流或PLL环路的误差电流来调节电路单元的电容器的充电电流。

    Reduced current quadratic digital/analog converter with improved
settling-time
    8.
    发明授权
    Reduced current quadratic digital/analog converter with improved settling-time 失效
    减少电流二次数字/模拟转换器,提高了建立时间

    公开(公告)号:US5748128A

    公开(公告)日:1998-05-05

    申请号:US645457

    申请日:1996-05-13

    CPC分类号: H03M1/664 G06J1/00 H03M1/785

    摘要: A digital/analog quadratic converter (DACQ) composed by a pair of linear converters connected in cascade has a direct coupling of the output node of the first converter (DAC1) with a node of a R-2R type resistive network of the second converter (DAC2) corresponding to the LSB stage of the R-2R type resistive network. High impedance nodes, notably the input node of the second linear converter, are advantageously eliminated from the "current path" thus markedly reducing the problems of relatively long settling times of high impedance nodes (having intrinsically large parasitic capacitances associated therewith). The peculiar architecture of the quadratic converter provides also for a remarkable simplification of the circuit.

    摘要翻译: 由串联连接的一对线性转换器组成的数字/模拟二次转换器(DACQ)具有第一转换器(DAC1)的输出节点与第二转换器的R-2R型电阻网络的节点的直接耦合 DAC2)对应于R-2R型电阻网络的LSB级。 有利地,从“电流路径”消除高阻抗节点,特别是第二线性转换器的输入节点,从而显着地减少了高阻抗节点(具有与其相关的本质上大的寄生电容)的较长建立时间的问题。 二次转换器的独特结构也为电路的显着简化提供了依据。

    Circuit and method for determining the position of a read head for a magnetic disk drive device
    9.
    发明授权
    Circuit and method for determining the position of a read head for a magnetic disk drive device 有权
    用于确定用于磁盘驱动装置的读取头的位置的电路​​和方法

    公开(公告)号:US06204990B1

    公开(公告)日:2001-03-20

    申请号:US09412080

    申请日:1999-10-04

    IPC分类号: G11B5596

    摘要: A servo-demodulator for a pair of alternating signals generated by a magnetic disc read head and indicative of the position of the read head in relation to the center of a recorded track. The servo-demodulator comprises a peak detector for successively and individually sampling the amplitude of each of a plurality of peaks of the pair of alternating signals, and a capacitor periodically connected to the output of the peak detector by a control logic for deriving a weighted average of the various successively sampled amplitudes. In this manner, the control logic obtains an averaged measure of amplitude with high immunity to noise.

    摘要翻译: 一种用于由磁盘读取头产生的一对交替信号的伺服解调器,并且指示读取头相对于记录轨道的中心的位置。 伺服解调器包括峰值检测器,用于连续和单独地采样该对交变信号的多个峰值中的每一个的振幅;以及电容器,通过用于导出加权平均值的控制逻辑周期性地连接到峰值检测器的输出端 的各种连续采样幅度。 以这种方式,控制逻辑获得具有高抗噪声能力的幅度的平均测量值。

    Magnetic disc read head positioning device and method
    10.
    发明授权
    Magnetic disc read head positioning device and method 失效
    磁盘读头定位装置及方法

    公开(公告)号:US6002542A

    公开(公告)日:1999-12-14

    申请号:US904599

    申请日:1997-08-01

    IPC分类号: G11B5/55 G11B5/596 G11B21/10

    摘要: A servo-demodulator for a pair of alternating signals generated by a magnetic disc read head and indicative of the position of the read head in relation to the center of a recorded track. The servo-demodulator comprises a peak detector for successively and individually sampling the amplitude of each of a plurality of peaks of the pair of alternating signals, and a capacitor periodically connected to the output of the peak detector by a control logic for deriving a weighted average of the various successively sampled amplitudes. In this manner, the control logic obtains an averaged measure of amplitude with high immunity to noise.

    摘要翻译: 一种用于由磁盘读取头产生的一对交替信号的伺服解调器,并且指示读取头相对于记录轨道的中心的位置。 伺服解调器包括峰值检测器,用于连续和单独地采样该对交变信号的多个峰值中的每一个的振幅;以及电容器,通过用于导出加权平均值的控制逻辑周期性地连接到峰值检测器的输出端 的各种连续采样幅度。 以这种方式,控制逻辑获得具有高抗噪声能力的幅度的平均测量值。