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    Sparkless electrical connector
    4.
    发明授权
    Sparkless electrical connector 有权
    无火花电气连接器

    公开(公告)号：US08226425B2

    公开(公告)日：2012-07-24

    申请号：US12533595

    申请日：2009-07-31

    申请人： Shen-Yuan Chien ,  Meng-Chang Liu

    发明人： Shen-Yuan Chien ,  Meng-Chang Liu

    IPC分类号： H01R13/53

    CPC分类号： H01R13/6616 ,  H01R12/721 ,  H01R13/113 ,  H01R13/53 ,  H01R13/652 ,  H01R24/22 ,  H01R2103/00

    摘要： Methods and apparatuses supporting an electrical connection in a manner that eliminates or reduces a danger of electrical sparking are disclosed. A sparkless electrical connector has a conductor, configured to provide flow of electricity between an electrical source and a load, and a resistive element, operatively coupled to the conductor, to resist flow of electricity during a state of partial connection with the electrical source or the load. The resistive element may be not in contact with a terminal of the source or load during a state of full connection. The resistive element may be a coating of an anodized material on a pin of the conductor. The coating provides a resistance sufficient to prevent sparking during connection of the conductor and at least one of the electrical source and the load. Techniques disclosed herein benefit users and manufacturers in the areas of safety, cost, simplicity, and reliability.

    摘要翻译： 公开了以消除或减少电火花危险的方式支持电连接的方法和装置。 无火花电连接器具有被配置为在电源和负载之间提供电流的导体和可操作地耦合到导体的电阻元件，以在与电源或部分连接的状态期间阻止电流流动 加载。 在完全连接的状态下，电阻元件可能不与源极或负载的端子接触。 电阻元件可以是在导体的引脚上的阳极氧化材料的涂层。 涂层提供足够的电阻以防止在导体和电源和负载中的至少一个连接期间发生火花。 这里公开的技术在安全性，成本，简单性和可靠性方面使用户和制造商受益。

    Double gate oxide layer method of manufacture
    5.
    发明授权
    Double gate oxide layer method of manufacture 有权
    双栅氧化层制造方法

    公开(公告)号：US06420248B1

    公开(公告)日：2002-07-16

    申请号：US09685423

    申请日：2000-10-10

    申请人： Meng-Chang Liu ,  Shea-Jue Wang

    发明人： Meng-Chang Liu ,  Shea-Jue Wang

    IPC分类号： H01L214763

    CPC分类号： H01L21/823462 ,  H01L21/823481

    摘要： A method of manufacturing a double gate oxide layer. A substrate has trenches that divide the substrate into a memory circuit region and a logic circuit region. A dielectric layer is formed on the substrate to fill the trenches. The dielectric layer of the logic region is removed, thereby exposing the substrate. An ion implantation step is performed on the substrate of the logic circuit region using a reverse tone mask. A conformal barrier layer is formed over the substrate. A spin-on layer is formed over the barrier layer. A chemical mechanical polishing step is performed to remove the in-on layer, the barrier layer, and dielectric layer outside the trenches, thereby exposing the substrate. A thermal oxidation step is performed to form a double gate oxide layer that is thicker in the logic circuit region than it is in the memory circuit region.

    摘要翻译： 一种制造双栅氧化层的方法。 衬底具有将衬底分成存储器电路区域和逻辑电路区域的沟槽。 在衬底上形成电介质层以填充沟槽。 去除逻辑区域的电介质层，从而露出衬底。 使用反向色调掩模在逻辑电路区域的衬底上进行离子注入步骤。 在衬底上形成保形阻挡层。 在阻挡层上形成旋涂层。 进行化学机械抛光步骤以去除沟槽外部的内层，阻挡层和电介质层，从而暴露衬底。 进行热氧化步骤以形成在逻辑电路区域比在存储器电路区域更厚的双栅氧化层。

    Method of fabricating self-aligned contacts
    10.
    发明授权
    Method of fabricating self-aligned contacts 有权
    制造自对准触点的方法

    公开(公告)号：US06485654B1

    公开(公告)日：2002-11-26

    申请号：US09672548

    申请日：2000-09-28

    申请人： Meng-Chang Liu ,  Shea-Jue Wang

    发明人： Meng-Chang Liu ,  Shea-Jue Wang

    IPC分类号： H01L21302

    CPC分类号： H01L21/76897 ,  H01L27/10873 ,  H01L27/10888 ,  Y10S438/947

    摘要： A process for producing a self-aligned contact comprises the steps of forming leads on a substrate, forming an etching stop layer on the leads by depositing, then forming a sacrificed oxide layer; after the structure of the leads is defined, a spacer is formed on both sides of the structure; a sacrificed oxide layer is formed, allowing the spacer to protrude in the form of horn. Next, a dielectric layer having a flat upper surface is deposited on the substrate and the structure of leads, a contact hole being formed between the leads so as to connect the substrate, a conductive material being filled in the contact hole to form a plug.

    摘要翻译： 用于制造自对准接触的方法包括以下步骤：在衬底上形成引线，通过沉积形成牺牲氧化物层，在引线上形成蚀刻停止层; 在限定了引线的结构之后，在结构的两侧形成间隔物; 形成牺牲的氧化物层，允许间隔件以喇叭形式突出。 接下来，将具有平坦的上表面的电介质层沉积在基板上，并且引线的结构，在引线之间形成接触孔，以便连接基板，填充在接触孔中的导电材料形成插头。