公开(公告)号：US11061373B1

公开(公告)日：2021-07-13

申请号：US16545601

申请日：2019-08-20

申请人： Mentor Graphics Corporation

发明人： Gurdaman Khaira ,  Germain Louis Fenger ,  Azat Latypov ,  John L. Sturtevant ,  Yuri Granik

IPC分类号： G05B13/04 ,  G03F7/20 ,  G05B13/02

摘要： A method and system for calculating probability of success or failure for a lithographic process due to stochastic variations of the lithographic process are disclosed. Lithography is a process that uses light to transfer a geometric pattern from a photomask, based on a layout design, to a resist on a substrate. The lithographic process is subject to random stochastic phenomena, such as photon shot noise and stochastic phenomena in the resist process and resist development, with the resulting stochastic randomness potentially becoming a major challenge. The stochastic phenomena are modeled using a stochastic model, such as a random field model, that models stochastic randomness the exposure and resist process. The stochastic model inputs light exposure and resist parameters and definitions of success of success or failure as to the lithographic process, and outputs a probability distribution function of deprotection concentration indicative of success or failure probability of the lithographic process. In turn, the probability distribution function may be used to modify one or both of the light exposure and resist parameters in order to reduce the effect of stochastic randomness on the lithographic process.

公开(公告)号：US10445452B2

公开(公告)日：2019-10-15

申请号：US15725219

申请日：2017-10-04

申请人： Mentor Graphics Corporation

发明人： John L. Sturtevant ,  Shumay Dou Shang ,  Konstantinos G. Adam

IPC分类号： G06F17/50 ,  G03F1/00 ,  G03F7/00 ,  G03F7/20 ,  G03F1/84 ,  G03F1/72 ,  G03F1/70 ,  G03F1/36

摘要： Aspects of the disclosed technology relate to techniques for using hotspot simulation to make wafer rework decisions. Metrology data of photoresist patterns created based on a layout design for a circuit design by a photolithographic processing step are received during a lithographic process. Hotspots of interest are selected based on comparing the metrology data with simulated metrology data associated with hotspots. The simulated metrology data and information of the hotspots are generated by performing lithographic simulation on the layout design before the lithographic process and stored in a library of potential hotspots. Lithography simulation is performed on the selected hotspots of interest using process conditions of the photolithographic processing step to generate simulated hotspot data. The simulated hotspot data are analyzed to determine whether rework of the one or more wafers or a wafer lot to which the one or more wafers belong is needed.

公开(公告)号：US20190102501A1

公开(公告)日：2019-04-04

申请号：US15725219

申请日：2017-10-04

申请人： Mentor Graphics Corporation

发明人： John L. Sturtevant ,  Shumay Dou Shang ,  Konstantinos G. Adam

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G03F1/36 ,  G03F1/70 ,  G03F1/72 ,  G03F1/84 ,  G03F7/70616 ,  G03F7/7065 ,  G06F17/5009 ,  G06F17/5081

摘要： Aspects of the disclosed technology relate to techniques for using hotspot simulation to make wafer rework decisions. Metrology data of photoresist patterns created based on a layout design for a circuit design by a photolithographic processing step are received during a lithographic process. Hotspots of interest are selected based on comparing the metrology data with simulated metrology data associated with hotspots. The simulated metrology data and information of the hotspots are generated by performing lithographic simulation on the layout design before the lithographic process and stored in a library of potential hotspots. Lithography simulation is performed on the selected hotspots of interest using process conditions of the photolithographic processing step to generate simulated hotspot data. The simulated hotspot data are analyzed to determine whether rework of the one or more wafers or a wafer lot to which the one or more wafers belong is needed.