Method of manufacturing void-free shallow trench isolation layer
    1.
    发明申请
    Method of manufacturing void-free shallow trench isolation layer 审中-公开
    无孔浅沟槽隔离层的制造方法

    公开(公告)号:US20050079682A1

    公开(公告)日:2005-04-14

    申请号:US10961908

    申请日:2004-10-08

    IPC分类号: H01L21/76 H01L21/762

    CPC分类号: H01L21/76232

    摘要: Provided is a method of manufacturing a shallow trench isolation (STI) film without voids or added processes. In one embodiment, the method of manufacturing an STI film includes forming a pad oxide pattern film and a silicon nitride film pattern, which define an isolation region, on a semiconductor substrate, and forming a trench by etching the semiconductor substrate to a predetermined depth using the pad oxide film pattern and the silicon nitride film pattern as masks. The resultant semiconductor substrate having the trench may be then dipped in a chemical solution containing ozone to pullback side walls of the silicon nitride film pattern. Afterward, the STI film can be formed by filling the trench with an insulating film.

    摘要翻译: 提供了一种制造没有空隙或附加工艺的浅沟槽隔离(STI)膜的方法。 在一个实施例中,制造STI膜的方法包括在半导体衬底上形成限定隔离区的衬垫氧化物图案膜和氮化硅膜图案,并且通过使用以下方式将半导体衬底蚀刻到预定深度来形成沟槽 衬垫氧化膜图案和氮化硅膜图案作为掩模。 然后将具有沟槽的所得半导体衬底浸入含有臭氧的化学溶液中以拉回氮化硅膜图案的侧壁。 之后,可以通过用绝缘膜填充沟槽来形成STI膜。

    Electronic device, thin film transistor structure and flat panel display having the same
    3.
    发明授权
    Electronic device, thin film transistor structure and flat panel display having the same 有权
    电子器件,薄膜晶体管结构和具有其的平板显示器

    公开(公告)号:US07705356B2

    公开(公告)日:2010-04-27

    申请号:US12018575

    申请日:2008-01-23

    IPC分类号: H01L31/00

    摘要: The invention provides an electronic device configured to prevent or reduce electrostatic discharge from causing a pixel to malfunction. An electronic device manufactured according to the principles of the invention may include multiple conductive layers that cross but do not contact each other, wherein at least one of the conductive layers includes a width change part having a width that changes in a length direction of the at least one of the conductive layers, and a tab connected to at least one of the conductive layers at a region thereof that does not cross a neighboring conductive layer. Alternatively, the width change part may have a width that continuously varies along a length of the at least one conductive layer and may also have obtuse corner edges. The invention also provides a flat organic electroluminescent display (OELD) or LCD display device that includes such an electronic device.

    摘要翻译: 本发明提供了一种电子设备,其被配置为防止或减少静电放电,导致像素故障。 根据本发明的原理制造的电子器件可以包括交叉但不彼此接触的多个导电层,其中至少一个导电层包括宽度改变部分,宽度变化部分的宽度在a的长度方向上变化 至少一个导电层,以及在其不与相邻导电层交叉的区域处连接到至少一个导电层的突片。 或者,宽度改变部分可以具有沿着至少一个导电层的长度连续变化的宽度,并且还可以具有钝角边缘。 本发明还提供一种包括这种电子装置的平面有机电致发光显示器(OELD)或LCD显示装置。

    Impedance calibration circuit and semiconductor device including the same
    4.
    发明授权
    Impedance calibration circuit and semiconductor device including the same 失效
    阻抗校准电路和包括其的半导体器件

    公开(公告)号:US07408379B2

    公开(公告)日:2008-08-05

    申请号:US11853956

    申请日:2007-09-12

    IPC分类号: H03K17/16

    摘要: An impedance calibration circuit and a semiconductor device including the same are provided. An embodiment of the invention provides an impedance calibration circuit with a variable reference voltage generation unit. The impedance calibration circuit maximizes the number of semiconductor devices that can be tested in test equipment at one time and permits the operation of an impedance matching unit (e.g., an on-die-termination (ODT) circuit and/or an off-chip-driver (OCD)) to be tested for a variety of reference resistor values.

    摘要翻译: 提供阻抗校准电路和包括该阻抗校准电路的半导体器件。 本发明的实施例提供了具有可变参考电压产生单元的阻抗校准电路。 阻抗校准电路使测试设备中一次可测试的半导体器件的数量最大化,并允许阻抗匹配单元(例如,芯片上端接(ODT)电路和/或片外 - 驱动器(OCD))来测试各种参考电阻值。

    Duty cycle correction circuit and a method for duty cycle correction in a delay locked loop using an inversion locking scheme
    5.
    发明申请
    Duty cycle correction circuit and a method for duty cycle correction in a delay locked loop using an inversion locking scheme 失效
    使用倒置锁定方案的延迟锁定环中的占空比校正电路和占空比校正方法

    公开(公告)号:US20060091921A1

    公开(公告)日:2006-05-04

    申请号:US11235646

    申请日:2005-09-26

    IPC分类号: H03K3/017

    摘要: Provided are a duty cycle correction circuit and method for duty cycle correction in a delay locked loop using an inversion locking scheme. The duty cycle correction circuit comprises: a correction unit exchanging and receiving a first duty correction signal and a second duty correction signal and selecting and receiving one of an input clock signal and an inversion signal of the input clock signal in response to an inversion locking signal, and correcting the duty cycle of the received input clock signal or inversion signal of the input clock signal in response to the first and second duty correction signals; a buffer buffering an output signal of the correction unit and outputting the buffered signal as a corrected clock signal; and a duty detector selecting and receiving one of the corrected clock signal and an inversion signal of the corrected clock signal in response to the inversion locking signal, and generating the first and second duty correction signals using the received corrected clock signal or inversion signal of the corrected clock signal.

    摘要翻译: 提供了一种使用反转锁定方案的延迟锁定环中的占空比校正电路和方法。 占空比校正电路包括:校正单元,响应于反相锁定信号,交换和接收第一占空比校正信号和第二占空比校正信号,并选择和接收输入时钟信号和反相信号之一 并且响应于第一和第二占空比校正信号,校正接收到的输入时钟信号的占空比或输入时钟信号的反相信号; 缓冲校正单元的输出信号并输出​​缓冲信号作为校正时钟信号的缓冲器; 以及负载检测器,其响应于所述反相锁定信号选择和接收所述经校正的时钟信号中的一个和所述经校正的时钟信号的反相信号,以及使用所接收的校正时钟信号或所述反相信号产生所述第一和第二占空比校正信号 校正时钟信号。

    Electronic device including a conductive layer having a width change part, thin film transistor structure and flat panel display having the same
    7.
    发明授权
    Electronic device including a conductive layer having a width change part, thin film transistor structure and flat panel display having the same 有权
    电子设备包括具有宽度变化部分的导电层,薄膜晶体管结构和具有该导电层的平板显示器

    公开(公告)号:US07709839B2

    公开(公告)日:2010-05-04

    申请号:US11170161

    申请日:2005-06-30

    IPC分类号: H01L29/04 H01L29/10 H01L31/00

    摘要: The invention provides an electronic device configured to prevent or reduce electrostatic discharge from causing a pixel to malfunction. An electronic device manufactured according to the principles of the invention may include multiple conductive layers that cross but do not contact each other, wherein at least one of the conductive layers includes a width change part having a width that changes in a length direction of the at least one of the conductive layers, and a tab connected to at least one of the conductive layers at a region thereof that does not cross a neighboring conductive layer. Alternatively, the width change part may have a width that continuously varies along a length of the at least one conductive layer and may also have obtuse corner edges. The invention also provides a flat organic electroluminescent display (OELD) or LCD display device that includes such an electronic device.

    摘要翻译: 本发明提供了一种电子设备,其被配置为防止或减少静电放电,导致像素故障。 根据本发明的原理制造的电子器件可以包括交叉但不彼此接触的多个导电层,其中至少一个导电层包括宽度改变部分,宽度变化部分的宽度在a的长度方向上变化 至少一个导电层,以及在其不与相邻导电层交叉的区域处连接到至少一个导电层的突片。 或者,宽度改变部分可以具有沿着至少一个导电层的长度连续变化的宽度,并且还可以具有钝角边缘。 本发明还提供一种包括这种电子装置的平面有机电致发光显示器(OELD)或LCD显示装置。

    ELECTRONIC DEVICE, THIN FILM TRANSISTOR STRUCTURE AND FLAT PANEL DISPLAY HAVING THE SAME
    8.
    发明申请
    ELECTRONIC DEVICE, THIN FILM TRANSISTOR STRUCTURE AND FLAT PANEL DISPLAY HAVING THE SAME 有权
    电子器件,薄膜晶体管结构和平板显示器

    公开(公告)号:US20080128701A1

    公开(公告)日:2008-06-05

    申请号:US12018575

    申请日:2008-01-23

    摘要: The invention provides an electronic device configured to prevent or reduce electrostatic discharge from causing a pixel to malfunction. An electronic device manufactured according to the principles of the invention may include multiple conductive layers that cross but do not contact each other, wherein at least one of the conductive layers includes a width change part having a width that changes in a length direction of the at least one of the conductive layers, and a tab connected to at least one of the conductive layers at a region thereof that does not cross a neighboring conductive layer. Alternatively, the width change part may have a width that continuously varies along a length of the at least one conductive layer and may also have obtuse corner edges. The invention also provides a flat organic electroluminescent display (OELD) or LCD display device that includes such an electronic device.

    摘要翻译: 本发明提供了一种电子设备,其被配置为防止或减少静电放电,导致像素故障。 根据本发明的原理制造的电子器件可以包括交叉但不彼此接触的多个导电层,其中至少一个导电层包括宽度改变部分,宽度变化部分的宽度在a的长度方向上变化 至少一个导电层,以及在其不与相邻导电层交叉的区域处连接到至少一个导电层的突片。 或者,宽度改变部分可以具有沿着至少一个导电层的长度连续变化的宽度,并且还可以具有钝角边缘。 本发明还提供一种包括这种电子装置的平面有机电致发光显示器(OELD)或LCD显示装置。

    Duty cycle correction circuit and a method for duty cycle correction in a delay locked loop using an inversion locking scheme
    9.
    发明授权
    Duty cycle correction circuit and a method for duty cycle correction in a delay locked loop using an inversion locking scheme 失效
    使用倒置锁定方案的延迟锁定环中的占空比校正电路和占空比校正方法

    公开(公告)号:US07183824B2

    公开(公告)日:2007-02-27

    申请号:US11235646

    申请日:2005-09-26

    IPC分类号: H03K3/017

    摘要: Provided are a duty cycle correction circuit and method for duty cycle correction in a delay locked loop using an inversion locking scheme. The duty cycle correction circuit comprises: a correction unit exchanging and receiving a first duty correction signal and a second duty correction signal and selecting and receiving one of an input clock signal and an inversion signal of the input clock signal in response to an inversion locking signal, and correcting the duty cycle of the received input clock signal or inversion signal of the input clock signal in response to the first and second duty correction signals; a buffer buffering an output signal of the correction unit and outputting the buffered signal as a corrected clock signal; and a duty detector selecting and receiving one of the corrected clock signal and an inversion signal of the corrected clock signal in response to the inversion locking signal, and generating the first and second duty correction signals using the received corrected clock signal or inversion signal of the corrected clock signal.

    摘要翻译: 提供了一种使用反转锁定方案的延迟锁定环中的占空比校正电路和方法。 占空比校正电路包括:校正单元,响应于反相锁定信号,交换和接收第一占空比校正信号和第二占空比校正信号,并选择和接收输入时钟信号和反相信号之一 并且响应于第一和第二占空比校正信号,校正接收到的输入时钟信号的占空比或输入时钟信号的反相信号; 缓冲校正单元的输出信号并输出​​缓冲信号作为校正时钟信号的缓冲器; 以及负载检测器,其响应于所述反相锁定信号选择和接收所述经校正的时钟信号中的一个和所述经校正的时钟信号的反相信号,以及使用所接收的校正时钟信号或所述反相信号产生所述第一和第二占空比校正信号 校正时钟信号。

    Electronic device, thin film transistor structure and flat panel display having the same
    10.
    发明申请
    Electronic device, thin film transistor structure and flat panel display having the same 有权
    电子器件,薄膜晶体管结构和具有其的平板显示器

    公开(公告)号:US20060006417A1

    公开(公告)日:2006-01-12

    申请号:US11170161

    申请日:2005-06-30

    IPC分类号: H01L29/739

    摘要: The invention provides an electronic device configured to prevent or reduce electrostatic discharge from causing a pixel to malfunction. An electronic device manufactured according to the principles of the invention may include multiple conductive layers that cross but do not contact each other, wherein at least one of the conductive layers includes a width change part having a width that changes in a length direction of the at least one of the conductive layers, and a tab connected to at least one of the conductive layers at a region thereof that does not cross a neighboring conductive layer. Alternatively, the width change part may have a width that continuously varies along a length of the at least one conductive layer and may also have obtuse corner edges. The invention also provides a flat organic electroluminescent display (OELD) or LCD display device that includes such an electronic device.

    摘要翻译: 本发明提供了一种电子设备,其被配置为防止或减少静电放电,导致像素故障。 根据本发明的原理制造的电子器件可以包括交叉但不彼此接触的多个导电层,其中至少一个导电层包括宽度改变部分,宽度变化部分的宽度在a的长度方向上变化 至少一个导电层,以及在其不与相邻导电层交叉的区域处连接到至少一个导电层的突片。 或者,宽度改变部分可以具有沿着至少一个导电层的长度连续变化的宽度,并且还可以具有钝角边缘。 本发明还提供一种包括这种电子装置的平面有机电致发光显示器(OELD)或LCD显示装置。