Method and apparatus for storage device with a logic unit and method for manufacturing same
    7.
    发明授权
    Method and apparatus for storage device with a logic unit and method for manufacturing same 有权
    具有逻辑单元的存储装置的方法和装置及其制造方法

    公开(公告)号:US07920433B2

    公开(公告)日:2011-04-05

    申请号:US11971819

    申请日:2008-01-09

    IPC分类号: G11C7/06

    CPC分类号: G11C7/1006

    摘要: Method and apparatus that relate to a storage device comprising a plurality of memory cells, an interface device configured to connect the storage device to a host system and configured to transmit signals to read and write data from the host system to the memory cells via a first and second data path, and a logic unit. The logic unit is configured to read and write data from the plurality of memory cells via the second data path, and configured to perform logic operations on data stored in the plurality of memory cells. When performing read and write operations, the first data path excludes the logic unit, and the second data path includes the logic unit. Furthermore, the logic unit is communicatively coupled between the interface device and the plurality of memory cells. Additionally, a method for manufacturing the memory device is provided.

    摘要翻译: 涉及包括多个存储器单元的存储设备的方法和装置,接口设备,被配置为将存储设备连接到主机系统,并且被配置为经由第一个存储器单元将数据从主机系统读取和写入到存储器单元 和第二数据路径,以及逻辑单元。 逻辑单元被配置为经由第二数据路径从多个存储器单元读取和写入数据,并且被配置为对存储在多个存储器单元中的数据执行逻辑运算。 当执行读和写操作时,第一数据路径排除逻辑单元,第二数据路径包括逻辑单元。 此外,逻辑单元通信地耦合在接口设备和多个存储器单元之间。 另外,提供了一种用于制造存储器件的方法。

    Stacking Technique for Circuit Devices
    8.
    发明申请
    Stacking Technique for Circuit Devices 审中-公开
    电路器件堆叠技术

    公开(公告)号:US20110034045A1

    公开(公告)日:2011-02-10

    申请号:US12536854

    申请日:2009-08-06

    IPC分类号: H01R12/00 H05K1/00

    摘要: Stackable circuit devices include mechanical and electrical connection elements that are optionally disengageable and disconnectable. The mechanical connection elements comprise pairs of complementary male and female plug-in engagement elements respectively arranged at opposite matching positions on top and bottom faces of each device package. The male and female plug-in engagement elements provide a mutual plug-in engagement. The electrical connection elements comprise a plurality of first and second complementary contact elements respectively arranged in opposite and matching positions on either the top or bottom face of each device package. When the circuit devices are stacked, the first contact elements are respectively configured to provide an electrical connection to a complementary matching second contact element of an adjacently plugged in circuit device. Some of the stackable circuit devices may accommodate an integrated memory die or chip and others of the stackable circuit devices may include line routing and distribution blocks.

    摘要翻译: 可堆叠电路器件包括机械和电连接元件,其可任选地可分离和可断开。 机械连接元件包括分别布置在每个器件封装的顶面和底面上的相对匹配位置的成对的互补的凸形和阴插入接合元件。 男性和女性插入式接合元件提供相互插件接合。 电连接元件包括多个第一和第二互补触点元件,其分别布置在每个器件封装的顶面或底面上的相对位置和匹配位置。 当电路器件堆叠时,第一接触元件分别构造成提供与相邻插入电路器件的互补匹配的第二接触元件的电连接。 可堆叠电路设备中的一些可以容纳集成存储器管芯或芯片,并且可堆叠电路器件中的其他可以包括线路布线和分配块。

    METHOD AND APPARATUS FOR STORAGE DEVICE WITH A LOGIC UNIT AND METHOD FOR MANUFACTURING SAME
    10.
    发明申请
    METHOD AND APPARATUS FOR STORAGE DEVICE WITH A LOGIC UNIT AND METHOD FOR MANUFACTURING SAME 有权
    具有逻辑单元的存储装置的方法和装置及其制造方法

    公开(公告)号:US20090175100A1

    公开(公告)日:2009-07-09

    申请号:US11971819

    申请日:2008-01-09

    IPC分类号: G11C7/10

    CPC分类号: G11C7/1006

    摘要: Method and apparatus that relate to a storage device comprising a plurality of memory cells, an interface device configured to connect the storage device to a host system and configured to transmit signals to read and write data from the host system to the memory cells via a first and second data path, and a logic unit. The logic unit is configured to read and write data from the plurality of memory cells via the second data path, and configured to perform logic operations on data stored in the plurality of memory cells. When performing read and write operations, the first data path excludes the logic unit, and the second data path includes the logic unit. Furthermore, the logic unit is communicatively coupled between the interface device and the plurality of memory cells. Additionally, a method for manufacturing the memory device is provided.

    摘要翻译: 涉及包括多个存储器单元的存储设备的方法和设备,接口设备,被配置为将存储设备连接到主机系统,并且被配置为经由第一个存储器单元将数据从主机系统读取和写入到存储器单元 和第二数据路径,以及逻辑单元。 逻辑单元被配置为经由第二数据路径从多个存储器单元读取和写入数据,并且被配置为对存储在多个存储器单元中的数据执行逻辑运算。 当执行读和写操作时,第一数据路径排除逻辑单元,第二数据路径包括逻辑单元。 此外,逻辑单元通信地耦合在接口设备和多个存储器单元之间。 另外,提供了一种用于制造存储器件的方法。