公开(公告)号：US4077111A

公开(公告)日：1978-03-07

申请号：US705322

申请日：1976-07-14

申请人： Michael C. Driver ,  He B. Kim

发明人： Michael C. Driver ,  He B. Kim

IPC分类号： H01L29/80 ,  H01L21/285 ,  H01L21/306 ,  H01L21/338 ,  H01L29/812 ,  B01J17/00

CPC分类号： H01L29/66863 ,  H01L21/30612 ,  H01L29/812 ,  Y10S148/143

摘要： A self-aligned gate field effect transistor is described which is capable of operating at high frequencies. A method for making the transistor is described which comprises plating metal partially over an oxide layer, then removing the oxide to produce an overlapping metal portion and then plating again to produce a gate contact between the overlapping metal portions.

摘要翻译： 描述了能够以高频率操作的自对准栅极场效应晶体管。 描述了制造晶体管的方法，其包括将金属部分地覆盖在氧化物层上，然后去除氧化物以产生重叠的金属部分，然后再次电镀以在重叠的金属部分之间产生栅极接触。

公开(公告)号：US3943622A

公开(公告)日：1976-03-16

申请号：US517284

申请日：1974-10-22

申请人： He B. Kim ,  Michael C. Driver

发明人： He B. Kim ,  Michael C. Driver

IPC分类号： H01L21/00 ,  H01L21/24 ,  H01L29/00 ,  H01L29/812 ,  H01L21/205 ,  H01L21/28 ,  H01L29/48

CPC分类号： H01L29/00 ,  H01L21/00 ,  H01L21/24 ,  H01L29/812 ,  Y10S148/026 ,  Y10S148/115 ,  Y10S148/139 ,  Y10S438/944

摘要： A semiconductor device and particularly a self-aligned Schottky barrier gate field-effect transistor is made by epitaxial growth of facets corresponding to the source and drain regions on a surface of a semiconductor body through spaced apart preferably elongated windows in a masking layer and overgrowing edge portions of the masking layer at the windows to form overgrown portions on the facets. The channel region of the transistor is previously formed in the semiconductor body, preferably by epitaxial growth of a layer on a surface of a semiconductor body having a semi-insulating layer adjoining the surface. After removal of the masking layer, the Schottky barrier gate is self-aligned by deposition of metal on the unshielded portions of the planar surface between the facets.

摘要翻译： 半导体器件，特别是自对准肖特基势垒栅场效应晶体管是通过在半导体主体的表面上对应于源极和漏极区域的面的外延生长而通过在掩模层中的间隔开的优选细长的窗口和过度生长边缘 在窗口处的掩模层的部分在小平面上形成长满的部分。 晶体管的沟道区预先形成在半导体本体中，优选地通过在邻接表面的半绝缘层的半导体本体的表面上外延生长层。 在去除掩模层之后，肖特基势垒栅极通过在面之间的平坦表面的非屏蔽部分上沉积金属而自对准。

公开(公告)号：US4494997A

公开(公告)日：1985-01-22

申请号：US504568

申请日：1983-06-15

申请人： Zachary J. Lemnios ,  He B. Kim

发明人： Zachary J. Lemnios ,  He B. Kim

IPC分类号： H01L21/265 ,  H01L21/266 ,  H01L21/314 ,  H01L21/324

CPC分类号： H01L21/266 ,  H01L21/2654 ,  H01L21/26546 ,  H01L21/26553 ,  H01L21/314 ,  H01L21/3245

摘要： A mask and encapsulating layer suitable for use on gallium arsenide substrates is described incorporating a layer of germanium selenide which is photosensitive and may be exposed and developed to form a mask suitable for ion implantation and which may also remain as a capping layer during an anneal process of ion implanted regions in a controlled atmosphere and temperature furnace wherein the layer of germanium selenide is converted to germanium which may subsequently be removed from the gallium arsenide substrate after the step of annealing.

摘要翻译： 描述了适用于砷化镓衬底的掩模和封装层，其包括光敏的硒化锗层，并且可以被曝光和显影以形成适于离子注入的掩模，并且还可以在退火过程期间保持为封盖层 的离子注入区域在受控的气氛和温度炉中，其中硒化锗层被转化为锗，其可以在退火步骤之后随后从砷化镓衬底去除。