利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

430 条记录 (耗时 0.041 秒)

    Semaphore enhancement to allow bank selection of a shared resource memory device
    1.
    发明授权
    Semaphore enhancement to allow bank selection of a shared resource memory device 失效
    信号量增强，允许银行选择共享资源存储设备

    公开(公告)号：US6108756A

    公开(公告)日：2000-08-22

    申请号：US785662

    申请日：1997-01-17

    申请人： Michael Miller ,  John Mick ,  Jeff Smith ,  Mark Baumann

    发明人： Michael Miller ,  John Mick ,  Jeff Smith ,  Mark Baumann

    IPC分类号： G06F9/46 ,  G06F12/02

    CPC分类号： G06F9/52

    摘要： A memory device (201) having left (203) and right (204) ports for communicating with left (205) and right (206) electronic devices, includes memory banks (401-0.about.401-7), semaphore logic (302), and port coupling circuitry (403, 404, 405-0.about.405-7, 406-0.about.406-7, 407-0.about.407-7). The semaphore logic generates bank access grant signals (313, 314) on a first received basis in response to bank access requests from the left and right electronic devices, and the port coupling circuitry couples selected memory banks to the left and right ports in response to the bank access grant signals. Also included in the memory device are mail-box registers (2500-0L.about.2500-3L, 2500-0R.about.2500-3R), interrupt generating circuitry (2514-0L.about.2514-3L, 2514-0R.about.2514-3R, 2900, 3000, 307, 308), and interrupt status and cause registers (3101L.about.3102L, 3101R.about.3102R, 3301L.about.3302L, 3301R.about.3302R). The left and right electronic devices use the mail-box registers to send messages to each other without waiting. The interrupt generating circuitry generates interrupts to notify the left and right electronic devices when their bank access requests have been granted, and when a message has been written into one of the mail-box registers for them. The interrupt status and cause registers provide information as to which memory banks the left and right electronic devices have been granted access to, and which mail-box registers contain messages for them.

    摘要翻译： 具有用于与左（205）和右（206）电子设备进行通信的左（203）和右（204）端口的存储设备（201）包括存储体（401-0差分401-7），信号量逻辑（302） ，以及端口耦合电路（403,404,405-0，差异405-7,406-0，差异406-7,407-0，差异407-7）。 信号量逻辑响应于来自左和右电子设备的存储体访问请求而在第一接收的基础上产生存储体存取授权信号（313,314），并且端口耦合电路响应于所选择的存储体耦合到左端口和右端口 银行存取授权信号。 存储设备中还包括邮箱寄存器（2500-0L DIFFERENCE 2500-3L，2500-0R差分2500-3R），中断产生电路（2514-0L差分2514-3L，2514-0R差分2514-3R，2900 ，3000,307,308）以及中断状态和原因寄存器（3101L差分3102L，3101R差分3102R，3301L差分3302L，3301R差分3302R）。 左右电子设备使用邮箱寄存器相互发送消息，无需等待。 中断产生电路产生中断以在其银行访问请求被授予时通知左和右电子设备，并且当消息已被写入其中一个邮箱寄存器时。 中断状态和原因寄存器提供关于左和右电子设备被授权访问哪些存储器的信息，哪些邮箱寄存器包含用于它们的消息。

    Multi-ported memory architecture using single-ported RAM
    2.
    发明授权
    Multi-ported memory architecture using single-ported RAM 失效
    使用单端口RAM的多端口存储器架构

    公开(公告)号：US06212607B1

    公开(公告)日：2001-04-03

    申请号：US08783923

    申请日：1997-01-17

    申请人： Michael Miller ,  John Mick ,  Jeff Smith ,  Mark Baumann ,  Chris Schott

    发明人： Michael Miller ,  John Mick ,  Jeff Smith ,  Mark Baumann ,  Chris Schott

    IPC分类号： G06F1200

    CPC分类号： G11C7/1075 ,  G11C2207/104

    摘要： A memory device (201) having left (203) and right (204) ports for communicating with left (205) and right (206) electronic devices, includes memory banks (401-0˜401-7), semaphore logic (302), and port coupling circuitry (403, 404, 405-0˜405-7, 406-0˜406-7, 407-0˜407-7). The semaphore logic generates bank access grant signals (313, 314) on a first received basis in response to bank access requests from the left and right electronic devices, and the port coupling circuitry couples selected memory banks to the left and right ports in response to the bank access grant signals. Also included in the memory device are mail-box registers (2500-0L˜2500-3L, 2500-0R˜2500-3R), interrupt generating circuitry (2514-0L˜2514-3L, 2514-0R˜2514-3R, 2900, 3000, 307, 308), and interrupt status and cause registers (3101L˜3102L, 3101R˜3102R, 3301L˜3302L, 3301R˜3302R). The left and right electronic devices use the mail-box registers to send messages to each other without waiting. The interrupt generating circuitry generates interrupts to notify the left and right electronic devices when their bank access requests have been granted, and when a message has been written into one of the mail-box registers for them. The interrupt status and cause registers provide information as to which memory banks the left and right electronic devices have been granted access to, and which mail-box registers contain messages for them.

    摘要翻译： 具有用于与左（205）和右（206）电子设备通信的左（203）和右（204）端口的存储设备（201）包括存储体（401-0〜401-7），信号量逻辑（302） ，和端口耦合电路（403,404,405-0〜405-7,406-0〜406-7,407-0〜407-7）。 信号量逻辑响应于来自左和右电子设备的存储体访问请求而在第一接收的基础上产生存储体存取授权信号（313,314），并且端口耦合电路响应于所选择的存储体耦合到左端口和右端口 银行存取授权信号。 内存中还包括邮箱寄存器（2500-0L〜2500-3L，2500-0R〜2500-3R），中断发生电路（2514-0L〜2514-3L，2514-0R〜2514-3R，2900 ，3000,307,308），以及中断状态和原因寄存器（3101L〜3102L，3101R〜3102R，3301L〜3302L，3301R〜3302R）。 左右电子设备使用邮箱寄存器相互发送消息，无需等待。 中断产生电路产生中断以在其银行访问请求被授予时通知左和右电子设备，并且当消息已被写入其中一个邮箱寄存器时。 中断状态和原因寄存器提供关于左和右电子设备被授权访问哪些存储器的信息，哪些邮箱寄存器包含用于它们的消息。

    Mail-box design for non-blocking communication across ports of a multi-port device
    3.
    发明授权
    Mail-box design for non-blocking communication across ports of a multi-port device 失效
    用于多端口设备端口之间的非阻塞通信的邮箱设计

    公开(公告)号：US5751638A

    公开(公告)日：1998-05-12

    申请号：US786401

    申请日：1997-01-17

    申请人： John Mick ,  Michael Miller ,  Jeff Smith ,  Mark Baumann

    发明人： John Mick ,  Michael Miller ,  Jeff Smith ,  Mark Baumann

    IPC分类号： G06F5/10 ,  G06F9/46 ,  G11C8/16 ,  G11C13/00

    CPC分类号： G06F5/10 ,  G06F9/52 ,  G11C8/16

    摘要： A memory device (201) having left (203) and right (204) ports for communicating with left (205) and right (206) electronic devices, includes memory banks (401-0.about.401-7), semaphore logic (302), and port coupling circuitry (403, 404, 405-0.about.405-7, 406-0.about.406-7, 407-0.about.407-7). The semaphore logic generates bank access grant signals (313, 314) on a first received basis in response to bank access requests from the left and right electronic devices, and the port coupling circuitry couples selected memory banks to the left and right ports in response to the bank access grant signals. Also included in the memory device are mail-box registers (2500-0L.about.2500-3L, 2500-0R.about.2500-3R), interrupt generating circuitry (2514-0L.about.2514-3L, 2514-0R.about.2514-3R, 2900, 3000, 307, 308), and interrupt status and cause registers (3101L.about.3102L, 3101R.about.3102R, 3301L.about.3302L, 3301R.about.3302R). The left and right electronic devices use the mail-box registers to send messages to each other without waiting. The interrupt generating circuitry generates interrupts to notify the left and right electronic devices when their bank access requests have been granted, and when a message has been written into one of the mail-box registers for them. The interrupt status and cause registers provide information as to which memory banks the left and right electronic devices have been granted access to, and which mail-box registers contain messages for them.

    摘要翻译： 具有用于与左（205）和右（206）电子设备进行通信的左（203）和右（204）端口的存储设备（201）包括存储体（401-0差分401-7），信号量逻辑（302） ，以及端口耦合电路（403,404,405-0，差异405-7,406-0，差异406-7,407-0，差异407-7）。 信号量逻辑响应于来自左和右电子设备的存储体访问请求而在第一接收的基础上产生存储体存取授权信号（313,314），并且端口耦合电路响应于所选择的存储体耦合到左端口和右端口 银行存取授权信号。 存储设备中还包括邮箱寄存器（2500-0L DIFFERENCE 2500-3L，2500-0R差分2500-3R），中断产生电路（2514-0L差分2514-3L，2514-0R差分2514-3R，2900 ，3000,307,308）以及中断状态和原因寄存器（3101L差分3102L，3101R差分3102R，3301L差分3302L，3301R差分3302R）。 左右电子设备使用邮箱寄存器相互发送消息，无需等待。 中断产生电路产生中断以在其银行访问请求被授予时通知左和右电子设备，并且当消息已被写入其中一个邮箱寄存器时。 中断状态和原因寄存器提供关于左和右电子设备被授权访问哪些存储器的信息，哪些邮箱寄存器包含用于它们的消息。

    Content addressable memory (CAM) devices having soft priority resolution circuits therein and methods of operating same
    4.
    发明授权
    Content addressable memory (CAM) devices having soft priority resolution circuits therein and methods of operating same 失效
    具有软优先级分辨率电路的内容可寻址存储器（CAM）设备及其操作方法

    公开(公告)号：US07669005B1

    公开(公告)日：2010-02-23

    申请号：US10613542

    申请日：2003-07-03

    申请人： Kee Park ,  Robert J. Proebsting ,  Scott Yu-Fan Chu ,  Michael Miller ,  Mark Baumann

    发明人： Kee Park ,  Robert J. Proebsting ,  Scott Yu-Fan Chu ,  Michael Miller ,  Mark Baumann

    IPC分类号： G06F12/00

    CPC分类号： G11C15/00 ,  H04L45/742

    摘要： Content addressable memory (CAM) devices use both hard and soft priority techniques to allocate entries of different priority therein. The priorities of multiple CAM array blocks within the CAM device may be programmed before or as entries are loaded therein and may be reprogrammed during operation as the allocation of entries within the CAM device changes. The allocation of entries may change in response to additions or deletions of entries or as entries are reprioritized. The CAM devices include preferred priority resolution circuits that can resolve competing soft and hard priorities between multiple hit signals that are generated in response to a search operation. Such hit signals may be active to reflect the presence of at least one matching entry within a CAM array block. The resolution of which active hit signal has the highest overall priority among many can be used to facilitate the identification of the location (e.g., array address and row address) of a highest priority matching entry within the entire CAM device. A priority resolution circuit may also resolve competing hard priorities between two or more active hit signals having equivalent soft priority. This aspect of the priority resolution circuit is provided so that an active hit signal having a highest overall priority can be resolved whenever multiple CAM array blocks having the same soft priority are detected as having matching entries therein during a search operation.

    摘要翻译： 内容可寻址存储器（CAM）设备使用硬和软优先级技术来分配不同优先级的条目。 CAM设备内的多个CAM阵列块的优先级可以在条目加载之前被编程，也可以在操作期间被重新编程，因为CAM设备内的条目的分配改变。 条目的分配可能会随着条目的添加或删除而变化，或者条目被重新设定为优先级。 CAM设备包括优选的优先级分辨率电路，其可以解决响应于搜索操作而产生的多个命中信号之间的竞争的软和硬优先级。 这种命中信号可以是有效的，以反映CAM阵列块内至少一个匹配条目的存在。 可以使用哪个主动命中信号具有最高总体优先级的分辨率在许多之中，以便于识别整个CAM设备内的最高优先级匹配条目的位置（例如，阵列地址和行地址）。 优先级分辨率电路还可以解决具有相同软优先级的两个或更多个激活命中信号之间的竞争硬优先级。 提供优先级分辨率电路的这个方面，使得每当具有相同软优先级的每个CAM阵列块在搜索操作期间被检测为具有匹配条目时，可以解决具有最高总优先级的主动命中信号。

    Floatation device for vessel
    5.
    外观设计
    Floatation device for vessel 有权

    公开(公告)号：USD1036354S1

    公开(公告)日：2024-07-23

    申请号：US29919054

    申请日：2023-12-01

    申请人： Michael Miller

    设计人： Michael Miller

    摘要： FIG. 1 is a perspective view of a floating device for a vessel;
    FIG. 2 is a front view of the floatation device for vessel of FIG. 1;
    FIG. 3 is a back view of the floatation device for vessel of FIG. 1;
    FIG. 4 is a first side view of the floatation device for vessel of FIG. 1;
    FIG. 5 is a second side view of the floatation device for vessel of FIG. 1;
    FIG. 6 is a top view of the floatation device for vessel of FIG. 1; and,
    FIG. 7 is a bottom view of the floatation device for vessel of FIG. 1.
    The broken lines shown are included for the purpose of illustrating portions of the article which form no part of the claimed design.

    Spherical magnet
    8.
    发明授权
    Spherical magnet 有权
    球形磁铁

    公开(公告)号：US08791781B2

    公开(公告)日：2014-07-29

    申请号：US13781019

    申请日：2013-02-28

    申请人： Michael Miller

    发明人： Michael Miller

    IPC分类号： H01F7/02

    CPC分类号： H01F7/02 ,  F01K25/10 ,  F01K27/00 ,  H01F7/0221

    摘要： A spherical magnet is formed as a hollow sphere having a fluid tight outer surface of a first magnetic pole and an inner surface having a second magnetic pole that is magnetically opposite the first pole. A plurality of individual thin flexible rectangular plate magnets are arranged as a continuous outer layer of the spherical magnet. Each individual plate magnet has four sides, an inner magnetic portion and an outer non-magnetic portion that extends around all four sides of the magnetic portion. Each inner magnetic portion includes a first face disposed on the outer surface and having the first pole and a second face opposite the first face, disposed on the inner surface and having the second pole.

    摘要翻译： 形成具有第一磁极的流体密封外表面的空心球体和具有与第一极磁性相对的第二磁极的内表面的球形磁体。 多个单独的薄柔性矩形板磁体被布置为球形磁体的连续外层。 每个单独的板状磁体具有四个侧面，内部磁性部分和外部非磁性部分，其围绕磁性部分的所有四个侧面延伸。 每个内磁性部分包括设置在外表面上并且具有第一极和与第一面相对的第二面的第一面，设置在内表面上并具有第二极。

    Bone Dowel
    9.
    发明申请
    Bone Dowel 审中-公开
    骨Dow

    公开(公告)号：US20130289629A1

    公开(公告)日：2013-10-31

    申请号：US13458622

    申请日：2012-04-27

    申请人： Michael Miller

    发明人： Michael Miller

    IPC分类号： A61B17/84

    CPC分类号： A61B17/68 ,  A61B17/685 ,  A61B17/846

    摘要： A bone dowel is disclosed that may be used for connecting two or more bone components. The bone dowel may have three dowel sections positioned between a base and a tip with a conical upper section. Each bone dowel section may be positioned in axial alignment adjacent at least one other bone dowel section wherein the diameters decrease over the length of the bone dowel from the base to the tip.

    摘要翻译： 公开了可用于连接两个或更多个骨组件的骨榫。 骨榫可以具有定位在基部和具有锥形上部的尖端之间的三个定位销部分。 每个骨榫部分可以邻近至少一个另外的骨榫部分定位成轴向对准，其中直径从骨榫的长度减小到从基部到尖端。

    Dilator Centering Device And Assemblies
    10.
    发明申请
    Dilator Centering Device And Assemblies 有权
    膨胀机定心装置和组件

    公开(公告)号：US20130253563A1

    公开(公告)日：2013-09-26

    申请号：US13428901

    申请日：2012-03-23

    申请人： Mark Eberhardt ,  Hiroyoshi Ise ,  George Stern ,  Michael Miller ,  Yasutake Yamada ,  Husexin Fertac Bilge

    发明人： Mark Eberhardt ,  Hiroyoshi Ise ,  George Stern ,  Michael Miller ,  Yasutake Yamada ,  Husexin Fertac Bilge

    IPC分类号： A61M29/00

    CPC分类号： A61M25/0097 ,  A61M25/01 ,  A61M29/00 ,  A61M39/22

    摘要： The present technology is directed to a dilator centering device and assemblies and methods using same. In particular, a dilator centering device in accordance with the disclosed technology can be used with a sheath hub assembly. In one embodiment, a dilator centering device includes a lumen capable of receiving a dilator shaft and centering a dilator shaft with respect to the sheath hub as the dilator shaft enters the sheath hub. In one embodiment, the dilator centering device can be attached to the sheath hub during manufacturing or it can be attached at the use site. In one embodiment, the dilator centering device can be integrated with and non-removable from the sheath hub. The embodiments disclosed herein are illustrative and do not limit the scope and spirit of the disclosed technology.

    摘要翻译： 本技术涉及一种扩张器定中心装置及使用其的装配和方法。 特别地，根据所公开的技术的扩张器定心装置可以与护套轮毂组件一起使用。 在一个实施例中，扩张器定心装置包括能够接收扩张器轴并且当扩张器轴进入护套中心时使扩张器轴相对于护套毂居中的内腔。 在一个实施例中，扩张器定心装置可以在制造期间附接到护套，或者可以在使用场所附接。 在一个实施例中，扩张器定心装置可以与鞘毂集成在一起并且不可移除。 本文公开的实施例是说明性的，并不限制所公开技术的范围和精神。