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1.发明授权Method and system for propagating exception status in data registers and for detecting exceptions from speculative operations with non-speculative operations 失效在数据寄存器中传播异常状态的方法和系统，以及用非投机操作检测投机操作的异常
公开(公告)号：US5778219A
公开(公告)日：1998-07-07
申请号：US597784
申请日：1996-02-07
申请人： Frederic C. Amerson , Rajiv Gupta , Vinod K. Kathail , B. Ramakrishna Rau , Michael S. Schlansker , William S. Worley, Jr.
发明人： Frederic C. Amerson , Rajiv Gupta , Vinod K. Kathail , B. Ramakrishna Rau , Michael S. Schlansker , William S. Worley, Jr.
CPC分类号： G06F9/3865 , G06F9/30072 , G06F9/30181 , G06F9/3842 , G06F9/3863
摘要： A method for supporting speculative execution includes designating operations as speculative or non-speculative, and then deferring exceptions generated by speculative operations while immediately reporting exceptions by non-speculative operations. If a speculative operation uses a result of a speculative operation that has generated an exception, the exception is propagated. Deferred exceptions are detected and reported using a check operation either incorporated into a non-speculative operation or inserted as a separate check operation. A system for supporting speculative execution includes a functional unit for recognizing a speculative operation and deferring any exceptions generated by such an operation. The functional unit may defer an exception by storing information indicating an error has occurred in the register file. To check for deferred exceptions, the functional unit then reads the register file. If an exception is detected, then the exception is processed and one or more of the speculative operation are re-executed (in a non-speculative mode) where necessary to process the exception.
摘要翻译： 支持投机执行的方法包括将操作指定为投机或非投机性，然后推迟由投机操作产生的异常，同时立即通过非投机操作报告异常。 如果推测操作使用产生异常的推测操作的结果，则会传播该异常。 使用检查操作检测和报告延期异常，并将其合并到非推测操作中或作为单独检查操作插入。 用于支持推测执行的系统包括用于识别投机操作并推迟由这种操作产生的任何异常的功能单元。 功能单元可以通过存储指示在寄存器文件中发生错误的信息来延迟异常。 要检查延迟异常，功能单元然后读取寄存器文件。 如果检测到异常，则处理异常，并且在需要处理异常的情况下重新执行一个或多个推测操作（以非推测模式）。
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2.发明授权Method and system for deferring exceptions generated during speculative execution 失效用于推迟在投机执行期间产生的异常的方法和系统
公开(公告)号：US5692169A
公开(公告)日：1997-11-25
申请号：US324940
申请日：1994-10-18
申请人： Vinod K. Kathail , Rajiv Gupta , Bantwal R. Rau , Michael S. Schlansker , William S. Worley, Jr. , Frederic C. Amerson
发明人： Vinod K. Kathail , Rajiv Gupta , Bantwal R. Rau , Michael S. Schlansker , William S. Worley, Jr. , Frederic C. Amerson
CPC分类号： G06F9/3865 , G06F9/30072 , G06F9/30181 , G06F9/30189 , G06F9/3842
摘要： A method for supporting speculative execution includes designating operations as speculative or non-speculative, and then deferring exceptions generated by speculative operations while immediately reporting exceptions by non-speculative operations. If a speculative operation uses a result of a speculative operation that has generated an exception, the exception is propagated. Deferred exceptions are detected and reported using a check operation either incorporated into a non-speculative operation or inserted as a separate check operation. A system for supporting speculative execution includes a functional unit for recognizing a speculative operation and deferring any exceptions generated by such an operation. The functional unit may defer an exception by storing information indicating an error has occurred in the register file. To check for deferred exceptions, the functional unit then reads the register file.
摘要翻译： 支持投机执行的方法包括将操作指定为投机或非投机性，然后推迟由投机操作产生的异常，同时立即通过非投机操作报告异常。 如果推测操作使用产生异常的推测操作的结果，则会传播该异常。 使用检查操作检测和报告延期异常，并将其合并到非推测操作中或作为单独检查操作插入。 用于支持推测执行的系统包括用于识别投机操作并推迟由这种操作产生的任何异常的功能单元。 功能单元可以通过存储指示在寄存器文件中发生错误的信息来延迟异常。 要检查延迟异常，功能单元然后读取寄存器文件。
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3.发明授权Memory processor that prevents errors when load instructions are moved in the execution sequence 失效内存处理器可以在执行顺序中移动加载指令时防止错误
公开(公告)号：US5475823A
公开(公告)日：1995-12-12
申请号：US261647
申请日：1994-06-17
CPC分类号： G06F9/30043 , G06F9/3834
摘要： A memory processor which prevents errors when the compiler advances long latency load instructions in the instruction sequence to reduce the loss of efficiency resulting from the latency time. The memory processor intercepts all load and store instructions prior to the instructions entering the memory pipeline. The memory processor stores load instructions for a period of time sufficient to determine if any subsequent store instruction that would have been executed prior to the load instruction, had the load instruction not been moved, references the same address as that specified in the load instruction. If a store instruction references the load instruction address, the invention returns the same data as the load instruction would have if it was not moved by the compiler.
摘要翻译： 一种存储器处理器，当编译器在指令序列中前进长延迟加载指令时，可以防止错误，以减少延迟时间导致的效率损失。 存储器处理器在指令进入存储器管线之前拦截所有的加载和存储指令。 存储器处理器将加载指令存储一段时间，足以确定在加载指令之前已经执行的加载指令是否有任何后续存储指令，如果加载指令未被移动，则引用与加载指令中指定的地址相同的地址。 如果存储指令引用加载指令地址，则本发明返回与加载指令不被编译器移动的数据相同的数据。
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公开(公告)号：US5404484A
公开(公告)日：1995-04-04
申请号：US945561
申请日：1992-09-16
CPC分类号： G06F9/30047 , G06F12/0862 , G06F12/0888 , G06F9/383 , G06F2212/6022 , G06F2212/6028
摘要： The improved cache system reduces the effects of latency times by utilizing a preload instruction inserted by the compiler into the code. The preload instruction is sent sufficiently in advance of the corresponding load instruction to guarantee that the relevant data is in the cache memory when the load instruction is received. In addition, the invention prevents the pollution of the cache with data that will only be used once during the expected lifetime of the data in the cache. This second feature of the invention assures that a large number of references to data that will only be used once does not result in the contents of the cache being replaced with the subsequent need to reload the contents after the data references have been completed.
摘要翻译： 改进的缓存系统通过利用编译器插入到代码中的预加载指令来减少延迟时间的影响。 预加载指令在相应的加载指令之前被充分发送，以便在接收到加载指令时保证相关数据在高速缓冲存储器中。 此外，本发明通过在高速缓存中的数据的期望寿命期间仅使用一次的数据来防止高速缓存的污染。 本发明的第二个特征确保了大量仅仅使用一次的数据的引用不会导致高速缓存的内容被替换为在数据引用完成之后随后需要重新加载内容。
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5.发明授权
公开(公告)号：US5615386A
公开(公告)日：1997-03-25
申请号：US588151
申请日：1996-01-18
申请人： Frederic C. Amerson , Rajiv Gupta , Balasubramanian Kumar , Michael S. Schlansker , William S. Worley
发明人： Frederic C. Amerson , Rajiv Gupta , Balasubramanian Kumar , Michael S. Schlansker , William S. Worley
CPC分类号： G06F9/3806 , G06F9/30058 , G06F9/3844
摘要： An improved data processing system for executing branch instructions which has lower latency times and which only rarely requires the instruction pipeline to be flushed is disclosed. The data processing system utilizes a register file to hold the information needed to execute a branch instruction. The information is loaded into the register file in advance of the branch instruction. This allows the system to prepare more than one branch instruction at any given time. The present invention may be used to cause the cache line containing the target address of the branch instruction to be loaded soon as the target address is available for the branch instruction. Since the outcome of the branch instruction is almost always known when the branch instruction enters the instruction pipeline, the instruction pipeline only rarely needs to be flushed.
摘要翻译： 公开了一种用于执行具有较低等待时间并且很少需要刷新指令流水线的分支指令的改进的数据处理系统。 数据处理系统利用寄存器文件来保存执行分支指令所需的信息。 信息在分支指令之前被加载到寄存器文件中。 这允许系统在任何给定时间准备多个分支指令。 本发明可以用于使得包含分支指令的目标地址的高速缓存线在目标地址对于分支指令可用时很快被加载。 由于分支指令的结果在分支指令进入指令流水线时几乎总是被知道，所以指令流水线很少需要刷新。
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6.发明授权Method and apparatus for enabling a computer system to adjust for latency assumptions 失效使计算机系统能够调整等待时间假设的方法和装置
公开(公告)号：US5710912A
公开(公告)日：1998-01-20
申请号：US059041
申请日：1993-05-06
CPC分类号： G06F9/3836 , G06F9/3838 , G06F9/3869
摘要： A method and system are disclosed which allow a computer program to execute properly in object code compatible processing systems which have latencies different from those with which the program was created or compiled. This resulting compatibility of the computer program is achieved because the invention protects the precedence of operations within the computer program using latency assumptions which were used when creating the computer program. When the computer program is created, latency assumption information is efficiently provided within the computer program. Thereafter, when the computer program is executed, it is able to advise the processing system of the latency assumptions with which it was created. Various ways are described in which the processing system can utilize the latency assumptions when executing the computer program so as to ensure compatibility.
摘要翻译： 公开了一种方法和系统，其允许计算机程序在目标代码兼容的处理系统中正确地执行，该处理系统的延迟与程序被创建或编译的时间不同。 实现计算机程序的这种兼容性是因为本发明使用在创建计算机程序时使用的延迟假设来保护计算机程序内的操作的优先级。 当创建计算机程序时，计算机程序内有效地提供延迟假设信息。 此后，当执行计算机程序时，能够向处理系统通知其创建的延迟假设。 描述了各种方式，其中处理系统可以在执行计算机程序时利用延迟假设，以确保兼容性。
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7.发明授权High definition scintillation detector for medicine, homeland security and non-destructive evaluation 有权高清晰度闪烁检测仪，用于医药，国土安全和无损评估公开(公告)号：US08477906B2
公开(公告)日：2013-07-02
申请号：US12529867
申请日：2008-03-05
摘要： A bundle of drawn fibers that have X-ray scintillating unagglommerated nanocrystallite particles in plastic or glass cores of down to 0.1 micron spacing and claddings of X-ray absorbing compounds in the cladding composition. Optional is a cover to the bundle that blocks light from leaving the bundle at the X-ray side while allowing X-rays to pass into the cores. To image the light exiting the fiber bundle at the sub-micron level, light expansion is preferable using either a lens system or a fiber bundle expander.
摘要翻译： 一束拉伸纤维，其在包层组合物中具有低至0.1微米间距的塑料或玻璃芯中具有X射线闪烁的未散射的纳米晶粒和X射线吸收化合物的包层。 可选的是捆绑的封面，阻止光线在X射线侧离开束，同时允许X射线进入核心。 为了在亚微米级别对离开纤维束的光进行成像，使用透镜系统或纤维束扩张器优选进行光膨胀。
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公开(公告)号：US08171266B2
公开(公告)日：2012-05-01
申请号：US09922551
申请日：2001-08-02
申请人： Alan H. Karp , Rajiv Gupta
发明人： Alan H. Karp , Rajiv Gupta
IPC分类号： G06F12/00
CPC分类号： G06F9/3842 , G06F9/383
摘要： A method for look-ahead load pre-fetching that reduces the effects of instruction stalls caused by high latency instructions. Look-ahead load pre-fetching is accomplished by searching an instruction stream for load memory instructions while the instruction stream is stalled waiting for completion of a previous instruction in the instruction stream. A pre-fetch operation is issued for each load memory instruction found. The pre-fetch operations cause data for the corresponding load memory instructions to be copied to a cache, thereby avoiding long latencies in the subsequent execution of the load memory instructions.
摘要翻译： 一种用于预先加载预取的方法，可减少由高延迟指令引起的指令停顿的影响。 通过在指令流停止等待指令流中的先前指令的完成的情况下，通过搜索指令流来执行加载存储器指令来实现预先加载预取。 为发现的每个加载存储器指令发出预取操作。 预取操作导致相应的加载存储器指令的数据被复制到高速缓存，从而避免后续执行加载存储器指令的长时间延迟。
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公开(公告)号：US08010991B2
公开(公告)日：2011-08-30
申请号：US12018103
申请日：2008-01-22
申请人： Sekhar Sarukkai , Rajiv Gupta , Raghavendra Prasad
发明人： Sekhar Sarukkai , Rajiv Gupta , Raghavendra Prasad
CPC分类号： G06F21/6218 , G06F21/6236 , H04L63/10 , H04L63/20
摘要： An externalized entitlement management system comprises a policy administration point that is configured to receive one or more definitions or updates of entitlement policies specifying subjects, actions, and resources, and to update a first entitlement repository coupled to the policy administration point with the definitions or updates in response to receiving the definitions or updates; one or more policy decision points that are coupled to the policy administration point over a network; one or more policy enforcement points that are integrated into one or more respective first application programs, wherein each of the policy enforcement points is coupled to one of the policy decision points; and one or more action handlers in the policy administration point, wherein each of the action handlers is configured to intercept a particular action represented in an update to an entitlement policy, to transform the action into an entitlement update in a form compatible with a native entitlement mechanism of a second application program that does not have one of the policy enforcement points, to send the transformed entitlement update to the second application program, and to cause a rollback of the update of the first entitlement repository if the second application program fails to implement the entitlement update in the native entitlement mechanism.
摘要翻译： 外部化权利管理系统包括被配置为接收指定主题，动作和资源的授权策略的一个或多个定义或更新的策略管理点，并且利用定义或更新来更新耦合到策略管理点的第一授权存储库 响应于接收定义或更新; 通过网络耦合到策略管理点的一个或多个策略决策点; 一个或多个策略执行点被集成到一个或多个相应的第一应用程序中，其中每个策略执行点被耦合到策略决策点之一; 以及策略管理点中的一个或多个动作处理程序，其中每个动作处理程序被配置为拦截在授权策略的更新中表示的特定动作，以将操作转换为与本机授权相兼容的形式的授权更新 第二应用程序的机制，其不具有策略执行点之一，将转换的授权更新发送到第二应用程序，并且如果第二应用程序未能实现，则导致第一授权库的更新的回滚 本机授权机制中的权利更新。
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10.发明授权Method and apparatus for characterizing the temporal resolution of an imaging device 有权用于表征成像装置的时间分辨率的方法和装置公开(公告)号：US07863897B2
公开(公告)日：2011-01-04
申请号：US12206279
申请日：2008-09-08
IPC分类号： G01V3/00
摘要： A system and method for determining the temporal resolution of a tomographic imaging device uses an apparatus to drive one or more dynamic phantoms composed of multiple materials. The apparatus is placed at or near the isocenter of the imaging device and the one or more phantoms are moved to produce a plurality of dynamic features, each having a specified frequency. The dynamic features are imaged with the device and the acquired image data corresponding to the dynamic features is analyzed to determine a temporal modulation transfer value at each of the known specified frequencies. The temporal resolution of the imaging device is determined using these temporal modulation transfer values.
摘要翻译： 用于确定层析成像装置的时间分辨率的系统和方法使用装置来驱动由多种材料组成的一个或多个动态幻影。 该装置放置在成像装置的等角点处或附近，并且移动一个或多个幻影以产生多个具有指定频率的动态特征。 利用设备对动态特征进行成像，并分析对应于动态特征的获取的图像数据，以确定每个已知指定频率处的时间调制转移值。 使用这些时间调制转移值来确定成像装置的时间分辨率。
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