公开(公告)号：US11056571B2

公开(公告)日：2021-07-06

申请号：US16444532

申请日：2019-06-18

Applicant: Micron Technology, Inc.

Inventor： Ankit Sharma ,  Akira Goda

IPC: H01L29/51 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/66

Abstract: A memory cell comprises, in the following order, channel material, a charge-passage structure, programmable material, a charge-blocking region, and a control gate. The charge-passage structure comprises a first material closest to the channel material, a third material furthest from the channel material, and a second material between the first material and the third material. The first and third materials comprise SiO2. The second material has a thickness of 0.4 nanometer to 5.0 nanometers and comprises SiOx, where “x” is less than 2.0 and greater than 0. Other embodiments are disclosed.

公开(公告)号：US11848060B2

公开(公告)日：2023-12-19

申请号：US18107200

申请日：2023-02-08

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Ankit Sharma

IPC: G11C16/04 ,  G11C16/34 ,  G11C16/10 ,  G11C11/56

CPC classification number: G11C16/3459 ,  G11C16/0483 ,  G11C16/10 ,  G11C11/5628 ,  G11C11/5671

Abstract: Memory devices might include an array of memory cells and a controller configured to access the array of memory cells. The controller may sense a first threshold voltage of the selected memory cell. In response to the sensed first threshold voltage being between a first pre-program verify level and a first program verify level, the controller may bias the selected memory cell to a first voltage level. The first pre-program verify level might be less than a final pre-program verify level and the first program verify level might be less than a final program verify level.

公开(公告)号：US20220208288A1

公开(公告)日：2022-06-30

申请号：US17363079

申请日：2021-06-30

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Ankit Sharma

IPC: G11C16/34 ,  G11C16/04 ,  G11C16/10

Abstract: Memory devices might include an array of memory cells and a controller configured to access the array of memory cells. The controller may sense a first threshold voltage of the selected memory cell. In response to the sensed first threshold voltage being between a first pre-program verify level and a first program verify level, the controller may bias the selected memory cell for SSPC programming. The first pre-program verify level might be less than a final pre-program verify level and the first program verify level might be less than a final program verify level. In response to the sensed first threshold voltage being less than the first pre-program verify level, the controller may bias the selected memory cell for non-SSPC programming. In response to the sensed first threshold voltage being greater than the first program verify level, the controller may inhibit programming of the selected memory cell.

公开(公告)号：US20190311756A1

公开(公告)日：2019-10-10

申请号：US16432250

申请日：2019-06-05

Applicant: Micron Technology, Inc.

Inventor： Ankit Sharma ,  Haitao Liu ,  Albert Fayrushin ,  Akira Goda ,  Kamal M. Karda

IPC: G11C11/22 ,  H01L27/105 ,  H01L27/11502

Abstract: A memory cell comprises channel material, insulative charge-passage material, programmable material, a control gate, and charge-blocking material between the programmable material and the control gate. The charge-blocking material comprises a non-ferroelectric insulator material and a ferroelectric insulator material comprising hafnium, zirconium, and oxygen. Other embodiments are disclosed.

公开(公告)号：US20230187001A1

公开(公告)日：2023-06-15

申请号：US18107200

申请日：2023-02-08

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Ankit Sharma

IPC: G11C16/34 ,  G11C16/04 ,  G11C16/10

CPC classification number: G11C16/3459 ,  G11C16/0483 ,  G11C16/10 ,  G11C11/5671

Abstract: Memory devices might include an array of memory cells and a controller configured to access the array of memory cells. The controller may sense a first threshold voltage of the selected memory cell. In response to the sensed first threshold voltage being between a first pre-program verify level and a first program verify level, the controller may bias the selected memory cell to a first voltage level. The first pre-program verify level might be less than a final pre-program verify level and the first program verify level might be less than a final program verify level.

公开(公告)号：US10937482B2

公开(公告)日：2021-03-02

申请号：US16432250

申请日：2019-06-05

Applicant: Micron Technology, Inc.

Inventor： Ankit Sharma ,  Haitao Liu ,  Albert Fayrushin ,  Akira Goda ,  Kamal M. Karda

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L29/78 ,  H01L29/423 ,  H01L29/51 ,  G11C11/22 ,  H01L27/11502 ,  H01L27/105

Abstract: A memory cell comprises channel material, insulative charge-passage material, programmable material, a control gate, and charge-blocking material between the programmable material and the control gate. The charge-blocking material comprises a non-ferroelectric insulator material and a ferroelectric insulator material comprising hafnium, zirconium, and oxygen. Other embodiments are disclosed.

公开(公告)号：US11600345B2

公开(公告)日：2023-03-07

申请号：US17363079

申请日：2021-06-30

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Ankit Sharma

IPC: G11C16/04 ,  G11C16/34 ,  G11C16/10 ,  G11C11/56

Abstract: Memory devices might include an array of memory cells and a controller configured to access the array of memory cells. The controller may sense a first threshold voltage of the selected memory cell. In response to the sensed first threshold voltage being between a first pre-program verify level and a first program verify level, the controller may bias the selected memory cell for SSPC programming. The first pre-program verify level might be less than a final pre-program verify level and the first program verify level might be less than a final program verify level. In response to the sensed first threshold voltage being less than the first pre-program verify level, the controller may bias the selected memory cell for non-SSPC programming. In response to the sensed first threshold voltage being greater than the first program verify level, the controller may inhibit programming of the selected memory cell.