公开(公告)号：US20010006240A1

公开(公告)日：2001-07-05

申请号：US09789999

申请日：2001-02-21

Applicant: Micron Technology Inc.

Inventor： Trung T. Doan ,  Gurtej Singh Sandhu ,  Kirk Prall ,  Sujit Sharan

IPC: H01L027/108 ,  H01L029/76 ,  H01L029/94 ,  H01L031/119

CPC classification number: H01L21/76843 ,  C23C16/02 ,  C23C16/0236 ,  C23C16/42 ,  H01L21/28518 ,  H01L21/28556 ,  H01L21/76855

Abstract: A method is provided for forming a contact in an integrated circuit by chemical vapor deposition (CVD). In one embodiment, a titanium precursor and a silicon precursor are contacted in the presence of hydrogen, to form titanium silicide. In another embodiment, a titanium precursor contacts silicon to form to form titanium silicide.

Abstract translation: 提供了一种通过化学气相沉积（CVD）在集成电路中形成接触的方法。 在一个实施方案中，在氢的存在下使钛前体和硅前体接触以形成硅化钛。 在另一个实施方案中，钛前体与硅接触以形成硅化钛。

公开(公告)号：US20040180537A1

公开(公告)日：2004-09-16

申请号：US10805557

申请日：2004-03-19

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Sujit Sharan

IPC: H01L021/4763 ,  H01L021/3205 ,  H01L021/31 ,  H01L021/469

CPC classification number: G03F7/091 ,  H01L21/0214 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/28123 ,  H01L21/3145

Abstract: In one aspect, the invention includes a semiconductor processing method comprising exposing silicon, nitrogen and oxygen in gaseous form to a high density plasma during deposition of a silicon, nitrogen and oxygen containing solid layer over a substrate. In another aspect, the invention includes a gate stack forming method, comprising: a) forming a polysilicon layer over a substrate; b) forming a metal silicide layer over the polysilicon layer; c) depositing an antireflective material layer over the metal silicide utilizing a high density plasma; d) forming a layer of photoresist over the antireflective material layer; e) photolithographically patterning the layer of photoresist to form a patterned masking layer from the layer of photoresist; and f) transferring a pattern from the patterned masking layer to the antireflective material layer, metal silicide layer and is polysilicon layer to pattern the antireflective material layer, metal silicide layer and polysilicon layer into a gate stack.

Abstract translation: 在一个方面，本发明包括一种半导体处理方法，包括在衬底上沉积含硅，含氮和氧的固体层时，将硅，氮和氧气体暴露于高密度等离子体。 在另一方面，本发明包括一种栅堆叠形成方法，包括：a）在衬底上形成多晶硅层; b）在所述多晶硅层上形成金属硅化物层; c）利用高密度等离子体在金属硅化物上沉积防反射材料层; d）在抗反射材料层上形成一层光致抗蚀剂; e）光刻地图案化所述光致抗蚀剂层以从所述光致抗蚀剂层形成图案化掩模层; 以及f）将图案从图案化掩模层转移到抗反射材料层，金属硅化物层，并且是将抗反射材料层，金属硅化物层和多晶硅层图案化成栅叠层的多晶硅层。

公开(公告)号：US20040063231A1

公开(公告)日：2004-04-01

申请号：US10674963

申请日：2003-09-29

Applicant: Micron Technology, Inc.

Inventor： Gurtej Singh Sandhu ,  Sujit Sharan ,  Neal R. Rueger ,  Allen P. Mardian

IPC: H01L021/66 ,  F17D001/16 ,  C23C016/00

CPC classification number: G01F1/40 ,  G01F1/42 ,  G01P13/0006 ,  G01P13/0013 ,  G01P13/0033 ,  G05D7/0635 ,  Y10T29/41 ,  Y10T137/0396 ,  Y10T137/7722 ,  Y10T137/775 ,  Y10T137/8242

Abstract: Systems and methods are provided for detecting flow in a mass flow controller (MFC). The position of a gate in the MFC is sensed or otherwise determined to monitor flow through the MFC and to immediately or nearly immediately detect a flow failure. In one embodiment of the present invention, a novel MFC is provided. The MFC includes an orifice, a mass flow control gate, an actuator and a gate position sensor. The actuator moves the control gate to control flow through the orifice. The gate position sensor determines the gate position and/or gate movement to monitor flow and immediately or nearly immediately detect a flow failure. According to one embodiment of the present invention, the gate position sensor includes a transmitter for transmitting a signal and a receiver for receiving the signal such that the receiver provides an indication of the position of the gate based on the signal received. Other embodiments of the gate position sensor are described herein, as well as systems and methods that incorporate the novel MFC within a semiconductor manufacturing process.

Abstract translation: 提供了用于检测质量流量控制器（MFC）中的流量的系统和方法。 MFC中的门的位置被感测或以其他方式确定以监视通过MFC的流动并立即或几乎立即检测到流动故障。 在本发明的一个实施例中，提供了一种新颖的MFC。 MFC包括孔口，质量流量控制门，致动器和门位置传感器。 致动器移动控制门以控制通过孔口的流动。 门位置传感器确定门位置和/或门移动以监视流量并立即或几乎立即检测到流动故障。 根据本发明的一个实施例，门位置传感器包括用于发送信号的发射机和用于接收信号的接收机，使得接收机基于所接收的信号提供门的位置的指示。 这里描述了门位置传感器的其他实施例，以及在半导体制造过程中并入新颖的MFC的系统和方法。

公开(公告)号：US20040234705A1

公开(公告)日：2004-11-25

申请号：US10867587

申请日：2004-06-15

Applicant: Micron Technology, Inc.

Inventor： Sujit Sharan

IPC: C23C016/50

CPC classification number: C23C16/45565 ,  C23C16/4404

Abstract: Integrated circuits are built layer by layer on a substrate. One technique for forming layers is chemical vapor deposition (CVD.). This technique injects gases through a gas-dispersion fixture into a chamber. The gases react and blanket a substrate in the chamber with a material layer. One way to promote uniform layer thickness is to coat the gas-dispersion fixture with a uniform layer of the material before using it for deposition on the substrate. However, known fixture-coating techniques yield uneven or poorly adherent coatings. Accordingly, the inventor devised new methods for coating these fixtures. One exemplary method heats a fixture to a temperature greater than its temperature during normal deposition and then passes one or more gases through the fixture to form a coating on it. The greater conditioning temperature improves evenness and adhesion of the fixture coating, which, in turn, produces higher quality layers in integrated circuits.

Abstract translation: 在基板上逐层构建集成电路。 用于形成层的一种技术是化学气相沉积（CVD）。 该技术将气体通过气体分散固定装置注入到室中。 气体用材料层在腔室中反应并覆盖基底。 促进均匀层厚度的一种方法是在将其用于沉积在基材上之前，用均匀的材料层涂覆气体分散固定装置。 然而，已知的夹具涂覆技术产生不均匀或差的粘附涂层。 因此，发明人设计了用于涂覆这些固定装置的新方法。 一种示例性方法在正常沉积期间将夹具加热到大于其温度的温度，然后使一种或多种气体通过夹具以在其上形成涂层。 更大的调理温度改善了夹具涂层的均匀性和粘附性，这又在集成电路中产生更高质量的层。